Questions tagged [digital-logic]

Digital electronics treats discrete signals, unlike analog electronics that treat continuous signals. Digital logic is used to perform arithmetic operations with electric signals, and constitutes the base for building CPUs.

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LED matrix 7x10

I am trying to assemble a 7 x 10 LED single-color matrix using 2 74HC595's for the 10 columns and a CD4017 for the 7 rows. Now obviously I am only going to use a total of 10 pins of the 74HC595 ...
1 vote
2 answers
61 views

CMOS 4031 -- how was power-on initialization done in its intended applications?

I'm looking at using a CD4031 as a digital delay line in a project I'm working on. In this project, I'd much rather said digital delay line power up in an all-0 state, lest errant 1s clocked out of ...
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How do you go about understanding/internalizing a fairly large Verilog design at say a new company you joined

I have just started a job as a digital design engineer at a new company and I'm getting familiar with their designs. I've been reading verilog code and running simulation with ncsim and looking at the ...
6 votes
1 answer
80 views

Minimizing logic expression for two-input NAND gate implementation

I have recently been struggling with this homework problem that is requiring minimization of a logic expression to be implemented using all NAND gates. The problem requires a very small number of NAND ...
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1 answer
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Verilog blocking statements in always block [closed]

I need to perform an addition inside an always block (with clock) but one of the operands depends on the previous value, hence I cannot use non-blocking statements as all variables/registers/wires ...
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0 answers
37 views

Example of Tinker CAD Circuit of Boolean Expression

Can I have an example of a tinkercad circuit that uses a breadboard and has 5 inputs? like in the picture but 5 inputs? Boolean Expression is F (v, w, x, y, z) = wxyz’ + x’y’ + wxy’z’ + xy + vwx + y’...
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1 answer
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max and min terms question i think [closed]

Im having trouble figuring out what the dsummation refers to. I think it is max terms but i dont know.
1 vote
1 answer
37 views

Digital system design in Proteus

Why doesn't it show anything on the seven-segment displays when it's running? It also shows grey areas at the connections.
2 votes
2 answers
90 views

Logical output of CMOS circuit

What would be the output of the following CMOS circuit? My answer is coming out to be R(P+Q).
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2 answers
101 views

Why do we even need an OR gate? [duplicate]

Question This might be a naive question but hear me out, can't we just connect the two wires in parallel to build an OR gate? Like this: simulate this circuit – Schematic created using ...
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1 vote
1 answer
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Propagation delay vs max flipping frequency of a comparator

Almost all datasheets of comparators will show their propagation delay, which means the time it takes for the input pin's change to be reflected by the output. However, if we have a high-frequency ...
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1 vote
1 answer
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Determining combination of resistors for an equivalent time constant in an integrator circuit

I have a varying source voltage for maximum of 15 V and am using an error amplifier to maintain it using an integrator. Reference voltage is of 5V. I want a time constant of 100 msec with a capacitor ...
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1 vote
8 answers
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Very low jitter microsecond delay

I am trying to produce a ~30 μs delay on a 5 V pulse with less than 1 ns jitter. What would be the best way to accomplish this (if any)? My basic requirements: Delay must be known to the ns Low ...
2 votes
2 answers
797 views

Why is this NAND gate not turning on with both inputs off?

Problem I am trying to simulate a circuit that acts like a memory bit in Logisim Evolution but for some reason the NAND gates don't turn on with both outputs set to 0. I suspect that the problem ...
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3 answers
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Is there an IC controller/chip which outputs a signal for a brief amount of time, say less than 1 minute? [closed]

For instance, in this CD4075, when any one of the 3 inputs is 1 (say 5V), then the output is constant 1 (say 5V) as long as the input value is 1. I want a similar IC which is capable of outputting ...
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1 vote
1 answer
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There's something wrong with my 2-bit adder

I made a 2-bit adder in Logisim Evolution and for some reason it gives the wrong output. I searched a ton of forum posts and all of them use the exact same design and they say it works. Here's a ...
1 vote
2 answers
68 views

Is BCD to 7 segment display a decoder or a driver?

In my book it specifically says that for decoders only one output is high for combinations of each input. And also the number of outputs are 2 power of number of inputs. None of these are true for BCD ...
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1 vote
1 answer
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What is name of the technique where we create modules to help us test our digital design?

In my FPGA design project, I created a few modules that can be used to emulate output from another module. Then there were modules that would inject erronous data or signals that signify errors. By ...
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1 vote
1 answer
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What is the meaning of "adding out" in Boolean algebra?

I'm having a problem with what "adding out" means. I understand that for the three first products in the second step, in the expression "(X + Y')*Z", "*Z" is replaced by ...
1 vote
0 answers
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Why do we need to evaluate circuit twice when clock is low?

I have written a Verilog model for a RISC-V CPU. I am simulating it using Verilator. I have copied the generic testbench class written by Gisselquist whose tick function, responsible for creating the ...
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1 answer
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Cycling through 3 outputs on clock pulse component choice

Is there a better way to cycle through 3 outputs in a loop on clock input? I'm currently using a CD4017 with the 4th counter tied back to reset, and this does work well enough. The fact that it is a ...
0 votes
0 answers
61 views

Why 1-bit multiplier is not expandable like 1-bit full adder does?

1-bit full adder is intended for add two binary operand (with size 1-bit). It has 3 inputs, that is first operand, second operand, and carry-in. Also it has 2 outputs, that is sum and carry-out. 1-bit ...
1 vote
2 answers
87 views

How to speed up rise time on logic shifter?

I am trying to boost a 3.3V data signal to 5V, and I'm using a logic shifter to achieve that. Basically, I'm trying to drive WS2813 LEDs, and the data line needs something close to Vdd (5V) to read ...
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1 answer
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Forbidden zone in the VTC of a buffer

I've been following the MITOCW course by Chris Terman called "Computer Structure". There he mentions the solution to the noise problem while determining appropriate voltage levels for ...
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1 answer
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Why is the gamma term missing in the first case of single transistor example?

This is the video. How is the gamma term present in one case and absent in another?
4 votes
2 answers
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When are these adder algorithms used in digital circuit design?

Whenever I need to add two numbers, I just write a+b in VHDL. I never have to bother about what is synthesized, as long as timing and area constraint is met I think the objective is achieved. I have ...
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2 votes
2 answers
262 views

Best way to detect high-impedance state

I want to build a logic probe. What is the best solution to detect a high-impedance state?
2 votes
2 answers
166 views

Why is the value of product (y) unknown?

I have tried simulating a multiplier which has a datapath and a control path as shown in the video. PFA the link https://www.youtube.com/watch?v=OWUFb2DZpQE&list=PLUtfVcb-iqn-EkuBs3arreilxa2UKIChl&...
0 votes
3 answers
55 views

Output of SN74LS08N AND gate when inputs are connected to nothing

I am using a voltmeter to test the output voltage of the SN74LS08N AND gate. The inputs are simply jumper wires that I can conveniently plug into a voltage source (5V), GND, or otherwise leave it ...
0 votes
1 answer
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Is it possible to create an A.B' logic using classical switches?

I'm new to electronics and I've been trying to make a device that reminds my father to charge his scooter when he comes into the garage. Here is the circuit diagram: Switch S2 is a footpedal / ...
0 votes
2 answers
144 views

Do scientific calculators (non-graphing calculators) have a free running clock?

I am taking a course on IoT devices and I was wondering how generic calculators achieve long battery life given they operate with no more than a couple of coin cells at best. In case they have a free ...
1 vote
1 answer
65 views

How to pipeline CPU instructions in sequence?

I am designing a 16 bit CPU in Logisim Evolution. I have already designed single clock cycle instructions. I have 19 bits to control. I tried using the register and clock divider circuit to send data ...
2 votes
3 answers
133 views

Using ADC for the first time, not sure how to choose the right ADC

I have a signal from another system that changes between 0-1V. the resolution of measuring will be 3mv. the custom board that I need to design include uC of ST that sample the voltage from adc and ...
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Can the 74LVC06A input be connected to an open-drain output?

The picture above is the SN74LS06 schematic from Texas Instruments. It appears that the input of the SN74LS06 can be connected to an open-drain output. I purchased the 74LVC06APW from Nexperia. But I ...
10 votes
4 answers
2k views

AND / OR gates implementation (real or educational)

Frank Vahid's "Digital Design" book presents AND and OR gates at the transistor level like this: Disregarding how it hurts the eyes to see them upside-down like this, is this purely ...
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Whether to use a digital switch IC or SMD transistors

I am creating a PCB, and have a few pins on a microcontroller that I would like to pull high when I want to go into programming mode, but leave them disconnected otherwise. I have a connector which ...
1 vote
1 answer
69 views

Can more fan-out be achieved with two inverters, and if so, how to choose which path?

This is a pretty theoretical question. My interest is digital circuits for CPU design. Let's say I have some digital CMOS circuit composed of 50 transistors that implements some logical function. Let'...
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1 answer
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Differential manchester encoding and data rate

I am trying to understand the specifications given by Transceiver chip (FT5000). This chip encodes databits into 'differential manchester encoding'(DME) technique and send it over twisted pair. The ...
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0 votes
1 answer
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Unable to display entered digits via KEYPAD-PHONE in Proteus correctly

I've started doing some project that includes displaying entered digits via keypad phone in Proteus. I'll leave a screenshot below, so this post doesn't look undefined. You've probably seen this ...
2 votes
1 answer
63 views

Verilog register declaration with "variable index"

I'm trying to create 8 16-bit registers in Verilog that will take 16-bit values from a 128-bit long shift register. Obviously, I have to make use of index variable such as "i" to make this ...
2 votes
0 answers
66 views

Fast ADC interface with FPGA

I have to interface a fast ADC with an FPGA and then do the data processing. The FPGA used will be Zynq Ultrascale+ RFSoC ZU29DR. I have been given the information that ADC_clk = 4x FPGA_clk. ADC ...
-1 votes
3 answers
95 views

Truncating leading digital numbers of a voltage [closed]

I would like to as if digitally sample a voltage value and then remove the leading digits in a voltage. For example (truncating the 2 leading digits): ...
1 vote
1 answer
116 views

What is this chip called? [closed]

I need a TTL chip 74 series, that takes in some amount of inputs and one enable bit. When the enable bit is high, the output is the same as the input. When the enable bit is low, the output is all low....
2 votes
1 answer
123 views

Program counter updating in a single-cycle ARM processor

This picture is from the book Digital Design and Computer Architecture: ARM Edition. It implements the LDR instruction. I have one question: R15 is supposed to be PC+8. In the picture, is R15 ...
1 vote
0 answers
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Why AND-Latch based clock gate (ICG cell) is not reliable only when driving negative edge triggered FFs?

I'm reading the paper "A Novel Glitch-Free Integrated Clock Gating Cell for High Reliability" https://ieeexplore.ieee.org/document/8702507 It says that with AND-Latch based ICG there could ...
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2 votes
6 answers
213 views

Does this circuit exist? Frequency comparator of sorts

I need a circuit that compares two periodic pulse signals and outputs a low or high when the frequency of one is higher than the other. The two input signals are coming from CMOS 74HC devices. The ...
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2 votes
1 answer
110 views

IC with transmission gate

I have a data line, to which 4 smaller devices (which each write) and a "master" (which reads from the line) are attached. Only one device should be writing (e. g. connected) at a time to ...
0 votes
1 answer
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Converting 2-line gate driver PWM to 1-line 3-state

I'm a software engineer, not really experienced in the hardware design, looking to confirm if I correctly designing the following piece: I have a FOC motor controller chip (TMC4671) that is only able ...
0 votes
2 answers
56 views

How to read data from two shift registers in serial

I am dealing with an old circuit which has 2 shift registers in series and suppose to output 16 different values using SPI. The logic behind this circuit is a bit strange to me and I have a hard time ...
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2 answers
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How is the PC reset on startup?

I am reading a book about digital design. There it says in a side note that the PC (program counter) is reset to 0x00000000 upon startup. But I am wondering, how is this really done? There must be a ...

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