The Stack Overflow podcast is back! Listen to an interview with our new CEO.

Questions tagged [drc]

Design Rule Check(s). Is a checkinng procedure that the PCB cad software does against a design rule file.

Filter by
Sorted by
Tagged with
0
votes
1answer
22 views

What factors do I need to consider when selecting an inductor to use in a circuit with the MT3608?

I am trying to use the MT3608 chip to boost the power output of a 3.7V lipo battery from 3.7V to 5V, which will ultimately power an ATMEGA32U4 chip. Below is a picture of my circuit where I have ...
0
votes
0answers
30 views

Altium rules help: keepout region around mounting point throws collision errors for the mounting point itself

I'm working on an Altium footprint for a plated mounting hole with embedded vias arranged around the hole. I have the copper the way I want, but Altium is now throwing DRC errors at me that I'd like ...
1
vote
1answer
28 views

Eagle PCB- DRC Errors: Drill distance and size

I am new to Eagle, so please be polite if I am in the wrong area. I added two mounting holes and had to move some components for clearance. I also extended the board size slightly to accommodate the ...
0
votes
0answers
34 views

EAGLE SMD Overlap

I have created a footprint for an SMA-Connector like this: The footprint looks like this: There are 3 SMD-Pads on the Bottom Layer and 2 SMD-Pads on the Top. The SMDs on the outside overlap with ...
0
votes
1answer
39 views

EAGLE - StopMask DRC Error

I cant understand what this DRC error means. Especially I do not understand this box. Does it mean that the Soldermask will cover part of the pad? How to correct it?
0
votes
1answer
68 views

PCB design rule errors, but can't understand why

I am trying to create a PCB using NI Ultiboard. My circuit is a SECPIC DC-DC converter and controlling the L1 current. This is my circuit: and I get this error: ...
0
votes
1answer
94 views

Altium - design rule check does not match with signal integrity for impedance

I have designed a 2-layer PCB with Altium Designer. I placed an impedance rule of 50 Ohm in trace width rule section. When I run the design rule check, there is no impedance error. However, when I ...
0
votes
0answers
147 views

UnRouted Net Constraint in Altium after Via Stitching

I am just wrapping up my Design of one of my project in Altium 17. I was done with adding ...
0
votes
0answers
39 views

Altium Design rule check 45° to pads for AOI

I would like to create a PCB component clearance rule for the AOI which looks from 45° above onto the board to optically inspect all the soldered pads. I can manually set it but that would lead to one ...
0
votes
0answers
40 views

Altium DRC to catch via on plane split

I had a recent design flagged from the PCB house because of a via that almost didn't connect to the power plane it should have, due to its placement on a split line (see below). I want to add a ...
1
vote
3answers
263 views

Altium track width DRC error on corners

I just ran the DRC check in Altium for my PCB and I get errors on trace width for every trace segments on the board. What is the reason for this ? It generated thousands of errors even tho all the ...
1
vote
2answers
771 views

Altium doesn't show any violation

My Altium Designer does not show any violation, even if I place 2 components right above each other. Im quite the beginner at PCB Design, but does someone know the answer to my problem?
1
vote
1answer
159 views

Altium Designer 17 DRC taking for ever

Intro: My Colleague and I have been using altium Designer for Sometime now . Currently AD 17.1.6 (build 538) . The PCB we draw are 3d 4 layer maximum . the only difference between us is that the ...
0
votes
0answers
46 views

Cadance Error, PCB desining

I am trying to design a simple PCB, using Cadance 17.02 , after importing schematic to PCB designer all footprint pin have DRC Error. the Error is : "Thru pin to shape spacing" with both actual and ...
1
vote
2answers
114 views

stop mask error remains after deleting offending text in eagle

I ran the DRC for dirty pcbs, and it's giving me these stop mask errors for values assigned. In this particular example, It's D1 with a 4148 label. In the first image, you can see the 4148 value ...
0
votes
0answers
303 views

what is parallel run length in DRC check

What exactly is parallel run length in DRC check. I understand that there should be a minimum spacing between two metals depeding upon their parallel run length. In the above figure R1 is the ...
0
votes
2answers
3k views

Room Definition error in Altium

I have placed my first BGA on a PCB. I have followed the instructions from this video: How to fanout a BGA - Altium Designer 16.1 - Joao Beck The overall footprint of the BGA is much larger than ...
0
votes
2answers
176 views

75 Ohm trace with error markers in Altium

I am designing an RF PCB in Altium and I have set rules for 75 ohm as well as 50 ohm impedance traces. The picture attached shows a particular 75 ohm traces with error markers. The trace width is as ...
0
votes
1answer
573 views

How to disable/overwrite tStop overlap/conflicts detection in eagle's DRC?

please refer to the image below for the overall idea: In eagle, there is a layer called "tStop" and with its counterpart for bottom layer being "bStop". As I manage to gather, it's some sort of mask ...
2
votes
2answers
78 views

Eagle insists on marking up spaces which are larger than the minimum specified in the DRC rule

This is what my clearance rule looks like: My grid distance looks like this: And the final result, after DRC, looks like this: As you can see, although not by a very large margin, the distance is ...
-1
votes
1answer
314 views

Errors in EAGLE layout

I am designing a multi-layered layout in EAGLE for the first time. I have already moved all the parts inside the board area. And instead of starting to route I checked for errors. I got some 1500 ...
1
vote
1answer
161 views

Clearance DRC capacitor

I'm getting a clearance error in Eagle, as I understanded, the error comes from the distance between two signals. As you can see in this image there is this pointy thing between pads. What is this ? ...
1
vote
2answers
899 views

Altium: how to display all DRC errors?

I've routed my PCB but had to change the minimum keepout rules which means I'll now have a lot of DRC errors - most tracks are too closely placed together and that would violate the new keepout rule. ...
1
vote
3answers
2k views

How to Allow Shorts Between the same Net in Altium

I have some pads and tracks that are different primitives but are the same net in an Altium layout. Altium keeps flagging these as ShortCircuit DRC violations, but they're the same net, so I don't ...
1
vote
1answer
337 views

Eagle - clearance errors and display errors

I am beginning with eagle, I have not any experience with this program. Could you please tell me, what does it mean clearance error, overlap error and dimension error. How could I avoid it and remove ...
1
vote
1answer
299 views

Altium Design Rule - Selecting Pads Whose Parent Component is not type “No BOM”

I can create a query to select only pads and a query to select only components who are not type "No BOM", but I can't seem to find a way to put these together to create a design rule that only selects ...
2
votes
1answer
728 views

Stop mask error upon running DRC in Eagle 7.3.0

I'm working on my first board layout using Eagle (7.3.0). I've got the layout done, but when I run DRC, I get a number of Stop Mask errors: These seem to be due to small rectangles on the tStop layer ...
3
votes
1answer
123 views

Altium - Change Color of Error Text in HUD

I had this set up on my PC a few weeks ago but lost it when I had to switch computers. I am trying to remember how to change the color of the Online DRC Errors shown in the HUD when hovering over the ...
1
vote
1answer
189 views

Power Isolation generating error in KiCAD

I've created a ferrite bead part with two passive pins. When I insert it in a power line, it causes an error "ErrType(3): Pin connected to some others pins but no pin to drive it" Changing the pins to ...
0
votes
1answer
1k views

Orcad DRC Error

I am new to Orcad Cadence 16.5 Schematics. i drawn a schematics and while running DRC, the following error repeatedly occurs for all Components. Please help me to eradicate the below errors: ...
8
votes
4answers
8k views

Are acid traps real? (2014)

Some people online say that acute angles in trace routing will cause these problems: "Acid Trap" - PCB etchant gets stuck in the corner, and eats away too much, causing open circuit "Peelable" - ...
5
votes
2answers
1k views

What are standard design rules for a Flex Printed Circuit (FPC)?

For an FPC made out of Kapton (polyimide), what are the: min trace width min trace-trace separation min distance from a trace to the edge of the FPC min drill hole diameter min distance from a drill ...
3
votes
3answers
617 views

Need for DRC for Gerbers?

In reference to this question, do you actually perform DRC on Gerbers? Or do you do it for the PCB (post-design or interactive) and trust that the generated Gerbers will be OK?
2
votes
2answers
1k views

Creating a custom library part in EagleCAD and avoiding DRC Errors

I made a custom footprint for an SMD connector I'm using. I wanted to build vias into the footprint for each pad and to connect a trace from each pad to its via. The reason I want to do this is so ...
12
votes
2answers
3k views

DRC tool for Gerber files

Do you know any tools which perform design rule checking for Gerber files of PCB and are suitable for using in batch mode on a remote server? Something similar to what BatchPCB or FreeDFM uses (I ...
6
votes
3answers
3k views

Is it important that vias are plated on a PCB?

As in the title. I've noticed several PCBs of mine have vias which are not plated - they do not have a characteristic "gold" shine to them. I suspect this is because I was pushing the limits of drill ...
4
votes
4answers
449 views

Is it possible to repair a PCB which has suffered a DRC failure?

Okay, so I was a bit of an idiot while designing my PCB. The specifications of my PCB fab were 6/6 mil trace/space, and the boards did not meet this. So, below is the design for the PCB: The trace ...
3
votes
3answers
4k views

Suggested schematic check DRC settings for Tools>Verify in DxDesigner

I am using DxDesigner for the first time (9.2). When running a Design Rules Check (DRC) there are many rules that can be applied. Many of them make sense to check, e.g. "Property name exceeds ...