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Questions tagged [drc]

Design Rule Check(s): a checking procedure that PCB CAD software does against a design rule file.

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KiCad - error while building a circuit with Arduino controlling a stepper motors using XT60 connector

I am learning KiCad, and I am getting this error while building a circuit with Arduino, which control stepper motors using XT60 connector, buck converter:
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Saw tooth orange sign appears when connecting wire to a component pin

I see in my schematic that when I connect a wire to a component pin a saw tooth orange sign appears on the pin: Does this representing an error? and how can remove it?(Nets containing floating input ...
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Design rule error

I just made a PCB and updated the component form schematic to PCB:I even did not do any routing, but as you can see for two of the components (U4-U5-U3-U1-U2) I get some errors, what is the reason and ...
Andromeda's user avatar
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How to I set DRC rules for a specific BGA component?

I need to set the DRC rules for a BGA component. That's because JLCPCB have unique capabilities for BGA packages. In this case I need to have a unique clearance for my BGA component. I want to have ...
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Altium designer DRC Configuration

In my schematic, I have jumpers to separate the power of an IC from the supply rails as follows: I have many of these jumpers in my circuit, when I run DRC, it says all the Vn net should be connected ...
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A question about layout: How to connect the gate to metal 1 layer?

I'm trying to draw a NMOS as shown above, but have some problems (the figure is from Razavi's book, the green box I added represents the N implant layer) In the process I used, there's a design rule ...
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How to tune in the right DRC rule for BGA footprint - Altium CircuitMaker

According to JLCPCB, they write that their capability for the clearance between SMD pad and track is 0.2mm. 0.2mm is 7.87401575mil. If we look at a GBA processor with 0.8mm pitch. Due to the 0.2mm ...
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Out of Board error - DRC Altium Designer

I can understand the error as some design objects are out of the boards defined bounds. Is this error a very general notification informing the designer that the whole PCB is to be reviewed and other ...
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Altium Designer 24 DRC error symbols meaning

I was wondering if anyone could help me understanding the DRC Net Antennae: via errors that look like lollipops. I've read that the double lines are related to un-routed net constraints.
9_daytona's user avatar
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How to create in Kicad pads with different diameter on top and bottom

This is for a two layer design using Kicad 7. I need to create a footprint with 4 circular PTH pads that have larger diameter on the bottom layer than on the top layer. This is to satisfy mechanical ...
zapta's user avatar
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Clearence constraint between two pads of the same component, how to remove this type of error

In this Altium, the component footprint is giving a DRC error. I changed the clarity constraint parameters, but this still shows an error. This is the same case with all the components. The error is ...
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Altium Designer 23 DRC Rule Creation: How do I set a special clearance rule for a TH Pad to SMD pad?

My issue: Because of wave and selective soldering techniques, I need an 8mm clearance for an SMD pad to a TH pad that is on the opposite side of a placed TH part. Here is the scenario to better ...
Experiment-626's user avatar
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Ground Relief Gap Design Rule -- Altium

Does anyone know of a way to implement a design rule in altium to check for instances where signals cross over a via relief ground plane gap? Example shown below. Thanks!
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Clearance error on pin header solder pads in Eagle

I am getting a clearance error on the Sullins connector PPTC191LFBN-RC. I got the EDA models from Octopart. On including this model in my design I am getting a solder pad clearance error on both the ...
Soham Chakraborty's user avatar
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Kicad DRC Error "Footprint has no courtyard defined"

At the final stage of the PCB design, I performed an ERC check. I got the message: Footprint has no courtyard defined @(156,718mm, 78,296mm): Footprint RV1 on Front ...
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DRC errors in Eagle design

I am a new Eagle user. While trying to create a simple adapter between two connectors, I receive many DRC errors (overlaps, clearance, dimensions. The libraries of the connectors were downloaded ...
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Altium wants to attach nets to NC pins of same IC

In Altium, it seems no connect (NC) pins in a given IC create a net that wants to connect them all together. I've been looking for some parameter we may have set when the part was created that ...
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Verilog in Vivado - DRC MDRV-1 Multiple Driver Nets Error

I am writing code that behaves as a rudimentary register file. I have created the register file as a module reg_file.v. The code instantiates a module, describing a register with loading capabilities, ...
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Manufacturing Design Rule Check in Altium

I have experience in schematic design but am new to PCB layer design. When I run a design rule check without Manufacturing and Testpoint rules, I get no rule warnings or violations. But when I include ...
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Violations on USB connector in Altium

I am designing a PCB and in the design, I am using a USB micro-B connector. I have experience in designing schematics but have recently started designing PCB layouts. I got this component from the ...
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What are good values for standard design rules (like clearance, trace width, etc.) in PCB design?

I am working on a project for LED control with MCU and LED drivers. I have an input voltage of 24 V and a DCDC converter to 3.3 V for the MCU. Each LED controller will have an output current of 1 A. I ...
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Altium Online DRC not working

I always route with Online DRC on so that I can realise when I've done a mistake, although this suddenly stopped working during my last PCB design and its been very frustrating to have to perform a ...
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Altium designer PCB - Strange and confusing symbols everywhere (From DRC - Design Rule Checker)

I'm starting to learn Altium Designer, and I have this on my PCB screen: I've tried several things, but nothing works. Here is the same image, I just moved the components away: Can someone explain ...
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Run DRC within a given area only

Background I often design PCBs by pre-placing certain hierarchical blocks first. I pre-place multiple ones of these then choose one of them and start wiring things up inside it, adding the necessary ...
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Altium: Design rule to highlight a plane that is not assigned to a net

In Altium Designer 20.1.14.287 I tried to create a design rule that would highlight that a plane is not assigned to any net after running the DRC. But in the PCB Rules and Constraints Editor I only ...
Thomas's user avatar
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How can I find the errors on my layout?

I am losing my mind not being able to find the error on my layout. I feel like I am looking for a nail in the mud. I am getting the DRC error : MET1 pin outside met1 But I look and look and LOOK and ...
Granger Obliviate's user avatar
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What is this error on DRC Cadence layout

I'm doing the layout of an amplifier on Cadence. I've run the DRC error checker and I don't understand what message is this, can someone help me?
Granger Obliviate's user avatar
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How can I limit design rules check on some components and its connected tracks in Altium?

My design is using an isolator between low voltage and main supply. I'm using a design rule to set clearance beetween planes and tracks with this kind of query: ...
Julien's user avatar
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Altium - Hole to hole clearance rule that only applies when nets are not the same

Our PCB manufacturer specifies that there should be a minimum clearance between holes of 0.5mm when nets are different. I am getting a lot of errors when I have thermal pads with embedded vias closer ...
TripleAntigen's user avatar
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How can I prevent the DRC in KiCAD from checking my silkscreen layers?

I am currently working on a PCB with a lot of components which are very close to one another. For this PCB I do not want to manufacture the silkscreen layers and I do not want the DRC to check for ...
F_Schmidt's user avatar
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Altium: Component Clearance constraint won't go away after setting rule

I am using Altium 18. I ran a DRC check and got the following error: This is saying i don't have clearance between J2 and MH2. This can be seen in the PCB: However, i have set the following rule: ...
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Altium 21 - how to configure multiple layers in schematic

While setting up some rules for a netclass, I wanted to prevent routing on top and bottom copper while allowing it on Inner1 and Inner2. However, the rule dialog only has two layers available: top and ...
Pcb_Eng's user avatar
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KiCAD: "Footprint has no courtyard defined" using Arduino shield template

I made an Arduino shield with KiCAD. When I finished the board in PCBnew, I ran a design rules check. I got "Footprint has no courtyard defined" on all the mounting holes in the shield ...
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KiCAD 5 ‒ Is ist possible for a footprint to have multiple courtyards?

One of the components I am using is really a daughterboard that plugs into two rows of pin headers. Under the daughterboards, between the pin headers, there is space for a additional components. I ...
Michael Graf's user avatar
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989 views

Do PCB routing vias require soldermask expansion?

Most recommendations I've come across regarding solder mask expansion state that it is required so that misalignment between the copper pad and the solder mask opening do not interfere with the solder ...
rothloup's user avatar
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Altium Collision DRC error? Cant figure out why

i have finished my PCB design with Altium. I ran the DRC, to check if there are any errors. Strangely i got like hundreds of errors. First i couldn't find out why, but i managed to narrow it down to ...
Felix Kunz's user avatar
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4 answers
824 views

Vias in a the layout of a CMOS Integrated Circuit

Is there a downside to using maximum possible VIAs (adhering to DRC rules) to connect two very long metals (ex. Power rails in Mx and Mx+1) running in parallel at block level? I know that multiple ...
Adithya's user avatar
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Altium 20 Deleting Rules

I have Altium 20.0.11. My rules keep getting deleted when I update from the schematic. Any rule I set in the PCB gets removed when I perform an update from the schematic. This the only project I ...
efox29's user avatar
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What factors do I need to consider when selecting an inductor to use in a circuit with the MT3608?

I am trying to use the MT3608 chip to boost the power output of a 3.7V lipo battery from 3.7V to 5V, which will ultimately power an ATMEGA32U4 chip. Below is a picture of my circuit where I have ...
rollingcodes's user avatar
1 vote
1 answer
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Altium rules help: keepout region around mounting point throws collision errors for the mounting point itself

I'm working on an Altium footprint for a plated mounting hole with embedded vias arranged around the hole. I have the copper the way I want, but Altium is now throwing DRC errors at me that I'd like ...
Chris Fernandez's user avatar
1 vote
1 answer
684 views

Eagle PCB- DRC Errors: Drill distance and size

I am new to Eagle, so please be polite if I am in the wrong area. I added two mounting holes and had to move some components for clearance. I also extended the board size slightly to accommodate the ...
user3573562's user avatar
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EAGLE - StopMask DRC Error

I cant understand what this DRC error means. Especially I do not understand this box. Does it mean that the Soldermask will cover part of the pad? How to correct it?
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Altium - broken unconnected nets

I am having trouble figuring out what is wrong with these nets? "Design -> Netlist -> Clear all nets" will delete only the functional ones and these unconnected ones remain. Can anyone tell me what ...
Hi.'s user avatar
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PCB design rule errors, but can't understand why

I am trying to create a PCB using NI Ultiboard. My circuit is a SECPIC DC-DC converter and controlling the L1 current. This is my circuit: and I get this error: ...
Tomer Polski's user avatar
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1 answer
378 views

Altium - design rule check does not match with signal integrity for impedance

I have designed a 2-layer PCB with Altium Designer. I placed an impedance rule of 50 Ohm in trace width rule section. When I run the design rule check, there is no impedance error. However, when I ...
Rasool's user avatar
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UnRouted Net Constraint in Altium after Via Stitching

I am just wrapping up my Design of one of my project in Altium 17. I was done with adding ...
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Altium DRC to catch via on plane split

I had a recent design flagged from the PCB house because of a via that almost didn't connect to the power plane it should have, due to its placement on a split line (see below). I want to add a ...
sbell's user avatar
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2 votes
3 answers
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Altium track width DRC error on corners

I just ran the DRC check in Altium for my PCB and I get errors on trace width for every trace segments on the board. What is the reason for this ? It generated thousands of errors even tho all the ...
GmodCake's user avatar
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2 answers
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Altium doesn't show any violation

My Altium Designer does not show any violation, even if I place 2 components right above each other. Im quite the beginner at PCB Design, but does someone know the answer to my problem?
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2 votes
1 answer
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Altium Designer 17 DRC taking for ever

Intro: My Colleague and I have been using altium Designer for Sometime now . Currently AD 17.1.6 (build 538) . The PCB we draw are 3d 4 layer maximum . the only difference between us is that the ...
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