Questions tagged [dsp]

DSP stands for Digital Signal Processing or Digital Signal Processor.

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ARM CMSIS Matrix conversion to a uint16_t array

I'm working on the STM32L476RG and I'm looking to perform some matrix operations on the controller, using C and CMSIS-DSP for ARM. I have 2 uint16_t arrays which I will be converting to matrices and ...
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1answer
31 views

Need help with timing in Verilog functions

I'm doing a filtering project and I'm writing a module that feeds a lot of data to some compute units. There's a lot of really repetitive code and I was wondering if there was any way to condense it, ...
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36 views

Lattice FPGA: Mach X02 7000 Can it be used for DSP?

I have a MachX02 7000 having 6800 LUT's. I want to implement DSP algorithm involving floating-point DSP algorithm on 2 14 bit ADC input data. Is it possible to perform on this FPGA with low LUT's, No ...
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41 views

Timing issue about DSP Parallel I/O

I want to use DSP's parallel I/O to communicate with FPGA synchronously but find an issue with the timing. In this design, DSP writes data to FPGA through its parallel IO. The CLKOUT is generated from ...
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39 views

The effects of frequency resolution in FFT on the frequency spectrum

This is a section for the parameter study of my thesis (basically: why and how I did what I did in the experiments). Currently, I have to choose the fit bandwidth and FFT lines combination for the ...
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56 views

FPGA multiplication using DSP hardware, signed vs. unsigned

I'm using the DSP unit (just a fancy name for the multiplier/accumulator unit) of the Gowin GW1N devices to do some fairly simple math. These units accept two 18 bit inputs for the multiplier adding ...
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1answer
112 views

questions about up-sampling and moving from slow to fast clock domain in FPGA

I encountered some questions and problems I asked myself lately and hoped I can get a nice lead here before I start reading long articles without even be sure if it's the right way. Let's assume I ...
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2answers
47 views

Translating Stepper motor driver outputs (A-,A+,B-,B+) back into clk,en,step

I have a rather weird problem that makes it necessary to sense the four wires off of a bipolar stepper motor(A-,A+,B-,B+) and translate them back into the pins that controlled the stepper motor driver ...
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1answer
67 views

Is it true that FPGAs and DSPs are widely used for modulation and demodulation of signals? [closed]

I have to write a thesis about digital communications, and I don't want to write something stupid in it. I also wrote that "most of the digital modulations and signal processing nowadays are done ...
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53 views

How do I find the coefficients to know if this color combination is realizable? What am I doing wrong in my solution?

I tried to solve the following problem: Part A was solved without any problem, however with part B there is a problem: Second the digital signal processing, to be more specific, image processing, I ...
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4answers
101 views

Is an MPU capable of equal quality digital synthesis as a dedicated DSP chip? [closed]

Is there any factor which would cause a modern microprocessor ( such as an ARM Cortex A/M ) to be inferior at performing digital synthesis compared with a dedicated DSP chip of comparable speed? At a ...
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2answers
119 views

What sampling rate to use when making IIR filters with an audio sample rate of 44.1kHz?

I am kind of confused as to which sampling rate to use when making an IIR filter if the sampling rates for audio are 44.41kHz, or 96kHz, etc.. My concept and what has been working for me. When people ...
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2answers
85 views

the idea behind signal processing [closed]

Is how we detect signals that we start the transceiver in a sampling period at a certain frequency and we take the convolution of it and all incoming signals during that period? When we transform we ...
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1answer
57 views

Incorrect results from DSP48: possibly using 1's complement instead of 2's

I'm using Vivado to write code for an Ultrascale+ FPGA in Verilog and I'm facing an issue with a DSP48. The DSP seems to be outputting the wrong result. I have manually added a DSP through the IP ...
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1answer
27 views

External SDRAM with Blackfin and FreeRTOS

I have a custom board with Blackfin DSP and External SDRAM 64 MB and FreeRTOS. Reading from SDRAM using task with priority 6. In a test I read about 20000 words. Each word is twice consecutively, some ...
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17 views

Peak to average power ratio reduction by waveform clipping in DSP and digital predistortion

What comes first in DSP: Waveform peak to average power ratio (PAPR) reduction by clipping or digital predistortion?
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1answer
56 views

Power and Energy Computations in the Frequency Domain

How do you calculate the power and energy of a signal given only the frequency domain form of the signal function? For the purposes of this question, please do not assume that it is possible to find a ...
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1answer
120 views

DSP low pass filter (IIR) no longer works when changed to a new MCU

I am having troubles understanding why a DSP low pass filter was that working on the M4 is no longer working on an M7. I recently switched over to a STM32H753ZI from a STM32L432KC. In addition to ...
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0answers
15 views

WCDMA , 8PSK signal, 3 G , user end sensitivity, required SNR

Does anyone know how the User End receiver sensitivity for a 3G WCDMA, 8 PSK signal is calculated? and what is the typical SNR required to detect the signal?
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13 views

WCDMA equalization and filter ripple

WCDMA uses the rake receiver for equalization, this necessitates that the multipaths need to resolvable, i.e. longer than the chip period if a SAW filter is used in a receiver, what are the chances ...
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1answer
41 views

What are some ways I can modulate the duty cycle of SPWM with mixed signals?

I'd like to experiment with SPWM, as used in motor control applications. But instead of modulating the duty cycle with a single frequency, I'd like to use a mix of frequencies. I've been searching for ...
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1answer
17 views

LTE, downlink multiple antenna channel estimation with and without Channel State Information (CSI)

In an LTE downlink with CSI at the transmitter, is the radio Tx in the base station and Rx at the user end hardware part of the channel estimation? example: Tx to Tx and Rx to Rx isolation between ...
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2answers
210 views

Trying to implement a digital IIR filter why is this happening?

hope everyone is staying safe. I am trying to implement a digital filter that I made from a continuous transfer function onto a STM32 microcontroller. Using the CMSIS DSP functions found here ...
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0answers
31 views

Adding Line Out / Sub Out to LG soundbar

I have LG Soundbar with wireless sub. I am trying to add Line output, so i could connect a wired sub. I took some pictures of the boards and chips. If someone could point me in right direction on ...
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27 views

Ring modulator with matlab [duplicate]

I'm a bit newbie in DSP. I'm trying to modulate two signals and create DSB-SC am signal. I choose ring modulator for it. So can anyone show me any working ring modulator circuit?
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38 views

Double Sideband Suppressed Carrier modulator List

I am using ring modulator for DSB-SC am modulation in a transmitter circuit. Can anyone please tell me about more DSB SC modulator for am modulation? I want to know which one to use where?
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1answer
78 views

How to sample a non-periodic signal using an Arduino Due?

Input: fig(1) /* graph plot input signal freq :3KHZ */ Here is my code : ...
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0answers
56 views

find the amplitude and phase of the signal

How to write a code to compare the amplitude and phase of these three signal through Arduino?
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0answers
53 views

How does stretch processing work for SFCW?

I've been reading about FMCW radar, and I understand that a chirped signal can be de-chirped by mixing it with a copy of itself, which yields a beat frequency which is much easier to process and is ...
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1answer
56 views

Estimating SOC using coulomb counting with DSP

I am trying to estimate the SOC of a battery using the Coulomb Counting technique. I am implementing the following equation on a DSP inside PSIM: $$ SOC[K] = SOC[K-1] - \frac{I_{Bat}}{Q_{Bat}}\cdot{Ts}...
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1answer
27 views

PROGMEM problem with my project - dynamic allocation error

My project is and RTISR (Real Time Instant Signal Recognizer). I'm sampling a signal from PIN A0 in the Arduino, and I have 6 types of Signals which I compare with (using squared cross correlation to ...
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1answer
64 views

How would I test if my low pass filter works on a remote FPGA?

I am making an example low pass FIR filter design to go on an Intel FPGA. I have an idea about how I'll test it via simulation (by having the input be a sum of sine waves, and the cutoff frequency be ...
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27 views

Filtering Options for an RTL-SDR (DSP and Analog routes)

I have several related questions regarding filtering for an RTL-SDR radio. It's readily swamped by the very, very strong AM and FM radio stations local to me. So much so that your basic passive RC ...
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1answer
28 views

What is sample rate of DSO and what if we have a DSO with low value for sample rate?

I bought a USB DSO and its sample rate is only 48MS/Sec. I never had any problems measuring normal signals from a function generator and other circuits. I have seen many DSOs with high sample rate ...
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2answers
448 views

How is interpolation performed when a sampled sequence is upsampled?

When a sampled sequence is upsampled, zeroes are inserted between the original sample values. But how are the zero values used to effect an increase in the number of sampled values?
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0answers
95 views

How to amplify the output of a digital low pass filter?

I have used the transfer function of a RC low pass filter to design a IIR Digital low pass filter. \begin{equation} H(s)= \frac{1}{sRC+1} ;First \space order \end{equation} \begin{equation} H(s)= \...
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4answers
540 views

How to pick correct filter for a given signal processing task?

I did a study on digital signal processing and I found many theories. But I don't know how to figure out which filter to use when I get a practical signal processing task. Is there a procedure for ...
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0answers
30 views

Finding Bluetooth SoC for audio

I'm trying to find a Bluetooth SoC that supports A2DP (at least) and AVRCP. My goal is to connect my phone to this module and have the built-in MCU perform some task when volume commands are received. ...
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1answer
93 views

Input and output array for CMSIS DSP Real FFT Q15 functions

The first question: in the documentations for CMSIS DSP real FFT functions, it is mentioned : The FFT of a real N-point sequence has even symmetry in the frequency domain. The second half of the ...
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0answers
29 views

Converting Clipping stage of guitar pedal to a formula for use in DSP

Been trying to figure out the clipping stage of a tube screamer so i can implement it in a DSP project. I can simulate a clipping effect by using a tanh(input) type function, which gives me an OK ...
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1answer
52 views

Help with Project

[Difference Eqution]: $$LPF_D=\frac{0.1441z^2+0.2881z+0.1441}{z^2-0.6777z+0.254}$$ With a sample of \$T_s = \$ 8e-6 seconds, in scientific E notation. The difference equation: \$Y\$ = Output \$U\$ ...
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1answer
49 views

How do I approximate number of calculations/operations/memory/hardware is required for a 2^18 point FFT on chip?

I am looking for FFT implementation on Chip/FPGA. I need a high-resolution FFT which is a minimum of 2^18 points. However, I need to approximate how much hardware will I require for this process. I ...
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1answer
50 views

How to send different data to three DACs at the same time?

I am building ultrasonic system that needs to generate three different signals for three transducers at the same time.The system is controlled via DSP. Currently I have a DAC with 4 outputs, but as I ...
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0answers
62 views

How to synchronize TI high precision ADC and DAC via SPI?

I am working with DAC80504EVM and ADS8920BEVM-PKD from TI. I am trying to design a system which uses TMDSEVM6657EVM processor board to communicate with these converters via SPI. However, I am trying ...
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2answers
60 views

Help with a Closed loop and zero order hold function ZoH * 1/s(s+a) type

i would appreciate some help in solving this problem, i need to find the transient response for a unit step, i have a brief idea of how to solve, but my graphs in matlab doesnt seem to fit with the ...
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1answer
51 views

Is it possible to digitize small signal with large noise?

I have a small signal, e.g. ~100 uV in a band of interest of 0.1 - 30.0 Hz This signal is accompnied with a huge noise of 50 Hz ~100V of amplitude. ADC's input range is 1V. Is it possible to ...
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1answer
47 views

How can this problem be solved with partial fractions? (Zero order holder with g(s) block function)

im trying to figure out how to solve this problems for values a=2; actually im stuck, professor told me how to work it, but i cant figure out what to do exactly, we are using partial fractions inverse ...
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0answers
54 views

STM32F4 DSP noise with inbuilt ADC and DAC

I'm trying to perform signal filtering with STM32F407VGT. I've set up the ADC and DAC to work synchronously, triggered by a timer at 42kHz, and using DMA. The idea is to process half of the buffer ...
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1answer
57 views

FPGA dsp-slices highest sampling rate possible

DSP slices (following Xilinx’s terminology) have certain speed grades (extracted from the switching characteristics of the device) that span up to some hundreds of MHz. Those DSP slices are heavily ...
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1answer
177 views

ADC with parallel DDR LVDS interface and also a parallel CMOS interface

The ADS4126 is a 12-Bit, 160-MSPS Analog-to-Digital Converter (ADC). Its data rate is too high for it to be read out using something like SPI or I2C. It does use SPI for control purpose though. The ...

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