Questions tagged [eye-diagram]

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How to diagnose eye diagram slope on physical impedance problems?

When looking at the eye diagram as shown bellow, if we have high rise time which is cause by RC properties, what can we say about the impedance? What could cause bad rise time? Thanks.
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SATA 3.0 receiver eye mask requirement

I am looking for the dimensions of the internal keepout region for a SATA 3.0 receiver eye mask. Anyone have that handy? Not able to find that in specification Thanks in advance.
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Eye diagram analyzing for SI analysis

I am performing SI analysis for the GTX transceiver interface. the FPGA that I am using is Xilinx Kintex-7 FPGA. I have received a reference SI analysis report done by customer which has eye width, ...
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1answer
276 views

RS485 Eye diagram - does it look good?

I got a new diff probe, I am trying it out on RS485. I'm triggering on the rising edge. The RS485 is running at 25Mhz. Does the eye diagram look good? Could I double the speed (50MHz) and be ok? (...
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2answers
503 views

What does it mean if eye diagram voltage (0 and 1 level) goes negative?

I have created a differential channel and was testing the channel with simple testbench to check the eye diagram. Now I know the channel performance is very bad (It of several PCB transmission lines, ...
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1answer
342 views

Specification for Eye Mask Creation?

I want to create an eye mask which I can apply at the Rx eye diagram up to which I can quantify the quality of my signal at the Rx. Now my question is what are the specifications to determine eye mask ...