Questions tagged [flipflop]

a flip-flop or latch is a circuit that has two stable states and can be used to store state information.

Filter by
Sorted by
Tagged with
0
votes
0answers
44 views

How to build a selector

So I've been looking at this problem for a couple of hours, and I'm pretty sure I need to use finite state machines or at least some kind of memory elements to solve it... it goes as follows: "A ...
0
votes
1answer
81 views

What exactly is a register?

Sometimes I'll look at registers in asm or when debugging a C output. What exactly is a register? In my understanding, it seems like it would consist of, for example 16 D-type flip-flops connected to ...
1
vote
0answers
25 views

One-way JK flip-flop using 74xx109

I want to design a flip flop circuit that effectively has one input and one output, as well as a reset trigger, along with clock and power, using a 74ACT109 JK flip flop. Basically, the output and ...
1
vote
1answer
29 views

What accounts for the current vacillation in this JK latch?

After trying a few different simulators (many of which didn't work for this) I was finally able to model a JK latch with NOR gates. Here is an example: A weird thing seems to happen though (at least ...
2
votes
0answers
48 views

What's causing a master-slave JK flip flop to get 'stuck'?

I've built a JK master-slave flip flop according to the following schematic: Putting it into Logicly I have the following diagram: However, regardless of which switches I change, the final two NOR ...
1
vote
2answers
51 views

How to design a JK latch

I am trying to simulate a JK latch in a circuit builder. What I have come up with thus far is the following: I don't have control of the wiring (the application automatically does these wirings, ...
0
votes
2answers
31 views

Master-slave flip flop without gate delay?

It seems like a master-slave flipflop always has around a 2-gate delay between the Master and Slave sections of the flip flop. For example: My question is what would happen if, theoretically, there ...
0
votes
1answer
44 views

Can you have different clocks working at different intervals to operate a flip flop?

Is it possible to have two clock signals driving a JK toggling flip flop, in which both signals are connected by a XOr gate so that the flip flop only works on either edge of either clock? If possible,...
0
votes
1answer
47 views

Clearing 4-bit asynchronus counter using T flip-flops doesn't work

I am trying to make a BCD ripple counter that count from 0 to 9 , and I have watched a tutorial on YouTube , I implemented BCD counter as the instructor explained and after the counter reaches the ...
0
votes
3answers
47 views

For SR timing diagrams, does a bubble on the output of Q' indicate that it is the same as Q?

I understand that with flip flops when there is a bubble on the clock it means the clock cycle is in terms of the falling edge, but when there is a bubble on the output Q' isn't this inverting Q twice,...
0
votes
1answer
29 views

LED Circuit turns on or off after pulse of varying intensity

I'm trying to make a circuit that turns a LED on or off by using a pulse voltage. The LED should turn on with a pulse of intensity A and off with a pulse of B, where A and B < 5V. Most of the time, ...
0
votes
1answer
22 views

Doubt regarding static timing analysis - setup time check

I was reading J.Bhasker's STATIC TIMING ANALYSIS book. In that book, he tells that when launch flip flop launches the data & while capture flip flop is capturing data, he says that We now ...
1
vote
0answers
39 views

Devices storing volatile memory

I've hit a bit of a rut in a question on my homework for my computer architecture class (MIPS architecture): what are digital logic devices that can implement 1 bit and 32 bit volatile memory, and ...
-1
votes
0answers
77 views

how to count like this: 0,1,2,1,2.. with 2bits register

Im trying to think about correct hardware design using verilog syntax to make a switch that counts like this: if reset -> switch=0. else if (not reset) & (flag) -> switch=1, switch=2, switch=1, ...
1
vote
2answers
80 views

D type flip flop without clock

Is it possible to make a D type flip flop without a clock input? How would one set the logic to 0 or 1 without using a clock input? Thank you.
0
votes
1answer
77 views

Requesting help with a circuit design

I am looking to build a float sensor for a tank and automating the motor based on sensor input. I am looking to execute this without using a microcontroller. Below is my intended sensor setup in the ...
0
votes
2answers
69 views

How to Output DDR data to 1 register

I have an Input which provides DDR data, I need to capture it and output it from the FPGA in one register (12bit). How can I do it? What I did for now is to capture the input data with always block ...
0
votes
2answers
27 views

Interaction of D-Type flip-flops with SR inputs

I've recently been testing myself on D-Type FlipFlop interactions for an upcoming test. In the picture below, I've assumed that Clock overrides reset in the resulting output, Q: Am I correct in this ...
0
votes
2answers
75 views

Modification to the D flip-flop

When we take a clock and a signal, the D flip flop output always gives "clock edge" AND, and the state will be high unto to the next clock cycle. Now I want my output like like a latch, but timing ...
2
votes
1answer
108 views

Is this a good design for a 0…7 counter?

My daughter's electronics teacher recommends to realize a counter from 0...7 as follows: It shall give an output pulse (for a subsequent circuit) when the button is hit the 8-th time. For me this ...
0
votes
0answers
31 views

SR Latch confused about possible Race condition [duplicate]

Totally new to electrical and got confused when reading about SR Latch [ What I am not sure is when R=0 then 2nd input on nor gate comes from output of nor gate below where again only value provided ...
0
votes
0answers
21 views

Change one Flip Flop with another (Are there basic rules how to replace them?) and how many states does a Circuit with flip flops have?

Hello I am studying for my exams and came across this thoughts. D Flip Flops all have 2 states yes? 0 or 1, so If I have a circuit with 2 Flip Flops it has 2^2 states, yes? And If I want to replace ...
0
votes
2answers
55 views

Unpowered clock divider

I am not a professional in this area, so I hope I am asking questions correctly. I have a 5V clock pulse with 50-200Hz (square wave) and would like to build a simple unpowered clock divider. Output ...
0
votes
0answers
28 views

Designing a counter up using JK flip flop (odd numbers)

I'm designing a simple JK flip flop counter up with this pattern: 0-1-3-5-7-9-0. I already a did a multisim and it works fine. But when I change the JK FF to real IC (7473), it won't work. What is ...
0
votes
0answers
69 views

CMOS Flip-Flop Design

I'm new in Transistor-Level Design and for that reason, I have practiced and learned from designs that I found on google. When I tried to design a mux from scratch without relying on the design of ...
1
vote
1answer
152 views

Control several binary outputs with raspberry pi, CD74HC273 D-type flip flops and 5v relays

I am using a system with a raspberry pi and multiple d-type flip flop (CD74HC273), its role is to be able to control several digital outputs with a web app. I use 8 raspbery GPIO bits as data/input ...
0
votes
0answers
26 views

Why can we avoid race around condition in JK flip flop by setting the T/2 of clock < propagation delay of flip flop

As the title suggests, my question is that why we can avoid race around condition in JK flip flop by setting the T/2 (T is time period here) of clock < propagation delay of flip flop? The lecturer ...
0
votes
1answer
48 views

Changing T flipflop to D

For a recent examn, i was asked to create a counter, that counted backwards from 15-1 then starting over from 15, in odd numbers. I did so with a T flipflop, and the following question was for me to ...
0
votes
1answer
81 views

What is this symbol used in this D flip flop circuit? [duplicate]

I'm studying some notes on latches and flip flops. After the introduction of the D flip flop, the notes go on to explain its function - how it works. However, the first circuit diagram contains this ...
0
votes
2answers
73 views

Help understanding SR Flip-Flop

The table in the bottom image is the solution for an exercise based on a NAND SR flip-flop. "Complete the truth table for the SR flip-flop." The "initially" row is given, and I was supposed to fill ...
1
vote
1answer
210 views

Is there an intuitive explanation of the classic edge-triggered flip flop circuit?

I figure there must be a way to understand it in terms of the three underlying latches somehow locking each other out, but I'm not getting it. Is there a way to understand the edge-triggered flip ...
1
vote
1answer
33 views

Need help making a counter controlled by a button

I'm trying to simulate a binary counter that is supposed to be activated by a button B, then count until 40, reset and stop until B gets pushed again. If B is pushed while the counter is working it ...
-1
votes
2answers
68 views

Turning off and Flickering of LEDs for some reason

I've been following Ben Eater's You Tube series on building an 8 bit computer. As I built and connected more modules to the same power source, the LEDs connected to the registers started to flicker ...
0
votes
2answers
41 views

Trying to understand the difference between a regular clocked flip flop and a falling edge triggered one

I tried simulating both: Falling edge triggered one Regular clocked JK flip flop I think there is something wrong with them because when both inputs are high they look like they are having a ...
0
votes
1answer
58 views

JK flip flop not toggling when both inputs are 1?

Instead of toggling, this circuit throws this error. What does this mean and how do I fix it?
0
votes
1answer
55 views

Why is the SR Flip flop edge enabled

I'm struggling to understand the diference between a Latch and a SR Flip Flop, I know that a latch is level activated, and the SR Flip Flop is edge activated but if the circuit is the same, why is the ...
1
vote
1answer
72 views

Where do flip flops “save” their state?

From what I could understand, the state of a flip flop is the current value it is holding on to, i.e., the value that was previously inputted and is now saved for future use. My question is, where ...
2
votes
2answers
111 views

How to determine if an edge-triggered flip-flop is positive going or negative going?

I have an SR flip-flop such as above, and I'm to determine whether it's positive-going or negative-going. How can I do that? I understand that edge-triggered flip-flops' output only change upon edges ...
0
votes
2answers
50 views

Adapting the 74LS170 open-collector “register file” to active-high TTL input

This is a question related to swapping a 74LS170 4 x 4 register file chip for a 74LS173 single 4-bit register. In the other question I wonder if there are even simpler ways to Turn a positive clock ...
0
votes
0answers
49 views

Turn a positive clock edge into a negative pulse to make a 74LS170/670 register file synchronous

This is a follow-up o Why did they make the 74x170 (670) register file asychronous, no CLK input?. I want to use that "register file" for my project, but I need to make it behave properly as a ...
1
vote
1answer
92 views

How to wire up a street light to change lights in specific states (digital circuit)

This is the final project for the only electronics course in my career. I have never taken any other electronics course and I'm seriously at a lost here. I need to score 100 here to pass the course. ...
0
votes
1answer
62 views

Problem with 74HC76, silly mistake or possible fake?

I am a hobbyist and have been buying a few cheap ICs on AliExpress to play around with at home. I know that there is some risk involved in buying these but I seem to have had mostly good luck so far. ...
5
votes
3answers
781 views

State Machine with D Flip Flops; how to deal with race conditions

Consider a state machine whose entire state is kept in a collection of edge-triggered D flip-flops. The outputs of these are fed into a combinatorial network which fully determines the next state, and ...
1
vote
1answer
125 views

What is edge trigerring and what's need for it?

I was reading flip-flops and the text-book said that we should edge trigger flip-flops. I didn't get what is edge triggering and why it is needed. Can anyone explain me ?
0
votes
0answers
27 views

DRAM inspired edge-triggered D-type flip-flop

I was thinking about using DRAM cells as edge-triggered D-type flip-flop, I put the elements in falstad circuit simulator and it worked, but I am not sure on how would this translate to an actual ...
0
votes
2answers
63 views

Calculate the next state for flip flop sequential circuit

Based on my previous question, i managed to draw out the truth table Inputs for flipflops sequential circruits ...
1
vote
1answer
33 views

Inputs for flipflops sequential circruits

Not very sure if these inputs are correct before i draw my truth table. Too many lines and i am confused. JA = QB = KA = B KA = B DB = D' TC = 0
-1
votes
1answer
256 views

Clock frequency divider circuit (divide by 2) using D flip flop

I was trying to implement frequency divider by 2 using D flip flop with the logic connection of ~Q to D input. I provide 2x clock frequency of 50% Duty cycle in the hardware where D flip flop is made ...
0
votes
2answers
55 views

Prevent long press in changing state on D Flip-Flop

I've made a circuit on Logisim that allows me to switch between three LEDs at the push of a button. Essentially allowing me to cycle between OFF, LED1, LED2 and LED3 repeatedly. I'm doing this using ...
0
votes
1answer
78 views

4-bit memory serial to parallel memory register circuit question

I am building a 4-bit serial to parallel memory register and I feel like so far I have gotten things right, but I'm unsure of where to connect the CLR connections. Could someone have a look at my ...

1
2 3 4 5
15