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Questions tagged [jtag]

JTAG is an interface that allows 1) testing of inter-chip connections 2) programming of Flash, microcontroller and FPGA devices.

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Since JTAG can be authenticated and encrypted, which key is used? I read that Secure Boot is used, but what is the key? [closed]

Since JTAG can be authenticated and encrypted, which key is used? I read that Secure Boot is used, but what is the key? Me, owner of this laptop, how can I know the key to use to access my own laptop ...
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ARM SWD Programming Problems

I am trying to erase a NRF52840 and the erasing fails. This is the relevant schematics: Notice that SWDIO is tied to the unused P1.01 for ease of placement and routing. Similarly SWDCLK is tied to P1....
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Why was IEEE 1532 withdrawn?

Official status of IEEE 1532 2002 is "Inactive-Withdrawn Standard" as it is stated here. Analyzing the standards IEEE 1149.1 2001 and 2013 (and some version of 1149.7 and 1149.4) I have come ...
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Lattice FPGA - JTAG Programming 6Pin VS 10Pin

I'm using a Lattice MachXO3LF FPGA, specifically the LCMXO3LF-4300E-5MG121I, and I want program it using JTAG and the HW-USBN-2B programming cable from Lattice. In the Programming Cable Users Guide, ...
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How to turn the FT2232H to the FlashPro5?

There is a TEM0001 devboard with integrated programmer which based on the FT2232 chip and recognize by Libero as FlashPro5 and works with PORT A. There is a topic where tells how to config a 93C56 ...
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[iMX93evk]:OpenOCD throws "JTAG scan chain interrogation failed: all ones" error

I am trying to enable jtag debugging via openocd on imx93evk, executing the below command openocd.exe -s share\openocd\scripts -f interface/ftdi/imx93-evk.cfg -f board/imx93-evk.cfg however I am ...
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AC-JTAG Capacitor Value for differential signal testing

How to compute the value of AC-coupling capacitor to be used in AC-JTAG for testing high-speed differential signal? Can anyone give a more detailed insights on the proper consideration when ...
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MSP430 programming JTAG

For programming MSP430 MCUs through JTAG, is this Schematic correct? I look for a reference design to make sure it will work:
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How to fix erased On-Board Usb-Blaster FPGA (MAX II EPM240T100C3 on board Terasic DE10-Lite)

I have Terasic DE10-Lite board (with Altera MAX10 fpga), which use Altera Max II EPM240T100C3N (and usb-b + ftdi chip) for on-board usb-blaster logic. After explore 8 pins jtag holes on the board, i ...
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What is the standard behavior when a JTAG instruction is violated?

How does the IEEE-1149 standard regulates the TAP-controller behavior if the instruction register in the SELECT-DR or CAPTURE-DR states contains a value that does not correspond to any instructions?
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Getting "Target not found" after programming an STM32H755 using an external debugger

I used to program and debug using the USB port on my STM32H755 Nucleo-144. After flashing the code with JTAG, I can't connect the board to my PC anymore; it says "No target found". Is there ...
Varshini's user avatar
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How does STM32 know if I'm using SWD or JTAG

My curiosity got the best of me so I'm hoping someone here can help educate me. I'm using a STM32 (STM32F101C8Tx to be precise), which supports both JTAG and SWD. Within STM32CubeIDE I can switch ...
ITMan's user avatar
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How to config Channel A/B of FTDI FT4232H to JTAG

I'm new with FT4232H. I just make for myself a FT4232H device with 4 channels UART. (Custom board for learning and researching) And I want change channel A and B to JTAG for debugging STM32 using JTAG ...
Nhat Micls's user avatar
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Why do I need to push into TDI in reverse order on the JTAG?

There is 2 JTAG TAP's R5's TAP and CS400's TAP. the TDI is connected with R5 then CS400 is TDO Such as TDI->R5->CS400->TDO. For example, IDCODE code is 1110 and the BYPASS command code is ...
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Is there a limit to pushing to Shift-IR in JTAG?

I'm trying to understand the behaviour of JTAG with ARM. In particular, there is a Shift-IR stage in the JTAG as shown below, As far as I know, at this Shift-IR stage, we can push instructions like ...
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Custom ESP32 board with FT2232H chip for JTAG debugging

I am currently involved in designing a custom ESP32 board (ESP32-WROOM-32E) and adding the FT2232H chip for JTAG debugging to avoid having to get a FT2232H breakout board or ESP-PROG. I have a ...
cr1tical1's user avatar
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CJTAG Bit Banging - Just Erase the Flash

As in another question, I have a CC2652 which is locked in cJTAG mode. I would like to completely erase the flash memory so that the bootloader is re-enabled, but I don't have a JTAG or cJTAG ...
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Understanding the JTAG pinout

I need to program an old board on which I have very little information. On this board there is an old Xilinx FPGA and some memory chip, on one side there is a JTAG connector from which you think it is ...
Federico Massimi's user avatar
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Why is Xilinx ILA's clock frequency required to be at least twice of that of JTAG?

In various places, it's mentioned that the frequency of the clock input to ILA module has to be at least 2.5x of JTAG frequency, otherwise ILA may not work properly. Out of curiosity, I am wondering ...
bruin's user avatar
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What should be done with the JTAG TRST pin when target chip has only one RESET?

I get the difference between the JTAG TRST (Tap Reset) and SRST (System Reset) signals. If the target chip has these two pins, ...
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Can I read an SoC ROM Table through AXI-AP with CoreSight 400?

I'm newbie and trying to read ROM Table information by JTAG through the AXI-AP using CoreSight SoC-400. As I understand CoreSight is associated with some APs to support JTAG such as AXI-AP, AHB-AP, ...
Carter's user avatar
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MTCK and MTDO pins initialization on ESP32S3

I'm currently working on a project using the ESP32-S3 chip, and I've decided to use MicroPython for my coding. In my project, I have connected GPIO 39 and GPIO 40 to relays for various operations. The ...
cyber122010's user avatar
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Differences/advantages between manufacturer specific vs core specific programmers/emulators/debuggers?

I bought an Atmel ICE a while ago as a way to step away from the Arduino environment and begin using more custom hardware. Now that I am quite comfortable with this I've begun contemplating using or ...
Alex Jegers's user avatar
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TI DM368 access via JTAG with openocd or jlink commander

I have a board with a TI DaVinci TMS320DM368 processor. It users a NAND to boot from for its Linux operating system. The bootloader in the NAND appears to have become corrupt and can no longer boot. ...
bozmanx's user avatar
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How do I identify suitable ICs (for JTAG multiplexing)?

I'm quite a rookie in the hardware-electronic field so please bear with me. I want to create a multiplexer for JTAG with 1:16, so one input and up to sixteen outputs. Actually I only want to flash the ...
Ben's user avatar
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JTAG daisy chain or multiplexer?

I'm about to dive into a new topic which interests me and as such I'm at the fork to decide between daisy chaining several devices or to use a multiplexer. Finally, I want to flash µCs via JTAG. I've ...
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Cannot detect FT2232H

I am using FT2232H for USB to JTAG communication. Cannot detect FT2232H in device manager and FTPROG. I am attaching my schematics for reference. I have used the similar schematics before in another ...
sriharsha sunkara's user avatar
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Lack of I2C peripheral in a module

I want to use 3 I2C peripherals connected to this WFI32E01PC. This part has 2 options. Either MCU or the 54-pin package WFI32 module. I plan to use the 54-pin module. But on page 3 of the datasheet, ...
Freshman's user avatar
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1 answer
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Added value of debugging probes (ST-LINK, JLink, ...)

I've been working in embedded programming for a few years now, and there is something I still don't quite understand about debugging protocols and probes. So as I understand it, to program and debug ...
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Can't flash microcontroller through JTAG

I designed a board and added a JTAG interface to program the built-in ATmega32 16U via an Atmel-ICE. I have already measured the individual pins of the JTAG with a multimeter and there is also 4.5 V ...
Not ASMR's user avatar
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Does JTAG use DDRAM?

I have a microcontroller with external DDRAM. When I debug with JTAG I can see that there is code placed in the DDRAM region. However I never see the initialization of DDRAM code is run. I wonder does ...
user2900385's user avatar
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How to set up MCP430 Pins for SBW?

Hello I'm a senior in college and I'm trying to develop a development board for the MSP430G2533IN20 Microcontroller, this is my first time working with TI MCU's, but I've worked with STM32 before. I'm ...
Mark Volosov's user avatar
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Programming with OpenOCD config file - how do I know my layout_init signal?

we designed a custom board that contains wifi module: EWB-STERLING,(453-00014R ) with STM32F412 chip. I succeed in programming the module, but I noticed that it does not send a reset after each ...
Knowledge's user avatar
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Segger J-tag vs J-link

Are Segger J-tag and J-link the same thing or are these two different things? I could not find helpful answers yet.
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Using BSL to program MSP430 MCU with JTAG fused already blown and all memory wiped out by BSL

If the Texas Instrument MSP430 MCU (specifically Fxxx series) has the JTAG fuse already blown and the BSL was able to erase the whole chip (either by using force erase all or wrongly inputted password)...
Samzun's user avatar
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Is there a standard interface connector or layout for MSP430's "Spy-Bi-Wire" (SBW) interface?

Is there some standard order and/or footprint that people use for these 4 pins? Something akin to the standard 2x3 6-pin ISP layout for AVR chips?
bigjosh's user avatar
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JTagging an Atmel ATF1500 CPLD

Intentions I'm learning how to use CPLDs and I thought a good one to start with is the Atmel ATF1500AL-TQFP44. Whats the deal The datasheet provides no information about programming the CPLD; also, ...
Jacob P's user avatar
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How good are current PCB debugging tools? [closed]

I'm a newbie in the field of manufacturing, and I'm hoping to get a broad understanding of the field. After you get PCBs manufactured, I understand that you need to check for mechanical damage, ...
Achintya Agarwal's user avatar
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Custom ESP32 Board with JTAG only Programming Concerns

Due to the limitation of UART pins available I built a board using the esp3-mini-1 module that can only be programmed using JTAG (through Segger J-Link programmer), but I were unable to flash it (...
A.I.A.W's user avatar
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STM32 20 pin cable pinout

I have an STM32 20 pin cable used by the ST-Link to programme the microcontrollers like the one in the image I know the pinout of the connector is the one below unfortunately I can't find the ...
NicoCaldo's user avatar
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ESP32-C3 JTAG/USB debugging issue with ESP-IDF

I am using ESP32-C3 module and I want to debug my code through USB/JTAG. For USB interface I have used TYPE C connector with ESP32-C3. Connections are as follow but the device does not get recognized: ...
meet10's user avatar
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Programming through JTAG chain

I have this Zybo Zynq-7000 board. The board has a USB interface to configure FPGA as well as JTAG pin headers: This is the second board, an Ultra96-V2 which doesn't have a USB to configure FPGA. It ...
Berker Işık's user avatar
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Altera JTAG: No device found

I got a task to create a custom board from DE0-Nano dev board. So I used EP4CE22E22C6N as similar chip for hand soldering. But when we ordered USB Blaster, Quartus says No device found. I try the JTAG ...
Jirka Picek's user avatar
1 vote
1 answer
2k views

Why does ESP-prog need JTAG connection to program an ESP32?

I recently bought an ESP-prog module, and use it to debug/program esp32 chips, using vscode and platformio. I am connecting the JTAG cable and the program cable. Debugging works well, and programming ...
nipil's user avatar
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"Could Not Verify ST Device" when flashing STM32H747XIH6 over SEGGER J-link within STM32CubeIDE

Im trying to flash/debug a STM32H747XIH6 over J-link within STM32CubeIDE. One of the two cores, the CM7, flashes fine and i can enter the debugger. However when i try to flash the other core, the CM4, ...
Caspar Westerberg's user avatar
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Why do the JTAG parallel registers update on the falling edge?

The TMS state is change on the falling edge of the TCK clock. It is logical that the state of the chip TAP FSM is changes on the rising edge of the TCK clock. Data loading to the shift register on the ...
Arseniy's user avatar
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ESP32-S2 JTAG programing problems

A bit of introduction: I am using ESP32-S2 module with custom PCB and I want to use J-TAG for programming and debugging with ESP-PROG. I am using Eclipse with ESP-IDF plugin (version 4.4) installed, ...
ves_el's user avatar
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What is the value that captured into BYPASS register?

The IEEE1149.1 describes many cases of capturing some value in the CAPTURE_IR/CAPTURE_DR stages to the internal registers. For example, the instruction register shall be filled with "...XXXX01&...
Arseniy's user avatar
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Where does the bit come from when capture the bits to scan cell in jtag Capture-DR stage?

Based on the Jtag stage diagram, before Jtag shifts the bits (Shift-DR) the scan cell needs to capture the bits first (Capture-DR). Where does the bit come from? It is from some test patterns (which ...
Liu Xu's user avatar
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Why is BSDL syntax so wordy?

Looking at BSDL now, one can be surprised that BSDL doesn't look like XML, for example. I understand that the first IEEE-1149.1 was released in 1990 and XML 1.0 was released in 1998. Even knowing this,...
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