Stack Exchange Network

Stack Exchange network consists of 175 Q&A communities including Stack Overflow, the largest, most trusted online community for developers to learn, share their knowledge, and build their careers.

Visit Stack Exchange

Questions tagged [jtag]

JTAG is an interface that allows 1) testing of inter-chip connections 2) programming of Flash, microcontroller and FPGA devices.

0
votes
0answers
28 views

How to program aliexpress Xilink X-SP6-X9 FPGA? [on hold]

I am new to the world of FPGA's. I just bough a Xilink X-SP6-X9 (Spartan 6) board on aliexpress but I don't know how to program it. I got this one: https://aliexpress.com/item/32665068263.html?spm=...
1
vote
1answer
42 views

BOOT0 vs BOOT1 circuit design in STM32f103 (ST-LINK)

I have a question about designing st-link v2. According to the schematics provided by st.com Please help me in analyzing this schematic. Why boot0 was pulldown with a 100k resistor but connected boot1 ...
0
votes
0answers
19 views

Command from Openocd to deactive Target

Can someone tell me if there is a command from OpenOcd that we can deactivate/stop the Target for a while? (like when we press the reset button) I am flashing 4 devices in a daisy-chain with Jtag and ...
0
votes
0answers
22 views

Flash and debug of multiple STM32 in JTAG with J-LINK

I have a board where 3 STM32 are connected to a JTAG port. The 3 STM32 are daisy chained. I am using a JLINK EDU Mini with Atollic TrueStudio IDE. One STM32F746 is a master for the two slaves ...
0
votes
1answer
48 views

When using SWD interface, is the reset pin necessary? [duplicate]

When using the SWD interface, is the reset pin is necessary? In JTAG, there are 5 pins TCK, TMS, TDO, TDI and RST but usually SWD is a 2 wire interface. So I am confused about this.
0
votes
0answers
13 views

Modify Hex (or svf) File to set Word in Flash (ATMEGA)

I work as a testengineer and I try to manually add a 16bit Word to the Flash of a Atmega16. We don't have the source of the firmware and I programm the firmware over JTAG with a convertet svf file. ...
0
votes
0answers
24 views

Can I use the st-link/programmer on nucleo l432kc to program external baords?

Can I use the st-link/programmer on nucleo l432kc to program external boards? I know that I need the SWCLK and SWDIO pins and they don't seem to be connected to external headers but I saw some people ...
-2
votes
2answers
69 views

OPENOCD Error codes: How do I fix this? [closed]

I have a chip I am trying to use JTAG communications with using openOCD. However, I get the following error. ...
2
votes
1answer
53 views

Can I leave SWO/TDO and TDI of J-Link floating?

I'm designing a board with cortex-m4f having only SWDIO and SWCLK. I'm drawing schematics for J-Link's 9-pin JTAG/SWD connector, and I wonder if I can leave the SWO/TDO and TDI pins floating. J-Link'...
1
vote
0answers
26 views

How to prevent OMAP from running software after poweron reset?

I have a faulty forgein system using an OMAP5912 whith external SDRAM and NOR-Flash connected. I have JTAG access to the unit with an Segger J-Flash. Now i want to debug why it does not startup ...
1
vote
0answers
85 views

OpenOCD FT2232H as SWD debugger with STM32L0 mcu

I would like to debug my MCU with OpenOCD. I run this command: openocd -f interface/ftdi/minimodule-swd.cfg -f target/stm32l0.cfg and then I get this prints from ...
0
votes
0answers
70 views

Loading program with OpenOCD

I'm on a system with external flash, so I'm unable to program it easily. However, I can load firmware through JTAG - OpenOCD - GDB chain. I automated it as far as I'm able with ...
0
votes
0answers
41 views

My JTAG connection with Cyclone IV is not working

My FPGA board is not programming. I think I have followed all the guide lines for JTAG connection. Can you see any problems with this connection?
0
votes
0answers
38 views

flash a .BIN with openOCD

I'm using a TI micro controller TM4C1230C3PM to flash a .bin using JTAG and openOCD .i have a board with tag connection tc2050 , I have everything connected but when i open the command window of ...
1
vote
1answer
45 views

Weak output from TXB0104 at 1.5MHz

I'm driving a TXB0104 translator from 3.3V logic on the B side, VccB is 3.3V, VccA is 2.5V, OE is on VccA. Both supplies are solid. It's on a breadboard. (https://www.sparkfun.com/products/11771). The ...
10
votes
0answers
224 views

Switch from JTAG to SWD with bitbang sequence on STM32F103VB

I am trying to switch from JTAG to SWD without any external devices. Why? Because I would like to use the SWO pin to send a stream of logging information to another device. To accomplish this ...
4
votes
1answer
125 views

JTAG trace length affecting programming ability

I've recently had a design made that requires a programming port to be located quite far from the device I'm trying to program. This has meant that my cJTAG traces are around 13cm long. I think as a ...
1
vote
2answers
179 views

JTAG, SWD, EDBG, ICSP, ISP terms

JTAG, SWD, EDBG, ICSP, ISP . Can someone simply explain their differences. For example if EDBG debugger can ALSO program flash, why Arduino boards have both ISP and EDBG ? http://www.armlearning....
1
vote
1answer
49 views

Resistors for xilinx coolrunner ii cpld pcb

I am making a pcb which contains among others a coolrunner ii cpld . I will programm the CPLD through jtag from a digilent cpld development board . I read in a xilinx application note that pull-up ...
1
vote
1answer
97 views

Flashing multi chips with JTAG using openocd

I'm newbie in this field. My task is I have to flash 6 devices with JTAG like the picture below. I'm currently success with flashing one device. Can someone give me advice how to flash all 6 devices? ...
0
votes
1answer
63 views

Program a Wi-Fi Module using a STM32F4

I am desgning a sensor which reads data from 6 transducers and is desired to send them over Wi-Fi to a host pc. Because of space limitations, I have to design my own pcb with microprocessor instead of ...
3
votes
2answers
612 views

SWDAP vs CMSIS-DAP vs DAPLink

EDIT : I got the basic questions (for example, what is CMSIS-DAP?) answered by user @Nipo. Based on that, I restructured my post in a more logical way. Hopefully ...
3
votes
1answer
281 views

Altera Cyclone II Quartus II JTAG Programming Error

I'm trying to program a Cyclone II I bought here using Quartus II 13.0sp1 on Arch Linux. I'm trying to program it with a very simple Verilog program with three inputs and two outputs and a few simple ...
0
votes
1answer
48 views

NXP LPC-Link 2 hangs when flashing and debug

im using a JTAG probe NXP LPC link 2 , with IAR Embedded workbench and procesor LPC1766. for some reason when i compile and try to load either a debug or release firmware onto the LPC1766 , it works ...
3
votes
5answers
712 views

How does JTAG program an MCU

How would JTAG program an MCU with flash memory? I realise that this probably varies from chip to chip, but I'm assuming there's some process they all have in common. Specifically, I'm asking in ...
0
votes
0answers
100 views

Flashing LPC1768 with OpenOCD

I'm venturing into JTAG flashing, and thought OpenOCD would be a good place to start. I had a quick look through the documentation and found it hideously complicated. Likewise, the very few "tutorials"...
0
votes
0answers
45 views

Using generic tools to program ATF150X series CPLDs from a JEDEC file (understanding JTAG details)

I have a number of ATF1504 44 pin PLCC CPLD devices. I can design for them without a problem to get a JEDEC file. I want to program them via the JTAG ISP interface which has the same pinout as the ...
0
votes
0answers
371 views

JTAG for Raspberry Pi 3

I'm working on my extension hat for Raspberry Pi 3. I would like to add a SWD/JTAG among all of the additional features. Have you ever dealt with this issue? How can I implement this? I mean, it's not ...
1
vote
1answer
57 views

Analog Blackfin Processor Silicon Revision issue [closed]

Recently we got a large batch of ADSP-BF5346s that say they are Silicon Rev 3 but internally read as Rev 2. Is there a way for me to determine the Silicon Revision number on the rest of the shipment ...
0
votes
1answer
50 views

Is there a way to convert BSDL format to synthesizable verilog?

I have a BSDL file for a device for which I need to generate test patterns through an FPGA. I learnt that BSDL is a subset of VHDL but the file looks like it describes the hardware of the DUT. I know ...
0
votes
2answers
333 views

How to connect Multiple JTAG devices?

Currently I am working on FPGA design which uses trace32 to interact with jtag devices. Since there are more than once JTAG device in the design we are using parellel (not daisy chain) approach from ...
0
votes
1answer
370 views

How to connect STM32 with DAC?

I have to do a project for my Uni, where one of the requirements is to connect DAC (AD5721 - Datasheet) with STM32F405RGT6 (Datasheet - package : LQFP64). This is what I have so far (DAC connected ...
0
votes
0answers
177 views

FTDI FT_Prog keeps crashing

Anyone here using FTDI's FT_Prog? At first I wanted to re-program the E²PROM of my FT232H to use it as a JTAG device but if I click Scan and Parse the program ...
0
votes
0answers
1k views

How to use JTAG to connect external ST-LINK/V2 with STM32F407VG discovery board? [duplicate]

I want to isolate the on-board stlink, and use an external ST-Link/v2 to program/flash the board. I have a 20-pin JTAG connector. This is just a temporary, proof-of-concept project. I have removed ...
2
votes
1answer
368 views

SWD optoisolation problem

I have designed the following optoisolator for SWD interfacing with an STM32 device and J-LINK programmer: This is the generic schematic: And this is a single optoisolator schematic: I am not able ...
1
vote
0answers
63 views

Can I use JTAG Boundary Scan if SRST is not available

I am attempting to integrate JTAG Boundary Scan onto an existing ARM9 board using SAM-ICE as the JTAG Emulator. One unfortunate oversight is that CPU/System Reset (...
0
votes
3answers
226 views

Connect to Xilinx Zynq 7030 via JTAG connection?

Imagine you are trying to write Bare Metal applications on a Xilinx Zynq 7030 board. Since burning sd cards all the time gets tiresome, you want to establish a JTAG connection. You get a JTAG HS3 ...
0
votes
1answer
934 views

Is it possible to have 5V power and VTREF in SWD programmer for ARM?

I'm trying to use the Segger JLINK edu mini( https://www.segger.com/products/debug-probes/j-link/models/j-link-edu-mini/ ) to program a board that is also powered by USB. It has a pin out shown on the ...
2
votes
2answers
201 views

FPGA Jtag Hooking to User Logic

After some primer reading on jtag it looks to be a nifty means to test a FPGA logic design in a consistent and sustainable way. Let's use altera max 10 as an example. I've read this MAX 10 JTAG ...
0
votes
1answer
193 views

Serial Wire Debug (SWD) Enumeration

When debugging or accessing hardware firmware, JTAG and SWD can be really helpful to the developer, engineer or reverse engineer. When looking at an unknown board/device tools such as JTAGEnum or ...
2
votes
1answer
360 views

Can't program multiple chips using JTAG

SOLVED - LOOK UNDER "EDIT 3" SUBTITLE. I've got this two chips: Board with LPC4337(left) and board with ATSAM3X8E(right), JTAG interconnected, using FT2232H chip soldered on the board of the left as ...
1
vote
1answer
402 views

Burned ST LINK by connecting it to the board

I have a PCB that is getting powered from mains and is connected to a Hi Link component (HLK-5M05 with 5V output). At the moment it is connected to an extensions with a button, a little bit like this ...
0
votes
1answer
151 views

Can ATMEGA JTAG be disabled and enabled just with JTAG?

I am currently developing a schematic based on the ATmega32U4. I need to be able to program the embedded chip, so with ISP or JTAG (preferably). The problem is, I also need the analogs functions of ...
-2
votes
1answer
95 views

Programmatic On / Off Control of 3.3v board power

I'm running some tests on a board I have developed. As part of these tests I would like to run a command, then quickly (like microsecond or less time) cut the power from the board. To perform these ...
2
votes
1answer
121 views

Is TDI shifted on move from SHIFT-IR to EXIT2-IR in JTAG?

I'm struggeling with analyzing a JTAG signal. You can see the signal below. The state machine starts in RUN-TEST/IDLE (green): As far as I understand the standard and the trace lines, 00100 should be ...
0
votes
1answer
47 views

JTAG on a board with optional components

This feels like it ought to be a common problem with a conventional solution, but I'm struggling to find one. I am designing a board with several JTAG-conforming components. It has a mezzanine with ...
3
votes
1answer
160 views

Use a single GPIO for Multiple Uses (TMS320F2803x MCU)

My question is regarding a pin(s) on an MCU, specifically a TMS320F28035, that has multiple functions. Pins 57-60 of the 80-pin QFP version of this MCU are GPIOs but also douple as JTAG pins TCK, TDO, ...
1
vote
1answer
178 views

MSP432 Programming and boundary scan issues (4-Wire, 2-Wire and SWD)

I have reached a predicament. I have a production board with an MSP432 that will not program. To provide some context, I am using the XDS110 that is supplied with the MSP432 launchpad and am simply ...
0
votes
1answer
164 views

JTAG Programmer using Zedboard - Signal Integrity problems?

I am trying to build my own JTAG programmer using the Zedboard but I am stuck with hardware issues. For the Zedboard side, I am using the Pins XADC-GIO0, XADC-GIO1, XADC-GIO2 and XADC-GIO3 as TCK, ...
0
votes
1answer
295 views

Custom connector for connecting 8-pin to 20-pin

ARM-based device have 8-pin 2x4pin JTAG header. J-Link debug probe have standard 20-pin J-Link connector. I have 8-pin 2x4 Socket-Socket IDC Ribbon Cable. One end connects to the 8-pin JTAG header on ...