Questions tagged [latch]

A latch or flip-flop is a circuit that has two stable states and can be used to store state information. However latch is normally used to describe a simple storage device while flip-flop is normally reserved for clocked devices.

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Modification to the D flip-flop

When we take a clock and a signal, the D flip flop output always gives "clock edge" AND, and the state will be high unto to the next clock cycle. Now I want my output like like a latch, but timing ...
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35 views

Need a modified S-R latch

I have a comparator output who is normally high and goes low from time to time. I need a latch which will change its output from high to low when the comparator's output change to low (and keep it ...
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SR Latch confused about possible Race condition [duplicate]

Totally new to electrical and got confused when reading about SR Latch [ What I am not sure is when R=0 then 2nd input on nor gate comes from output of nor gate below where again only value provided ...
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178 views

High frequency clock from clocked RS latch

We were taught that this circuit is not of much use as when CLK=1, J=1 & K=1, Q toggles at a very high rate. So suppose I want to make a high-frequency clock, can I use this? Of course, the ...
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202 views

Latching power circuit with short-to-ground switch

I'm trying to build a circuit around an existing switch that allows another component to override the switch state. (Our component is a computer and the feature we're trying to build is remote-...
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389 views

Building a D flip-flop with two D inputs using 3 S-R latches

"Use three clocked SR latches to build a D flip-flop with two D inputs (D1 and D2 ) and two clock inputs C1 and C2 . Clock C1 takes data D1 and clock C2 takes data D2 ." Any hints how to start?
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Inferred latch occurence in verilog

Implement the following circuit: Note that this is a latch, so a Quartus warning about having inferred a latch is expected. This is my implementation ...
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213 views

IC for clocked nor RS latch

Does anybody know if I can find an IC of a NOR RS latch? It has to have a clock and does not have to have any other functions such as clear or preset. EDIT 1: It could be a D Flip Flop gated but ...
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180 views

Some questions about a transistor latch?

Below is a latch made up of two transistors: When the base current of Q2 is increaased this increases also the base current of Q1 which in turn increases the base current of Q2 more. So by such ...
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476 views

Soft-latch auto-reset OFF (hold) / ON (press) button, is the schematic correct?

I'm looking to make a soft-latching interface with a single momentary push button. Required features for my build are (edited, sorry for bad description) : Circuit should always start in OFF ...
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80 views

What is this symbol used in this D flip flop circuit? [duplicate]

I'm studying some notes on latches and flip flops. After the introduction of the D flip flop, the notes go on to explain its function - how it works. However, the first circuit diagram contains this ...
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What is the difference between registers, flip flops and latches?

I want the answer to the very basic level. I know what they mean individually, but what I am looking for is connection between them.
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How does an SR Latch get started [duplicate]

Noob question, but I'm not seeing how an SR latch such as the one in the image can "get started". If each input depends on the output from the other, how can there be two inputs to each gate to set ...
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604 views

Preamplifier before latch stage in comparator circuit

Adding preamplifier based on simple inverter before latch stage can improve performance of comparator by decreasing offset voltage. Can anybody explain me how it works? Best Regards
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Latch-based sense amplifier design using CADENCE Virtuoso 65 nm technology

I am trying to design a latch-based sense amplifier to sense about 55mV voltage difference using 65nm technolgy, it takes differential input, and should get from it differential output too where it ...
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185 views

How could this GPIO-controlled LED status blinker be improved?

I'm building a simple circuit to drive an LED status indicator in a project built around a RPi. The circuit takes its power from the same source as the RPi and is connected to one of the RPi GPIO pins....
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180 views

Would this circuit work like an SR latch? Why is it better to use two NOR gates?

I am very new to digital logic, and have just started to learn about feedback in circuits. The basic example of an OR gate with its output connected to one of its inputs creates a circuit that seems ...
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55 views

What does fall and rise of clock mean?

Im new to electronics. In fact, I'm a computer scientist looking into embedded systems. I am going through Vol. 1 of Jonathan Valvano's book on embedded systems and got stuck when i read on Gated D ...
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53 views

Why is the SR Flip flop edge enabled

I'm struggling to understand the diference between a Latch and a SR Flip Flop, I know that a latch is level activated, and the SR Flip Flop is edge activated but if the circuit is the same, why is the ...
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Why would this cause a latch?

I'm reading ZipCPU's tutorial and got confused. Specifically, I'm referring to this page. To transcribe the Verilog code: ...
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93 views

Memory in sequential circuit

In sequential circuit block diagram ,it is said that some outputs are again feedbacked to inputs,after storing them in memory. But,where is that memory in sr latch.In sr latch ,it is seen that the ...
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86 views

VHDL: I have a lot of inferring latches due to my case statement

I have coded a project for an FPGA and in one of my files which is a mux, I have a lot of inferring latches, which I think is due to my case statement. The code looks like this: ...
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125 views

What is edge trigerring and what's need for it?

I was reading flip-flops and the text-book said that we should edge trigger flip-flops. I didn't get what is edge triggering and why it is needed. Can anyone explain me ?
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Do I understand the off state (0/0) of an SR latch correctly? [duplicate]

Can someone please confirm if I understand this correctly: When neither R nor S are on (both are 0) it seems to me that at first both outputs are 1, then it feeds back through, and both go to 0, and ...
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SR Latch: Why reverse S and R in NAND and NOR if it reverses the outputs too?

Here is a NOR based SR latch: And here is a NAND based SR latch: So, basically first we flipped the orientation of R and S and then declare that in our NAND latch, the output would be flipped i.e. 0 ...
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128 views

What is the meaning of a “soft” latch?

Googling for "soft latch" brings up many results, and on this site 12 out of 232 questions tagged latch contain the phrase "soft latch". However, there seem to be ...
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116 views

Aircraft Starting Mockup Display With Buzzer Question

I am stuck in the middle of building a circuit for an aircraft starting mockup that will train our students to correctly start the aircraft without accidentally re-engaging the starter and thus ...
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TTL “radio-button” using priority encoder and latch

I'm liking this site and I am not always using it to just throw a question but to develop ideas all the way. First time I did that was on StackOverflow I need JSZip and gzip for my web page, and JSZip ...
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98 views

simplest digital voltage selector circuit using common parts

I found the following circuit for the atmel AT89LP4052 microcontroller programmer, but the bottom right section with all those transistors is an awkward way (to me) to make the input to VPP zero, 5V, ...
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141 views

Verilog latch occurring with instantiating modules with in a generate statement

I am trying to create a register file in Verilog. To do this, I am instantiating multiple instances of a register module I designed in a generate statement. Each module uses a different input and ...
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Understanding complements on inputs

I've got a problem understanding formal writing down of complements on inputs. During my laboratory exercise I was working with a device that had D flip flop embedded in it. The goal was to ...
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166 views

Which is better latches or flip flop

I was reading about flip flops where author is convincing that it's better to use flip flop than latches. He gave following reason for it. As seen from the block diagram of Fig. 5.2. a sequential ...
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Sequential NAND Based Phase-Frequency Detector output

I'm trying to understand the output of my phase detector only for a pulse that goes from zero to one. here is my schematic: (ref is Clk_ref, and Div is Clk_out, both come from an outside circuit) ...
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58 views

D Latch as Transparent latch

I was reading an article over latches and suddenly a line struck me which says "D latches are also known as Transparent latches.". Anyone who can explain me why D latches are known as transparent ...
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174 views

What's happening to this 2N3906?

I'm creating a soft-latching circuit for my project, using a 2N3906 PNP transistor and an N-Channel IRLZ44N MOSFET. The circuit is fairly simple; Once switch one is pressed, it brings the gate of the ...
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98 views

Stable state and don't care

I have a latch but I can't understand what are the meaning of Un/Stable state and ...
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45 views

SR Latch internal conflicts

it is known that "11" are invalid inputs for a SR Latch. But I do not understand the reason of that. I cannot see the electrical conflict in this structure: If R = 1, its NOR gate will give 0, for ...
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Why do we clock Flip Flops?

I am trying to understand Flip Flops & Latches. I am reading from Digital Logic book by Morris Mano. One thing I am not able to understand is why we clock flip-flops? I understand why we need '...
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213 views

Can anyone help me to understand what these capacitors do in this design?

I have a circuit design makes a button latch on-off and drive a mosfet. When I energize the circuit Vout that drives thr mosfet is initially low. After pressing the button, the button state changes ...
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BJT Latching Circuit Help

I have build a latching circuit using both a NPN & PNP BJT to turn on and off an LED, as shown below: simulate this circuit – Schematic created using CircuitLab When I built the circuit ...
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175 views

How to analyze S-R latch circuits?

I'm trying to understand the circuit below (from the Apollo Guidance Computer), which is two S-R latches connected together. The top input resets the output and the bottom input sets the output. But ...
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How does this RS-latch with open switches power the lightbulb?

So I'm trying to learn some of the basics in electrical engineering such that I can better understand how computers work and I'm currently reading about circuits with switches, relays, different gates ...
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70 views

How soft latch power switch in this specific circuit is possible?

I am trying to understand the soft power switch operation of a LED lamp I dissembled. The circuit of the lamp is depicted below. The switch S1 can be considered as a momentary on switch (SPST). The ...
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2k views

Usage of “safe” gated SR Latch?

I just learned about SR Latches, D Latches, and their gated versions and I've got a little burning question. So of course with the SR Latch, the professor told us that the "11" condition cannot occur ...
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137 views

Circuit to randomly light one LED or another

I am attempting to make a cheap and simple "quantum-ish" coin flip circuit. My idea is to use something like an SR latch driving two LEDs, and have the initialization be driven by some random event. ...
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5k views

One pulse to ON/OFF bistable latching relay

I've been trying to design a latching relay driver circuit, with using a push-button switch. Basically when the circuit is powered on, first press in push-button switch make the relay SET, then the ...
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58 views

Power Failure Detection Circuit via Flip-Flop

I'm trying to create a circuit that will detect complete power failure. I think I understand what major components I need, but I'm unsure as to how to go about connecting them. My plan is to take 3....
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62 views

How latches are used to implement High-speed VLSI Designs?

I read a article saying "Latch-based designs, however, have smaller dice and are more successful in high-speed designs in which the clock frequency is in the gigahertz" but I am unable to understand ...
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65 views

Finding out the values in a truth table for a SR-Latch [closed]

My task is to fill in this table the output Q by analysing following circuit My suggestion would be: Would that idea be right? in the digital electronics means: S=1 => Q=1 and R=1 => Q=0 Edit: My ...
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175 views

Why is my Gated Latch not a Gated Latch?

After watching the excellent Carrie Anne's Crash Course Computer Science #6 (https://www.youtube.com/watch?v=fpnE6UAfbtU), I tried to design a Gated Latch in Logicly. I played with it a little, and ...

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