Questions tagged [layout]

Layout is the process of designing a PCB including placement of parts and routing of traces.

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Which ground nodes belong to analog ground in boost converter?

I'm building a boost converter using MAX1771(integrated osc.) and I'm having trouble deciding which ground nodes to separate from power ground (GND) in order to reduce noise in analog (control) ground ...
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16 views

CMOS layout: Simplification and Euler path

what is the simplest form of Y = (logic)' in order to find a Euler path common for pull-up and pull-down network and then implement it through CMOS layout? I have issue finding the best form of the ...
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MAX Layout System wiring parameters

I am using max layout system. I went to the wiring parameters and see a number of options. "WIRE WIDTH" which I can change the width of wire as I draw it. but what the "WIRE GRID " ...
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153 views

What does "strap" mean in this context?

This is one common error in layout IC. What does "strap" mean in this context? LUP.6 { @ Any point inside NMOS source/drain space to the nearest PW STRAP in the same PW <= 30 um @ Any ...
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28 views

How to cross differential traces in Altium using the interactive differential pair routing tool?

I am every day more and more baffled by how Altium seems to do everything, but in such counterintuitive ways. My latest struggle was trying for an hour to learn how to use the differential pair ...
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57 views

PCB layout for high current

I want to build my own wifi led controller as part of bigger project. Easiest way would be to power controller and led separately: But I want to make it easier for end user to connect and minimize ...
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60 views

TPS55288 doesn't produce correct output

I have produced a design for a converter from 12-14 V to 12 V (3 A) using the TPS55288 buck-boost converter. Unfortunately, it is not producing the desired output. I have laid it out as presented in ...
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50 views

How should I route the ground plane under a RF trace with a LC balun?

I'm designing a PCB with a ESP32-PICO-V3, with a RF output to a 50 Ohms U.FL (Micro-Coax) connector. The chip supports WiFi and Bluetooth in the frequency range 2.45 +/- 0.45 GHz. Right now, I have a ...
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65 views

Solder pad with no copper circles inside?

I'm trying to use a ROHM BD9F800MUX (buck PMIC regulator with synchronous regulation.) Upon looking at their footprint guide, it has something I have not seen before and is poorly documented. It ...
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39 views

Does AutoCAD Electrical have a 3D layout feature for designing 3D Electrical Panels?

It is not quite clear for me whether AutoCAD Electrical has a feature that allows specialists to make 3D layouts of the schematics they draw. I mean, is there any possibility to visualize an electric ...
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67 views

Issues with POE isolated PSU - Flyback converter circuit getting hot - Maxim MAX1769 - POE

I have designed a POE device where I used the MAX17690 flyback converter to implement an isolated PSU for my device. I used the reference design MAXREFDES1105 (5V/2A design) from Maxim to size the ...
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54 views

Is the layout of this transistor fingering better?

I was reading the post and there are some points that I would like to discuss more. The image below is from Razavi book where the figure c is mine. Below is an ...
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147 views

How to calculate effective resistance of this square block with contact in the center?

The first figure shows the layout of a metal wire and current flowing in the metal from left to right. Assume that that the sheet resistance of the metal is ...
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43 views

copper balancing poly on 4 layer PCB

i am designing the 4 layer pcb for the first time. I got typical 4 layer stackup - signal on the top, GND, PWR, signal on the bottom Most of the signals are routed on top, few are on bottom, and ...
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46 views

TVS diodes routing on USB data lines

I have decided to use bidirectional TVS diodes for ESD protection on the USB data lines. Nevertheless, the pads of the diodes create a discontinuity of the tracks. So, what is the best way to route ...
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35 views

GNSS connector layout review

I have two ideas about placing the u.fl connector. Could you please review them? FL1 - a SAW filter, L3 - an inductance on the feeding line. Here is the first variant This is the second: Isn't it ...
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1answer
43 views

Tie via stitching and fencing to GND

I know that via stitching requires me to assign my vias to a signal (like GND pours on top and bottom layers). Do I need to assign signals to the vias in order to "fence" routed nets, for ...
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20 views

Layout extraction with open source tools / Library characterization without post-layout netlists

I want to characterize a few cells into a standard cell library, but the PDK we are using is a commercial one. The foundry only gave us Calibre rule decks and unfortunately I don't have access to ...
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40 views

Why for DDR3 driver with a low-impedance output undesirable?

I was reading Micron Point to point DDR3 technical note. It says as follows: In point-to-point designs, the memory’s position is typically quite close to the controller, which results in short data ...
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22 views

How to generate not-rounded text in AWR layout design?

In AWR software, I usually use Arial black font for my texts in my layout design. However, it is not a good font compared to fonts within other softwares. Does anyone know any font in AWR that has not ...
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121 views

PCB Layout Review

I just completed a PCB layout for a buck converter, and I would like some feedback on it (layout is my weakest area right now). Please rip it apart :) Attached are some screenshots, and I can also ...
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57 views

RF PCB Layout for 915Mhz + BLE: Which is better?

I am designing a small board with a 915Mhz transceiver IC breakout (based on the CC1101 + CC1190 chipsets), controlled by an STM32. I have used the popular nrf24l01 chipset in the past, but was ...
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111 views

What is a methodical way for designing perfboard layouts?

I'm wondering if anyone has any tips for efficiently and methodically designing perfboard layouts. I'm working under a deadline to transfer several solderless breadboard circuits to perfboards and it'...
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31 views

How does a MOSFET behave with a very thin substrate?

I'm considering a MOSFET with a very short distance between the gate and the bottom of the substrate (body connection), shorter than the channel length. How will the channel form and behave in this ...
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47 views

Multiple GNSS receivers on a tiny PCB - layout advices

I am designing a board where I want to have 2 receivers using different constellations. Due to space constraints, I have the idea to put the two receivers on the same PCB (one on the top layer and one ...
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20 views

How do I support 3-D integrated circuit layout design, using OASIS or GDSII?

How do I support 3-D integrated circuit (IC) layout design, using Open Artwork System Interchange Standard (OASIS) or Graphic Data System II (GDSII)? If I add through-silicon vias and or copper-to-...
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79 views

How to add embedded mounting hole screw for the NVMe ssd in a PCB?

I am designing a PCB for CM4 where an NVMe SSD M.2 2280 will be used. I need to add the screw terminal/mounting hole fused into the PCB (ref the image: https://www.corsair.com/corsairmedia/sys_master/...
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183 views

PCB Layout Help/Feedback

Intro I'm making a POV (persistance of vision) display-type PCB (this is my first PCB ever), using AD9833 chips as controllable clock generators for some PWM drivers I'm using so that I can control ...
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72 views

Altium Designer - How to change width and gap of differential pairs without rerouting?

As the title already states, is there a way to change the width and espacially the gap of a differential pair after routing? In Altium Designer you can easily change the width of both of the ...
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60 views

Manufacturer questions about USB 3.0 differential pair spacing in PCB design

After sending a re-design to MFG I got the following question. can someone please explain the notation 4.7/7.3/4.7 mill and the contradiction that the MFG found? Note: we are talking about USB3 ...
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42 views

Antennas for beginners

I am making a board with the tellit ME310 LTE/GPS chip. I have layout with 50om impedance planned and via stitching and all the guide recommended pieces. I have never really worked with antennas ...
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49 views

Buck Converter Switching Loop Area in Layout Should be small

I have seen recommendations in the datasheets of buck converters, that the switching loop area should be as small as possible. Can someone help me on what would happen if the switching area is large ...
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44 views

Disadvantages of routing inductor in Buck Converter on opposite layer?

I am routing a TPS562202S buck regulator, using a 4.7 uH inductor. Due to space and assembly constraints, I cannot place the inductor on the same layer as the regulator. The regulator will be on the ...
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63 views

High Current PCB Polygon Pour Good Practices?

I've designed a PCB for power distribution. I have a 90W (5V 18A) power supply that will be responsible for powering 5 USB Type-A outputs, each USB drawing up to 12.5W (5V 2.5A) MAX. I'm used to PCB ...
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79 views

Masterthesis - optimization/design a board - help required [closed]

For my master thesis I have to optimize a already build board that was only quick made on a previous master thesis. The Board itself is not that complex and works as an actuator controller via a ...
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35 views

Is it a bug in the design of a low side UCC27524A, and 2EDN7424 gate driver if it doesn't use VDD capacitor?

I am using low-side TI and Infineon gate drivers. If I don't use a VDD capacitor, then there is a glitch in the output waveform as shown in the figures. It seems it's the designer's or layout problem ...
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3answers
161 views

Use vias or point to point connections?

I generally tend to use vias close to the pin to connect my components to GND. I was just wondering what is the right way to make connections when you have two components connecting to say 5V or GND. ...
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128 views

Layout of multichannel 20-bit DACs

I've been reading various app notes as well as Ott trying to figure out how to lay out multiple converters on a board. Most explain how to route the data lines but not much about routing the power ...
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61 views

KiCad help for differential pair routing and silk screen layer

I am just routing a differential pair signal for USB 2.0 with 90 ohm impedance with the KiCad differential pair router. For that I have defined DP width as 9 mills and DP spacing as 8 mills for 4 ...
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17 views

dealing with noise from an external USB device

I am redesigning a system that has an two exteram usb ports. One is used to program a sam51 µcontroller. The other one is used to communicate serially with an external tablet. The schematic was based ...
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43 views

Mini PCIe vs PCIe layout

I am designing fast digital lines for the first time. I want to change the PCIe connector of the CM4 IO board to mini PCIe. I reviewed the AN307: Hardware Design Considerations for PCI ExpressTM and ...
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1answer
151 views

PCIE Gen 2 Intra-Pair Skew

I am about to make a revision of a PCB that has 60 mills of Intra-Pair Skew in PCI-E (Gen 2) RX differential pair: Considering the capacitors the skew is ~50 mills: this is the relevant part of the ...
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1answer
46 views

Re-annotation from pcb now means my components are linked with different designators

After placing my components I re-annotated from the PCB to get positional annotation. This worked fine. But I've just noticed that components on my PCB and schematic (whilst linked, i.e I can click on ...
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104 views

PCB layout for CAN bus transceiver

I have a PCBA where the connector for the CAN bus is about 40 mm away from the MCU. The MCU and connector positions are fixed but I am free in placing the CAN transceiver. I haven't worked with CAN ...
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57 views

I have to draw the corresponding transistor-level schematic of the CMOS layout below

I am an electrical engineering student and I have the following assignment: 'Draw the schematic that is correspondent to this whole layout'. I can understand how to translate the inverters from the A,...
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118 views

Rate my first 2-layer board

I would like to hear some comments on my first 2-layer board. Specificaly if I should go with two grounds (one for 12 V, one for 5 V) or just one big ground plane. Another thing is the layout of the ...
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30 views

Can you copy layouts in eagle?

Below is my schematic design and below that is my layout. My overall project is that same schematic but repeated five times.  The same Vin but 5 different and isolated vouts. I'd prefer to not re-do ...
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36 views

Do pads 6,7,8 have to be connected with pad 12 in this layout?

In eagle there is a line that says these have to be connected but the data sheet doesn't mention it. Here is the data sheet in case it helps https://www.mouser.com/datasheet/2/468/RPX_1_0-1903909.pdf
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96 views

Can USB 3.0 tracks be closer together than 5W if they're quite short?

I am currently laying out a space constrained PCB which contains some USB 3.0 Superspeed differential pairs. These USB signals are confined to the PCB, going from a Cypress CX3 chip to a USB 3.0 Hub ...
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3answers
113 views

Connecting analog GND and power GND

I need to connect a power ground and an analog ground. The power ground is a SMPS output. The analog side consists of 8 opamps and their resistors and capacitors. What's the best way to connect these ...

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