Questions tagged [layout]
Layout is the process of designing a PCB including placement of parts and routing of traces.
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Proper layout of GND
When designing my PCB, I noticed that all the Ground to the whole board, was passing only from a single point, which was also through a capacitor.
Is this considered bad designed, or is it negligible?...
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MII Interface (25 MHz) radiation issue [closed]
I have etherCAT interface (Physically it is ethernet) in my design operating at 100Mbps, which controls the DC motor. I have two boards power and control board.
The power board has dp83822i phy, 25 ...
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What is an ideal layout for a normally-open solder jumper?
We would like to make a normally-open solder jumper between two 50x50mil unmasked square pads. I've seen this kind of thing by others and would like to replicate it in our layout. We tried a simple ...
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Photodiode op amp circuit, incorrect or correct output?
I am using the S12053-02 APD and the ADA4817 op amp. I'm not really sure if I'm getting the correct output or if the configuration I have is the best. I am trying to get a near 1 to 10 nA to mV, so if ...
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What are the common package names for pin spacing in multiples near 50-mils?
I'm looking for component package names that are known to provide conductors on (nearly) 50-mil spacing so it fits well on a 50x50mil SMT protyping board.
I know SOIC are 50-mil, and even SOT-223 is ...
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Ground Relief Gap Design Rule -- Altium
Does anyone know of a way to implement a design rule in altium to check for instances where signals cross over a via relief ground plane gap? Example shown below.
Thanks!
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Placement of de-caps for power pin on PCB
I am debating placement of de-caps on bottom layer for Top side connector pin (Power).
Does it have to be in order, 1 or 2 ?
First series resistor / Then 1uF cap / Then 0.1uF cap/ Then via to ...
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Stubs on shielding vias
Shielding vias are used around high speed digital and RF traces. The return current for these kinds of traces primarily flows through the adjacent reference/ground planes.
If blind/back-drilled vias ...
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Magnetics part with and without auto-transformer
I have 2 magnetics part.
One magnetics is this (Circuit A configuration magnetics) & the other magnetics is this
When I use the Halo part, the ethernet link is not up. But when I just replace the ...
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Pie shaped stubs in RF supply PCB layout
In a recent question there is a photo of a RF PCB
And it shows several pie shaped pads on the supply end of the biasing network.
How are these pads designed. Is there a rule of thumb for the two ...
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Kicad Ground Pads are not completey connected with Ground plane
I have the upper layer of my board set up as GND copper plane.
However, when GND pads are connected to the GND plane, they are not completely connected to GND. Rather, a cross is formed on the pad. ...
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Reason for this ratsnest in Kicad
When (re)designing my board, I came across a ratsnest that I cannot understand its reason, nor do I know how to connect something in order to remove it.
This is the ratsnest that I am talking about (...
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PCB layout review: ground layout for CC step down converter
I'm laying out a step down converter based on the ST L5973AD being used in constant-current layout to drive LEDs, per Application note 2823.
My previous question was what is the datasheet telling us ...
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Creating a radiused corner in Altium Designer?
What is the best way to create a radiused corner in Altium Designer when the angle is not a multiple of 90 degrees?
For instance I need to add a 0.1mm radius to the corners circled in blue below:
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Series resistor vs PCB track impedance
I want to understand the below question:
There are digital interface for example, MII/RMII lines. It requires a PCB characteristic impedance of 50 Ω.
Also, better EMC flexibility, it is said to place ...
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How to set the transimission line impedance of Type-C to DisplayPort?
I have drawn a PCB adapter board to convert the Type-C signal to DisplayPort, using the CYPD3120 scheme from Infineon. The schematic is as follows:
(A clearer version can be found here Schematic.pdf)
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Layout guidelines for TCAN1043DRQ1
I am using TCAN1043DRQ1 in my design.
May I know what are the layout guidelines I need to follow.
I checked the datasheet it. It does not say anything about layout guidelines. It tells more about ...
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Is the PCB routing for this LM5143A-Q1-based buck converter right?
Thanks to your advice on StackExchange, I'm in the final stage of developing my first LM5143A-Q1-based (link to datasheet) buck converter! It may be a bit rushed as I need to prepare this for a high ...
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Multiple layout files for the same amplifier in Altium
There is an amplifier I want to import a layout of the amplifier shown in the link below. I opened the ZIP folder and I have there about 10 files.
I know DRR is drill report.
When I googled rest of ...
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What is the purpose of Solder Bridge?
I am learning about STM32 controller now.
While learning I gone through the datasheet of STM32F429 display board in that board it has solder bridge.
I don't know what is the purpose of that. Can ...
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PCP Design - HX711 ADC not stable
I have designed a board with a HX711 for a kitchen scale (MCU on the board is an esp32-s3-wroom-1u-n8r8). When I start the system, the HX711 starts at a random value and drifts over some time (seconds ...
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Invalid KiCad DRC error, missing connection
I've designed a 4-layer board and when I run DRC I get this error claiming that the connecting between a via and the GND-plane is missing. Note that the bottom left via is the highlighted one that the ...
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PCB Review (ATmega32U4 + Bosch BNO055 IMU sensor)
So I'm very new to PCB design and would like to get feedback on the layout I've done. I've attached the layers for the board which is a 4-layer stack-up. I'm working with some space constraints too so ...
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Tactics of implementing DC power supply to opamp in real layout
I have built a circuit shown below. I need to build a layout for this circuit. Regarding the power supply, what is the best strategy for powering the DC voltage of the OPAMP?
I need some connector and ...
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4 Layer PCB layout with microcontroller and IMU
I'm trying to design a 4-layer PCB board and would like to check if the following layout will perform well. By well, I mean if it will perform optimally. Factors such as Low EMI and noise coupling etc....
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Trace impedance issue in via antipad
We have simulated the S-parameter using the SIwave tool. In that, we have done the impedance scan for the traces and we have found some higher impedance >100E which is supposed to be 85E near the ...
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PCIe Gen4: inter-pair skew: any limits?
For PCIe (and more particularly PCIe Gen 4), is there any recommendation on the maximum inter-pair skew, i.e. the maximum time/length difference between either:
2 TX differential pairs (of different ...
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Battery charger failure
I'm using this Battery Charger IC - MCP73831.
I am using a SOT-23 package.
My input is 5V, the output Vbat charge regulated voltage on the Vbat pin is 4.2V and the maximum charge current is 340mA.
So, ...
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Why does Backside Power Distribution work for high speed CPUs?
Several upcoming or future CMOS process nodes are said to offer some kind of backside power delivery for Silicon CMOS transistors, so the precious area in the lower metal layers is freed up for signal ...
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Switching Voltage Regulator not Outputting Correct Voltage
I am working with a LM2576T-ADJ that is taking as an input voltage a 2 cell Li-Po battery that in my application won't decrease below 8V and should output a voltage of approximately 6V to power a pair ...
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SST12LP15B: What is the purpose of the length/width specification for connecting pin 12 (VCC3) to VCC?
In the datasheet for the SST12LP15B, figure 11 shows that pin 12 (VCC3 - power supply, third stage) is connected to VCC via a "Length = 220 mil,
Width = 10 mil" trace. Why is this required? ...
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Cadence Virtuoso CMOS layout: MIMcap become unrecognised after instantiating a new component
I have a really weird issue with the layout of my design (TSMC 0.18um BCD). I have three components (A, B and C), all of which are LVS and DRC clean and sitting in their own respectable NBLs. ...
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TTL bus termination physical circuit layout
I'm breadboarding a simple data bus terminator for a 1970s TTL computer bus that was normally unterminated. I'm trying both passive and active termination to see how they work, but have a question on ...
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Connecting bulk capacitor board via header or standoff?
I am routing a 2 board design that are stacked on the top of each other. The lower board (inverter board) contain the power transistors and a separate board contain the bulk DC-link capacitors for the ...
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Observing heating issues
I'm using this Boost converter.
Below is the schematic:
Layout:
The IC, inductor and diode immediately gets heated up. Any idea why?
Also, there's always a 500 mV drop on the output voltage. For 9 V ...
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Altium - via spacing within differential pair
Somehow I’ve messed up my Altium settings and I cannot for the life of my work out what’s wrong!
I have routed various differential pairs earlier this week and when changing layers the vias were ...
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ADS simulation and layout design
Can anyone explain to me what these dash-dot lines on my circuit design are? It happened when I generated the layout and changed it a bit, but I can't get rid of them. What are they indicating? Are ...
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Is it OK to route a signal trace under an STM32?
Is it okay to route an SWCLK signal (for programming the STM32 microcontroller) under the STM32?
I will use it only to program it whenever I need it; it is not something that is always active.
Please ...
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Output capacitor PCB layout
I am routing a 4 layer PCB of a buck-boost switching voltage regulator circuit. Space is limited and my input & output caps are large. Is there anything to look out for if I lay out the output and ...
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Boost converter Output Voltage problem
I'm using this Boost converter in a design to boost a lithium battery (3.6V-4.1V) to 5.4V for powering a small camera peripheral that requires a typical draw of 80mA. I expect that the worse case ...
user220456
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Split plane under FTDI pads USB 2.0
I want to ask you if its a critical issue
Differential signals from usb 2.0 (DP,DN _ 90ohm) routed to FTDI device FT4232HL
the pads of FTDI IC(1.58mm) goes under a split plane (the marker signals are ...
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Power Supply and Routing Query
I'm using this USB2514B USB Hub device.
I have a couple of questions regarding the power supply decoupling and routing.
Regarding the decoupling capacitors close to the power supply pins: I have ...
user220456
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Proteus - Schematic and Gerbers to Layout?
We have a problem with an old PCB designed using Proteus. We only have the schematic and the Gerber output. Is there any way we can regenerate the layout from those?
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How to connect off-board Vcc+ and Vcc- to the power plane?
This is my first 4-layer design and I can't easily find a clear answer to this question. I am designing a 4 layer PCB (signal-GND-pwr-signal), where regulated +12 and -12V power is supplied through a ...
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Parallel RC circuit for chassis GND and digital GND isolation
In our design we've used a parallel RC circuit for chassis ground and digital ground isolation
The resistor value is 100 Ω. The capacitor is 1000 pF 4 kV.
I was told that it's basically for "EMI,...
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ESC design layout and noise interference question
I'm laying out an ESC (sorry can't post photos) and I'm trying to squash any noise on the board. I unfortunately have limited space which requires me to run LV signal traces from my current sense ...
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Isolation distance between tracks with focus on ESD
I am working on a product which has to meet:
8kV IEC 61000-4-2 contact discharge
4kV IEC 61000-4-4 transients
1.2kV/500Ohm IEC 61000-4-5 Surges
The schematic:
simulate this circuit – ...
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ATMEGA32 TQFP-44 PORTA Pin Order
Is there a logical reason why all the ports of the ATMEGA32A TQFP-44 count anticlockwise from 0 to 7 in an anticlockwise direction round the chip except for PORTA that counts clockwise, that leaves ...
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Boost Converter doesn't work after simulation works fine
I designed a custom board and I just got it.
I checked the boost with Vin=14.4v( the operation required to be with battery)
Once the boost gets enabled, he is trying to take a current but in a strange ...
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Feedback on PCB-layout wanted
I'm currently making a weather station as a personal project. It will consist of one BLE peripheral and one BLE central. I will fabricate both as one PCB, and panelize them with a vcut.
As mentioned ...
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