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Layout is the process of designing a PCB including placement of parts and routing of traces.

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2answers
78 views

Non-isolated DC-DC buck converter layout - which one is better

I'm doing a DC-DC buck converter routing, using TPS62130. As known, the key point to route a DC-DC converter is to reduce the current loop area. In my design, I have a dedicated ground plane, so I ...
7
votes
2answers
435 views

Single ground plane vs split planes?

I have seen conflicting sources about ground plane design. I have been told at my work many times, just slap a single massive ground plane in and that works well enough, we don't deal with anything ...
2
votes
2answers
154 views

Ethernet ground multilayer pcb

I'm currently re-designing a 12-layer pcb. The only thing I am still struggling with is the routing of the ethernet. The layer stackup is as follows: Top Layer GND_1 MidLayer_1 PWR_1 MidLayer_2 ...
1
vote
2answers
70 views

Thermal stabilization of TH LED (layout recommendations)

I have to develop a circuit for LED-based optical reference. Due to specific requirements, only available LEDs are in TO-18 packages with metal cans. The problem is that LEDs experience spectral ...
1
vote
1answer
122 views

STM32 MCU PCB layout review (crystal & decoupling & ADC)

Introduction: I am designing a hobby electronic for first time, using STM32 to control a soldering tip. I read many documents of PCB layout, and also many information from this forum. And this is my ...
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votes
3answers
137 views

Is it possible to request a mapped diagram of electricity usage from your provider? [closed]

Whenever I see our electric bill, it just shows the amount owed, and the amount used (in kWh). However, it would be really nice if we could request or pay a premium per month, for a service that ...
0
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0answers
37 views

RN2483 PCB Layout

I am designing a board based on RN2483. As i have none experience on RF design i am following the guidelines from microchip's datasheet as the pictures bellow. So my question is about the many vias....
0
votes
1answer
52 views

Do I have to route VCC and GND signals on PCB if planes are used

I am designi a board where I have a VCC plane and a GND plane.I have decoupling capcitors and was wondering if I should manually connect these decoupling capacitors with a trace since I plan to have a ...
5
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2answers
530 views

Unused area on layout

I have prepared the following PCB layout I am a hobbyist and when I look at other - professional - boards, mine looks a little strange when considering the empty spaces to the right, and to a lesser ...
2
votes
1answer
89 views

Mark decoupling capacitor

I'm working on a PCB. As ECAD software I am using KiCAD. All ICs will get two decoupling capacitor. One 100n ceramic and a 10uF electrolytic. For now I place them like shown in the picture at each ...
0
votes
0answers
76 views

6 layer PCB layout with RF antenna track

I am doing my first 6-Layer PCB with RF antenna connection tracks. I am using this stack-up: L1 Signal Layer L2 Ground Plane L3 Power Plane L4 Signal Layer L5 Ground Plane L6 Signal Layer I ...
0
votes
3answers
80 views

Plated PCB Hole Shorting Power to GND?

I’ve been soldering components to my PCB; all has been good, but recently, after soldering a big electrolytic through hole cap, the power and gnd plane were shorted. This persisted even after removing ...
0
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0answers
77 views

W5500 Ethernet Chip Layout Advice/Help

I am working on a project that includes the W5500 circuit, this is the first time i had the opportunity to layout Ethernet Interface circuits. Schematic: Whole board and W5500 Module Layout ...
0
votes
3answers
71 views

Current Sensor Layout

I'm trying to improve my circuit layout skills. I'm currently working on a board that needs some current sensors. I've included a screenshot of the layout. I'm hoping some gurus out there can point ...
0
votes
3answers
74 views

Should a trace be connected through multiple pins on a pin header?

I'm designing a modular board, where the two modules are connected through pin headers. For mechanical stability I have more pins than traces and my question is that which is the better: route each ...
1
vote
1answer
44 views

MCU ADC and signal conditioning circuit layout

What are the rules of thumb for physical spacing of signal conditioning circuitry (say - some sort of high-speed sensor followed by a voltage follower opamp followed by a RC anti-aliasing filter)? ...
0
votes
1answer
65 views

Routing Ethernet Connections

I am routing Ethernet traces from a Colibri iMX6ULL computer-on-module to RJ45 Ethernet connector (In-build Transformer). The layout design guide says that Ethernet ...
-4
votes
2answers
82 views

PCB Layout designing [closed]

Propagation delay is more in which topology (stripline or microstrip)??? I am having mutiple signals in a high speed board and some signal are routed too long than how can i say that board trace is ...
0
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0answers
45 views

Ethernet coupler with ground plane

I am designing a simple pcb with pass trough for ethernet using RJ45 Cat6 connectors. Rj45 in and Rj45 out Is it favorable from EMC perspective if both the connector shields are connected together ...
0
votes
2answers
59 views

High Speed design rules for 10GHz [closed]

When any layout is called High Speed Layout? What are the pins we should look for considering any board layout as a high speed design?
1
vote
1answer
67 views

USB Diff Pair used by 2 devices on PCB

My PMIC uses the DP/DN pair of USB type C to get the maximum current that it can draw to power up the circuit or charge the battery. The problem is that i don't have a hub and the signal from ...
0
votes
1answer
45 views

HDMI Through Hole Layout Issues

So this is my first post so please forgive me but inform me if I'm breaking any forum rules. I'm trying to layout a through hole HDMI connector in Eagle. The issue I'm running into is that the gap ...
1
vote
1answer
56 views

DDR Trace Length Inside Package from Simulation Model

The DDR4 in question is a Micron MT40A512M16JY. From the vendor site, you can get the datasheets, specs, sim models. I assume from the sim models you should be able to see the trace length of each ...
0
votes
1answer
91 views

can't remove a pad outside the board in ALtium designer 2016

i accidently placed a pad in my pcb layout outside the pcb box. but now i cant remove it. could you suggest a method to remove it? i use altium designer 2016.
24
votes
6answers
9k views

Have I placed too much on this PCB layout?

I am doing my first PCB layout (using Altium) and have finally gotten past the auto-router stage. The result is a mess and there are some missing nets and design rule violations. Have I packed too ...
0
votes
1answer
237 views

How to calculate the differential impedance for a stackup design

The design is basically a copy from a reference design. I used a few different tools to calculate the trace impedance with different results. While the manufacturer uses Si9000, the result does not ...
0
votes
1answer
170 views

How does my crystal PCB layout look?

Please suggest if the layout is fine: it is 25MHz 3225 crystal. I maintained short traced for XIN and XOUT. I maintained a guard ring around the crystal. I have grounding in layer just below. the ...
0
votes
1answer
40 views

Regarding 50ohm Impedance control trace

We have the query regarding Stack up, 50-ohm Impedance traces and its Reference Layers. Recently We want to fabricate 6 layers 50-ohm impedance controlled board. but in this PCB We have to Routed 50 ...
1
vote
1answer
65 views

Why use more than one contact in VLSI layout?

I saw the following layout in one of the standard cell library provided to us by the University. In the layout, the yellow color diffusion layer is connected to blue color horizontal M1 metal layer ...
0
votes
1answer
96 views

Why did this “backwards” power jack pass ERC in EAGLE?

As will become obvious, I am new to Eagle and PCB layout. I set out a simple design, starting with a power jack. The power jack seems to clearly have a "+" terminal labelled, so I connected that to ...
1
vote
3answers
182 views

Using Extra-Wide Traces

I am currently laying out the board for an audio amplifier I am working on. The power requirements aren't very high - there won't be much more than 500mA flowing through any given trace. However, I ...
1
vote
1answer
144 views

switching power supply pcb layout

I'm studing for the best practice to route a switching dc to dc step down regulator. Especially this TI's part (http://www.ti.com/lit/ds/symlink/tps54340.pdf). At the page 37 there's a layout example....
0
votes
2answers
324 views

Replicate PCB design on stripboard

I'm thinking about making a DIY project (this one). I'm a complete n00b, I just have some theoretical knowledge about electronics from some university courses, and I'd like to learn some more. I was ...
1
vote
2answers
219 views

How do you find buried vias in Altium Designer?

I am working on a complex 8-layer PCB to which I have made a number of changes and improvements. I now want to sent the board out for production and want to check for any unnecessary cost. One of the ...
0
votes
2answers
139 views

Restoring deleted designators on Altium PCB

Is there a way to restore component designators on the PCB without having to delete and re-add the component in the schematic? I deleted quite a few designators while I was laying out the design and ...
0
votes
0answers
40 views

PCB impedance matching with 1.8V HSTL and 1.8V LVCMOS data latched at 200MHz clock

6 layer PCB is designed with layer stack details for 50 ohm impedance match that mentions single ended track width for 9.18 mil. On this PCB, track lengthening and buffers are also implemented before ...
2
votes
0answers
73 views

SMPS Layout, capacitors in parallel placement

I'm laying out a buck converter based on the TPS54308, and the datasheet recommends the following, which I'm trying to replicate: Webench (the interactive design tool by TI), however, recommends 2 ...
9
votes
2answers
2k views

Mounting components on both sides of a PCB

I'm designing a PCB with a microcontroller ,CAN transceiver, sensor (I2C) and linear regulator. I want to make the PCB as small as possible, so my thoughts were to use both sides of a two layer stack ...
0
votes
1answer
92 views

Connecting two USB 2.0 devices to a single USB port on an MCU

I'm designing a PCB where I need to have two possible USB 2.0 connectors (and hence 2 sets of diff pairs) connect to a single USB 2.0 port on an MCU. Only a single connector would be used at any given ...
1
vote
1answer
47 views

Multi-layer layout and return currents of high-speed signals

I am planning to use the following layer stackup for my 10-layer PCB: ...
0
votes
0answers
234 views

Filter USB Power noise after Voltage Regulator?

I have designed a product which will be powered from USB 5V power supply. My product has two PCB. One PCB has USB connector, ...
0
votes
1answer
96 views

Is there a rule for DDR4 CA signals reference plane?

I'd like to know if there is any rule for the reference plane of DDR4 CA signals in PCB layout. I saw some design guide which specify the reference plane to be VDDQ power plane for CA signals, but I'm ...
3
votes
1answer
57 views

Reflections of Low bit rate signal and High bit rate signal

I was reading wikipedia page on Signal Integrity and got stuck with this paragraph. It says: The channel flight time (delay) of the interconnect is roughly 1 ns per 15 cm (6 in) of FR-4 stripline (...
0
votes
0answers
35 views

How can I stack connector variants in AD17?

I am trying to create a board in AD17 which has variants for vertical and right angle connectors. According to the documentation, it says: If your design includes variants with Alternate Parts, ...
4
votes
1answer
176 views

How is this crystal layout?

After 3 days reviewing my PCB layout before going to production, I'm not really sure about it. It would be great if somebody could give me any advice/comments about this crystal unit layout. DETAILS: ...
7
votes
1answer
141 views

USB 3.1 over PCIe board edge connector

I am designing a system with a carrier board that has all of active logic on one board and most connectors on a backplane board. The interface between the two boards is a x16 PCIe board edge connector....
0
votes
0answers
93 views

what is parallel run length in DRC check

What exactly is parallel run length in DRC check. I understand that there should be a minimum spacing between two metals depeding upon their parallel run length. In the above figure R1 is the ...
1
vote
1answer
160 views

SiPM Array, High Speed Layout

I'm working on an prototype array of Silicon Photomultipliers using the Sensl MicroFJ-60035 TSV device. It's a small 6 mm by 6 mm square-shaped BGA photomultiplier. Think of a 6x6 BGA array with the ...
0
votes
1answer
223 views

Ethernet Interface PCB layout

So based on the responses from this thread: Ethernet Interface PCB layout requirement (if any) I made an Ethernet interface layout the best I possibly could using 2 layers. The circuit is of the ...
2
votes
2answers
169 views

Effect of placing components under a magnetic component (transformer, inductor)

I recently had my eyes on the the tear-down of onboard charger from Tesla, and saw that they have placed the control circuitry under the major magnetic components (PFC boost inductor (toroidal), phase-...