Questions tagged [layout]

Layout is the process of designing a PCB including placement of parts and routing of traces.

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45 views

Capacitor IC layout

What is the reason behind this connection of the plates of capacitors in layout? Why is one of the plates was formed by 2 metal layers?
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capacitor layout

I have this passage from a Mr Maloberti related to the topic of Layout of Capacitors and I don't know how to interpret it: The second-order effect must be taken into accout when precise capacitors ...
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52 views

High Voltage on PCBs: design and layout questions

I am designing two PCBs that have high voltage (DC) on them. They will be located on a CubeSat (so, space). 1) The first PCB (HV-PCB) will receive the HV (3 kV max) from a DC-DC converter through a ...
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52 views

NMOS transistor in layout [on hold]

Can somebody please describe the way that NMOS transistor layers: DIFF POLY1 NIMP PIMP are related to the cross section of it?
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Placement of varistor with respect to fuse

My design includes a pretty standard AC/DC converter powered by mains for intended use at home. For overvoltage and overcurrent protection, I am planning to use a combination of varistor and fuse ...
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1answer
59 views

ADC signal close to D+/D- signals layout suggestion

My circuit is laid out in way so that the analog front end is on a different pcb than the MCU board. The two PCBs are connected with a vertical connector of which 4 pins are used to transfer two low ...
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Which is the preferred approach to PCB layout for signal vs power traces in analog circuits, and things to consider?

I have had to layout 2 layer PCBs several times now for analog signals, and am just beginning to learn the process. I often face a similar question in one form or another with regard to laying out ...
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2answers
68 views

SOIC-8 IC input pins small spacing at high voltage

I'm looking at a high common mode voltage difference amp (AD629). The input voltage between the two input pins next to each other will be 150VDC. Normally the pads should be bigger on the PCB than the ...
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146 views

What tool produces this type of layout?

I don't under this layout figure (5.c) in pic attached. This is a screenshot from research paper in this link:- https://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=7573442 Alternate link for the ...
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Does anybody have PCIe (3.0) aka PCI Express module card edge connector technical drawing? [duplicate]

I was searching through the internet to find PCI Express card edge connector footprints / technical drawings / pin spacing / layout of the module cards that you stick in these connectors you can find ...
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107 views

How to design a CMC (Common Mode Choke) footprint to allow no-pop solution

How would you design in CMC's with a 0504 (1210 metric) 4-lead package to allow for a no populate (do not pop, DNP,DNI) solution? I am thinking 0402 0ohm (zero ohm) resistor but cannot picture the ...
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53 views

Is it feasible to manually draw from scratch a 2-layer PCB inside HFSS

I am trying to replicate a new planar marchand balun Is it feasible to manually draw from scratch a 2-layer PCB inside HFSS ? Or should I use external PCB drawing tool such as Kicad or Altium, then ...
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Guidance on the use of pins of LM1117

I plan on using this 3.3v regulator It has 4 pins on the SOT-223 package I plan on doing the following ( but want to check ) Pin 1 - Gnd Pin 2 - Vout - 3.3v -- Tied to pin 4 feeding my circuit Pin ...
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Pi Filter Design / Realization with 915MHz u.Fl

I'm putting a u.Fl connector into a new LoRaWAN design (915MHz). Apologies ahead of time if the scope of my questions are too wide for one post, but I think it's all closely related. I'm going to ...
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DC/DC Buck Converter PCB Layout Help

Most examples I find are for buck converters on a PCB of their own with massive traces. I want to make sure this layout is fine with the planes I'm using(both top and bottom copper pour layers are GND)...
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128 views

Zigbee PCB layout - bad signal reception

I'm using Atmel's ATMEGA256RFR2 (link) for Zigbee (802.15.4). However I could not reach more than a few meters of range between my nodes. Here is the antenna design layout and schematics I'm using, ...
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Antenna mounting confusion from Datasheet

I ordered a few samples of a particular antenna, because of the datasheet showed a rather peculiar layout - so I wanted to see what the actual component is and how it performs. Antenna is Abracon's ...
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analog and digital ground connection point selection

I've read some articles that say the connection point of digital ground and analog ground should be at the power supply output port. However, when there are two or more power supplies which are ...
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51 views

AC power tracks, PCB design guides

I was wondering about this board Im reviewing. Theres a switching power supply module in this board (red rectangle). switching power supply used: https://pt.aliexpress.com/item/220-v-a-3-3-v-5-9-12-...
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1answer
42 views

SMT electret microhone PCB mounting [closed]

I see a lot of SMT microphones in vendors' lineups. All of them orient normal to the PCB--either up or down. I'm working on a design where the microphone has to point parallel to the PCB. On the ...
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87 views

How important is it to track from centre of pad in PCB routing?

When reading through the review comments of a PCB, there was one which raised some questions for me: "Aim to route tracks out of pad centres and in line with the pad, not exiting at an angle." I ...
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66 views

High current on PCB to through hole connector

If I have a though-hole connector with 3.5mm pin spacing and the manufacture rates it for 14 amps per contact, how am I supposed to safely carry anywhere near that current over the PCB? Specifically, ...
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Marchand balun layout

For this marchand balun schematics in ADS, how to instruct the ADS layout generator to use coil shape (for area saving in IC) ? Besides, anyone have any experience with planar layout of marchand ...
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how will a connector affect a transmission line?

I am laying out an RS485 driver and read a few design guides which recommend a 120 Ohm termination resistor. This makes sense since the characteristic impedance of twisted pair cables is in the 100 ...
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3answers
109 views

RF loop Antenna design layout

I am designing a bioimplantable circuit for a biomedical implant. The goal is to have an extremely tiny device in a flexible substrate (Dupont Pyralux) that must be powered wirelessly. My problem ...
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Highlighting feature of any net becomes latched on in Altium 17.1 PcbDocs

When routing a net, highlighting of startpoint/endpoints is great, but when a net I am no longer working on remains highlighted, it becomes an annoyance. This is happening multiple times a day and the ...
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100 views

Differential pairs; length matching between pairs

I'm currently busy routing a high speed design containing MIPI signals @ 2,5Gbit / lane to a connector on an 8 layer board. As MIPI also contains a clock pair, it is advisable to match the length ...
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7030 SMD LED pad configuration

I have not done a lot of work with SMD LEDs and have a question about the pad layout. I have done quite a bit of research and haven't found much helpful info yet. I am working with 7030 SMD LEDs ...
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34 views

Unlock movement/edit of internal polygon layers in altium 19?

I changed an internal plane to a signal layer and now I want to be able to move objects in this layers like polygon, however I seem to be unable to do so. How can I unlock polygon move/edit in this ...
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71 views

EAGLE Names not showing up on board after footprint update

I added the >NAME attribute to the footprint of a device and now the names are not shown on the board. I have already tried to update the library (with library --> update all) and also the replace ...
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136 views

PCB input smoothing capacitor layout

I got some 0.1uF ceramic capacitor in front of my mcu IO pins to smooth the inputs values/spikes I was wondering if this placement is bad or not because their position is "over" the input so maybe (...
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1answer
69 views

Compare (Diff) ODB++ Files

A few years ago I was making layout changes to a PCB and wanted to be 100% sure that one particular interface did not change at all. My layout contractor generated an ODB++ compare file (I would also ...
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1answer
40 views

how to confirm that PCB Ethernet layout does not affect perfornace

short version: - How to test if ethernet traces on PCB causing any distortions to the signal? - Is it possible to generate ethernet signals from a windows computer and measure them with an ...
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1answer
144 views

ESP-WROOM-32 layout USB-UART

I want my layout will include female headers to connect CP2102 MICRO USB to UART TTL Module 6Pin so I could just 'stick' it to my PCB while uploading the code. The 5V for the ESP will be supply from ...
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97 views

Ground planes disposition in Ethernet connection

I am designing a board that will have sensible analog signals and a processor communicating with the external word via Ethernet and I want to avoid that common mode currents couple into my analog ...
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Cheap RF 433.92MHz design, PCB track antenna [duplicate]

I'm doing a RF remote control project using a PCB with microcontroller and with simple onboard antenna layout as transmitter and a 433.92MHz receiver RWS-371F-6 model. Here is the datasheet of the ...
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1answer
53 views

On-PCB SPI Distance Considerations

I've been reading about ringing and overshooting and all sorts of things, but all without getting a real "feeling" for how likely these things are to affect my circuit. I've got a chip generating an ...
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65 views

Can I bridge output IO's from an FPGA that is driving a clock source to drive longer tracks?

Scenario I have a motherboard and a daughterboard that couple through two headers. The motherboard has a 16x16 array of ultrasound speakers each with their own drivers, that works. I drive them ...
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125 views

UnRouted Net Constraint in Altium after Via Stitching

I am just wrapping up my Design of one of my project in Altium 17. I was done with adding ...
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2answers
276 views

12V to 5V buck converter 3A PCB

I am creating my first 12V to 5V buck converter with the TI TPS56339. I've heard that the PCB layout is critical and before I send the PCB to production I wanted to get it reviewd. I tried my best to ...
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1answer
139 views

Use of internal PCB ground plane as ESD baseplate/EMC reference plane of product in plastic enclosure

I am designing an electronic product which will be housed in a plastic (non-conductive) enclosure. There are a number of, mostly shielded, I/O cables (Copper 10/100/1000Mb/s Ethernet, USB 2.0, RS232, ...
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229 views

Connecting the Chassis Ground and Signal Ground in my PCB

I have been reading alot of questions on this site to clear my understanding on Chassis, Signal Ground, ...
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3answers
422 views

Modifying land patterns generated with IPC-7351B wizard

I generated a 4x4mm 0.45mm pitch QFN28 according to the Atmega328P datasheet: However, the pads on the corners (1+28, 21+22, 14+15, 7+8) are too close to each other, less than 0.2mm apart (when ...
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2answers
176 views

Using polygon pours for small signals in PCB design

I'm trying to improve my PCB routing skills. When I started out a few years back, I just layed out the components and ran tracks with a fixed width between them. I didn't even know about polygon pours....
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82 views

What happens if two N-wells touch each other?

When designing the layout of a CMOS inverter, we need to use an NWELL to build the PMOS. Following scalable rules, when desining the masks I have to be sure that if I want to build two NWELLS using ...
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57 views

PE pin position

I have one question. I'm designing a PCB which is a sort of smart switch (so, basically, you have one 230V input and one 230V output, where the output and the input share two wires, N and PE, and the ...
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138 views

How to separate ground efficiently in a thyristor circuit controlled by sensitive microcontroller

I've been trying to design capacitive discharge ignition circuits using a microcontroller ARM (Texas and ST) without success. Each circuit using them presents intereference problems during spark ...
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How to simulate a piezoresistive pressure sensing MEMs layout without COMSOL?

I have a masks layout of a Piezoresistive MEMs pressure device that I've designed in LEdit(Tanner Tools Eda). The device consists of 4 piezoresistors bonded onto a thin diaphragm which deforms ...
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168 views

IC layouts - Transistors (Body)

I'm trying to get into IC layouts... Why do I see some IC layouts with or without the body terminal on the transistors. Do MOSFet transistors need a body terminal in an integrated circuit? Or should ...
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1answer
63 views

SATA 2.0 to M.2 (NGFF) design

I am designing a PCB with a A20 (allwinner) SoC. This SoC has a SATA 2.0 host (RXP RXM TXP TXM) that I have to route to a M.2 "M" key connector. I found only one source for pin out, but I can't find ...