Questions tagged [layout]

Layout is the process of designing a PCB including placement of parts and routing of traces.

63 questions with no upvoted or accepted answers
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7030 SMD LED pad configuration

I have not done a lot of work with SMD LEDs and have a question about the pad layout. I have done quite a bit of research and haven't found much helpful info yet. I am working with 7030 SMD LEDs ...
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235 views

SMPS Layout, capacitors in parallel placement

I'm laying out a buck converter based on the TPS54308, and the datasheet recommends the following, which I'm trying to replicate: Webench (the interactive design tool by TI), however, recommends 2 ...
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150 views

Why would a wireless smart card antenna have one larger loop and three smaller loops instead of four similar size loops?

This image is originally from here. I added some annotations. The picture shows an x-ray shot of a smart card with wireless capability (and also a contact pad for direct connection to a terminal). ...
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213 views

PCB layouts and polygon pours

I have been told that when laying out a PCB to keep all the polygon pours uniform on each layer. So, for example, in a corner of the PCB, you do not want the pour on one layer slightly offset relative ...
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30 views

Check my battery powered layout

Few days ago I had topic about issue with power inductor crashing circuit. I almost resolved issue without making new by 90%. However sometimes circuit crashes -> I did some updates based on replies. ...
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237 views

GSM noise from a 2-layer PCB with SIM800C

I've designed a 2-layer PCB that contains a 12-5V buck converter (P2576L-50 - a Clone of the LM2576), 3.3 (AP1117-33) and 4V (MIC29302WU) shunt regulators, an STM32 micro and a SIM800C GSM module. ...
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389 views

GDS, OASIS, etc. vs LEF/DEF: which is better?

I have two questions here. By the way, I have searched about the differences but I wanna know more. So, Can LEF/DEF format describe everything that GDS, OASIS, etc. formats, can? What can I do with ...
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2answers
78 views

Eagle insists on marking up spaces which are larger than the minimum specified in the DRC rule

This is what my clearance rule looks like: My grid distance looks like this: And the final result, after DRC, looks like this: As you can see, although not by a very large margin, the distance is ...
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1answer
89 views

LM2678 PCB Layout question / review

After my initial question about switching regulators I had decided on trying to use an LM2678 for an adjustable/variable voltage form 5-24V and 5A max with an input of ~30VDC. The application will be ...
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1answer
41 views

How to connect multiple star points and ground zone together on PCB?

I have designed this PCB layout for an all analog Op Amp circuit plus LM386 for headphones pictured right in the yellow section: Are we allowed to have multiple star points, as I have on the PCB? And ...
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70 views

SMD oscillator and decoupling caps placement/routing

I want to design a four-layer board with a PIC32MM0256GPM048T microcontroller. All components must be on the top of the board. I tried routing OSC1 (osc in) and OSC2 (osc out) lines, and placing the ...
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1answer
46 views

Allegro padstack not showing my pads

I have implemented a schematic for an IC (BGM13S32F512GA-V2R) and I am trying to create a footprint but when I try to place the padstacks, they do not appear in the default library... so I went into ...
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2answers
84 views

How can I reduce noise caused by shift register updates?

I have a couple of designs using 74HC595BQ-Q100,115 shift registers. Some are using the SO-16 package, some the DHVQFN16. Some have five shift registers, some have three. ALL have a significant ...
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50 views

analog and digital ground connection point selection

I've read some articles that say the connection point of digital ground and analog ground should be at the power supply output port. However, when there are two or more power supplies which are ...
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68 views

Marchand balun layout

For this marchand balun schematics in ADS, how to instruct the ADS layout generator to use coil shape (for area saving in IC) ? Besides, anyone have any experience with planar layout of marchand ...
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2answers
274 views

PCB input smoothing capacitor layout

I got some 0.1uF ceramic capacitor in front of my mcu IO pins to smooth the inputs values/spikes I was wondering if this placement is bad or not because their position is "over" the input so maybe (...
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1answer
437 views

Use of internal PCB ground plane as ESD baseplate/EMC reference plane of product in plastic enclosure

I am designing an electronic product which will be housed in a plastic (non-conductive) enclosure. There are a number of, mostly shielded, I/O cables (Copper 10/100/1000Mb/s Ethernet, USB 2.0, RS232, ...
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113 views

Creating a balanced dipole from two monopole chip antennas for use on small PCBs

I'm trying to use a monopole chip antenna on a PCB much smaller than the one recommended in the datasheet. I am wondering if I can get away with a much smaller board by using two monopole antennas ...
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1answer
269 views

Is there a rule for DDR4 CA signals reference plane?

I'd like to know if there is any rule for the reference plane of DDR4 CA signals in PCB layout. I saw some design guide which specify the reference plane to be VDDQ power plane for CA signals, but I'm ...
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65 views

How can I evaluate on-chip bypass-capacitor's capacity based on the topology?

The transmitter I designed has been showing lots of jitter.I think there's something wrong with the layout topology.Pad of the power supply is a little far away from the circuits by connection through ...
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48 views

Altium PCB Layout: Does each pcb footprint and trace segment have a unique identifier. Which stores information about at what time it was laid out?

Is there any information about when an element is placed on the PCB file in Altium? A unique chronologically generated ID maybe?
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375 views

Can Inkscape be used for layout editing for photolithography?

Inkscape is capable of exporting DXF files, a format that is accepted by photolithography masks manufacturers. Before I start working on layouts with Inkscape I would like to know if the exported DXF ...
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1k views

Switching power supply layout review

In a previous question where a SMPS based on an LM5118 was presented, some aspects of the layout were pointed out as being problematic. I've taken another look at the layout of that section of the ...
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149 views

Will the following circuit cause EMI-problems?

I'm trying to get a feel for which circuits will have EMI-problems and which won't. To make things a bit more concrete, I've designed a super-simple LED-blinking circuit using the PIC16F1788 micro-...
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427 views

funny shaped footprint pads & PCB123

I am using PCB123 to do a PCB layout and I have a part with some oddly shaped pads specified in the part's recommended footprint. It seems that in the footprint editor, there are only 3 options for ...
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143 views

Eagle: Circular area under component colliding with traces

I am creating a PCB layout in Eagle and I noticed that when I add in the ground plane, there are two unfilled circular areas under the usb mini type B socket. Does that area need to be empty? I ...
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35 views

Layout polygon pour connect to GND or VGND noise reduction

I am using MCP6V02 as transimpedance amplifier as shown below schematic, I want to know is it better to connect polygon pour to GND or VGND to reduce noise on the amplifier. (Below schematic is for ...
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17 views

Current sensing, clearance, trace width

I have to design simple PCB that will measure current by shunt resistor(R7, R8, R9) and voltage by divider. Board has 3xin and 3xout for different voltage/current specifications. I have the following ...
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1answer
65 views

PCB Layout - Transistor to convert analog signal to digital pulses - how to connect emitter GND

If have designed the following circuit to convert a certain analog signal of an amplifier to digital pulses. The circuit works well - except for one point. My prototype PCB has 4 of these amplifiers ...
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1answer
34 views

Can an ExpressPCB “.pcb” file be converted/imported to any other format?

I was given a .pcb file and I'd like to view it to confirm it's a valid file and at least minimally what I was expecting. ExpressPCB .pcb files are a proprietary format. I use MacOS so a native app ...
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30 views

Is it necessary to remove ground on all layers when using isolated DIO

So, I am using uptocouplers and digital isolators for a project connected to a microcontroller GPIO. I removed the ground (ground plane cutouts) under the load side of the components, is it necessary ...
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12 views

Analog CMOS IC layout: DRC, DFM, DFR

Regarding CMOS analog IC layout, what are differences between DRC, DFM and DFR? What I understood during research: DRC (Design Rule Check) - checks if a laid out block follows technology rules what ...
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39 views

Get net names from LEF files

I'm analyzing the layout of a circuit by parsing the LEF and DEF files with PyParsing (Python). I parsed everything, no problem in this part. I also have on the side the netlist of the circuit. My ...
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2answers
82 views

How to place SDRAM data-lane correctly in 4-layer PCB?

I'm thinking about the trace/lane ordering to 167Mhz SDRAM with 4-layer PCB: Now its follow: Data traces CLK (only) DQM traces Address + control + command (Ax + BAx + Strobes and CKE) Is it better ...
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31 views

what is exposed ground meaning in passive antenna layout?

Could someone help me understand what is the meaning of exposed ground in pcb layout. I'm designing layout of my project and one of the component on it is passive antenna. What does exposed ground ...
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1answer
41 views

Altium - Impedance in Signal Integrity and DRU differ

I'm desinging a very simple 4 layer board with a USB connection. I defined an impedance of 90 Ohms (differential) in the layer stackup. This gave me a track width of 0.3 mm with a gap of 0.334 mm, ...
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70 views

Microcontroller Oscillator Layout for ESD immunity

I have a small portable USB device failing ESD immunity. It's a two layer board with a solid ground plane on the bottom. I have diode protected inputs, and there's a TVS on the USB connector, and I'm ...
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21 views

LED driver logic, analog & power grounds & signal integrity

I am using a TLC920 LED driver and it has three ground pins: Logic, Analog and LED. What are some best practices for a layout with these? All three with be joined somewhere and my understanding is ...
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11 views

Poly density issues in differential pair layout

I have designed layout for differential pair in 10*10um2 of area. I have used dummies and guard ring around the differential pair to avoid PVT variation. here while running the DRC(Design Rule Check)...
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104 views

Bluetooth module PCB layout

On my PCB, I have the Bluetooth module (ANNA-B112) on the top layer. Due to space constraints, I had to put some components on the Bottom layer of the PCB beneath the Bluetooth module. The main ...
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25 views

xpedition designer

I am here to clarify regarding on schematic creation using mentor xpedition designer,I finished my schematic drawing using xpedition dx designer so now i want to take my work another level(layout) for ...
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1answer
87 views

Component case size and spacing for ESD protection circuit

As im searching for TVS diodes, I see a 30KV rated diode array has pins RIGHT next to each other. Aren't they so close that a spark can easily jump between pins?? I read a few time that you need a ...
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53 views

RF sampling ADCs(ADC12DJ3200 ),PLLS and regulators placement and layout

I am novice in PCB component placement and layout. I have just started my career in Hardware design. We have designed a schematic for Data Acquisition System. In our design, we are using three RF ...
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67 views

Pi Filter Design / Realization with 915MHz u.Fl

I'm putting a u.Fl connector into a new LoRaWAN design (915MHz). Apologies ahead of time if the scope of my questions are too wide for one post, but I think it's all closely related. I'm going to ...
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114 views

DC/DC Buck Converter PCB Layout Help

Most examples I find are for buck converters on a PCB of their own with massive traces. I want to make sure this layout is fine with the planes I'm using(both top and bottom copper pour layers are GND)...
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32 views

Highlighting feature of any net becomes latched on in Altium 17.1 PcbDocs

When routing a net, highlighting of startpoint/endpoints is great, but when a net I am no longer working on remains highlighted, it becomes an annoyance. This is happening multiple times a day and the ...
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2answers
395 views

Differential pairs; length matching between pairs

I'm currently busy routing a high speed design containing MIPI signals @ 2,5Gbit / lane to a connector on an 8 layer board. As MIPI also contains a clock pair, it is advisable to match the length ...
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1answer
72 views

Unlock movement/edit of internal polygon layers in altium 19?

I changed an internal plane to a signal layer and now I want to be able to move objects in this layers like polygon, however I seem to be unable to do so. How can I unlock polygon move/edit in this ...
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242 views

UnRouted Net Constraint in Altium after Via Stitching

I am just wrapping up my Design of one of my project in Altium 17. I was done with adding ...
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1answer
79 views

Split Ground plane with motor drivers

This is a PCB with few stepper drivers. I have a question about the ground plane. I have this idea to split the ground plane for each driver, so, I force the return path to pass through the capacitor....