Questions tagged [logic-gates]

Symbolic representation of ideal devices implementing boolean functions

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Do bubbles affect the delay?

So hello guys I am a first semester student in Computer Science. I have an exam coming up and I couldn't really find an answer whether bubbles affect the delay like inverters. The bubbles having no ...
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1answer
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Voltage drop from a logic gate?

In the following schematic with a logic-AND gate: I would expect that since the inputs are logic-high of 5V for both input A and input B, that the output would also be logic high at 5V, yet it looks ...
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Emulating Logic-AND gate

The following is an image of the AND logic gate from electronics-tutorials and my representation of that in EveryCircuit, where I've used the "Logic input" as the A/B inputs on the left (equivalent to ...
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1answer
46 views

Logic gates in a schematic

The following is an example of a Logic-And gate using two spst switches: What is the most common schematic to show a logic-and gate (without the symbol itself)? I have come across various schematics ...
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1answer
30 views

Need a modified S-R latch

I have a comparator output who is normally high and goes low from time to time. I need a latch which will change its output from high to low when the comparator's output change to low (and keep it ...
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2answers
54 views

Beginner - unable to use AND gate with buzzer and flashing light circuit

I have a circuit which needs to turn on the buzzer and flashing lights when both my switches (switch 1 and 2 left side of the circuit) are on. I was trying to do this with a AND gate but couldn't get ...
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1answer
37 views

Does RAM always use a big Mux to ‘read’ from its addresses?

I’ve designed a 64 bit (16 words * 4-Bits at each location) RAM in logic simulation software, using simple registers. I had to create a 16-to-1, 4-bit wide Mux (no mean feat) in order to ‘select’ one ...
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2answers
74 views

How do I get to a counter stops at five using logic gates?

I need a circuit to recieve the signal called "50" or "20s" and it trigger a single pulse with five seconds called "TRIP". I set up the circuit below, however, by keeping input J HIGH of the FF7473, ...
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2answers
35 views

Ignoring setup delay

In synchronised circuit, if output of first IC is connected to input of second, should I bother about setup delay or will it work just fine? If not then what about longer chain? When will be an issue ...
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1answer
61 views

FPGA elements complexity

I am confused as to the complexity of the elements shown below. What is the order of complexity of them? NOTE- this is a Pre-lab quiz which is NOT assessed, as seen by the multiple attempts allowed.
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1answer
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What IC can I use as controlled inverter [closed]

Pretty much I want to find an IC with the following structure: Inputs: I, a0...a7 Outputs: b0...b7 Where b0=a0 xor I, b1=a1 xor I, etc.
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2answers
117 views

Possible to use FPGA to emulate TTL logic ICs in existing circuit?

Is it possible to use an FPGA to emulate and 'replace' a damaged 7 series logic chip on an existing circuit board? For example, if I have a VCR or receiver that has a damaged 7 series logic IC, is ...
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Backfeed gate output to input with OR gate made out of BJT transistors is not working

I am very new into electronic. Can you please explain why looping OR gate output back to input does not work when using BJT transistors for OR gate? but it works with OR gate ICs Here is the ...
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1answer
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bjt reverse active currents

my question is on bipolar junction transistor, npn with 2 emitters, used in ttl nand gate. when in reverse active mode, and 2 emitter are in logic high, how is the collector current calculated ? since ...
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3answers
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Is it possible to design a dynamical/adaptable functionally/logically complete circuit?

Biologist here but I've been reading about functional completeness in digital logic and I am wondering if there is a universally complete circuit that can be modified to express any boolean function ...
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1answer
129 views

2n2222 can not make it work as gate

simulate this circuit – Schematic created using CircuitLab I am trying to make a simple switch with the 2N2222, so i can send 5 volts from a 3.3 V output pin on an arduino/raspberry pi. I have ...
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1answer
48 views

Using Associativity to Reduce Number of OR Gates

EDIT: I think I'm probably more confused than I realise. My question could also be phrased as "how was the given diagram constructed from the expression, particularly with reference to the OR gates?" ...
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1answer
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Need help understanding how to calculate tpd while static hazards are involved

I need help understanding how to calculate tpd while static hazards are involved, Given this circuit: (the output F is constant 0) I found out that if X and Y are initated to 0 and we change Y to 1 ...
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2answers
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A logic circuit with a NOT condition

I have the following problem to solve and Im a bit confused: I have a ceramic factory that is based on a circuit with 4 outputs: timer that outputs "1" when the oven is on (timer) sensor that ...
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2answers
52 views

Nor gate using photodiodes and transistors doesn't work correctly

I'm creating a circuit for a robot to avoid obstacles. It is created without using any ICs. When the robot meets an obstacle the LED (at the right side of the transistors) should be off because of ...
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1answer
81 views

Solving CMOS logic structures

Can somebody please help me with understanding how to derive the equation from the red box from included picture (the other equations are trivial, it's just the right usage of De'Morgan's law)? I am ...
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2answers
193 views

What is the purpose of this AND gate in an audio amplifier

I am analyzing the below audio amplifier circuit (from 4D Systems) and I am trying to figure out, what is the purpose of the positive AND gate (SN74LVC1G08) which connects to the audio input signal? ...
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2answers
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logic gates combined with R-C network often violates absolute max ratings, does that hurt?

I know the theory but don't have much practice with this, so while I am experimenting with little success I ran into this question: what are the bad effects by violating the Absolute Maximum Ratings ...
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1answer
170 views

What is Hang Input in Logic Design?

When it comes in Digital Logic Design using IC (Integrated-Circuit) what is the term HANG Input means? what does it do? and how will it affect the output of the IC?
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1answer
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building a 3 input logic gate combination bounded by a simple if else statement

For 3 variables x,y,z and output w I need help buiding a ...
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10answers
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What is a logic gate? [duplicate]

Wikipedia says that it is a idealized or physical device that implements the Boolean function. By this definition I tend to think every digital circuits (say a counter or encoder) as a logic gate. ...
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Increase signal voltage before Raspberry Pi

Another newbie question. I want to send a signal to a raspberry pi zero but I don’t have enough “signal-power” I have a Adafruit Powerbooster 1000c. It basically takes power from a micro USB, a ...
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1answer
83 views

1's complement of a number using logic gates

If I want to code a signed number into 2's complement I should use a XOR gate like this: (Consider that A is an 8-bit input) But if I want to code it in 1's complement how should I implement it in a ...
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2answers
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Is there a difference between connecting the input of a logic gate to the anode or cathode of LED

I am still learning about basic circuit analysis and I was wondering if there is a difference between the two circuits in real life. Technically the polarity at the anode of the LED will be higher ...
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Do I understand the off state (0/0) of an SR latch correctly? [duplicate]

Can someone please confirm if I understand this correctly: When neither R nor S are on (both are 0) it seems to me that at first both outputs are 1, then it feeds back through, and both go to 0, and ...
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1answer
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How do I know which logic gate I use to reset asynchronous counter?

I'm a High School senior. Our new teacher doesn't teach well at all and we have a test this Thursday. I don't know which gate to use with the counter(with JK flip-flops) to reset it. Or to set it(To ...
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1answer
36 views

What are some good logic simulators for experimenting with multiplexers? [closed]

We've been tasked with showing the numbers on a 7-segment led display with dual 4x1 multiplexers and 3 variables. Our first try was a failure and we won't have the opportunity to experiment in the ...
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Worst case scenerio in carry skip adder?

I am having trouble understanding this. worst case operation time takes place when carry is generated in the first block carry skips intermediate stages carry is killed in the last ...
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1answer
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Chaser circuit with a chain of 4017's

I have a problem with this chaser circuit. It should work like this: When I switch on the power, no outputs should be activated. When I press the reset button, the clock signal will be started and ...
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1answer
43 views

Calculating resistance for integrated circuit with logical gates, so that the circuit works properly

I have found this task with its solution: For the circuit shown below calculate \$R\$ so that the circuit works properly. All gates belong to the \$TTL\$ series. Solution: $$\begin{...
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3answers
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Making a electronic alphabet locker that lock gift to friends [closed]

Imagine you are giving a gift to someone, but you want them to solve your question and enter your secrete password. You want the password to be entered in order and if touch any other will fail. ...
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2answers
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logic gate's open drain output pulled to voltage higher than supply voltage

I am using 74AHC1G09, it has an open drain output. It says the maximum Vo is 7V, but also says "The input and output voltage ratings may be exceeded if the input and output current ratings are ...
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1answer
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Realize using NOR gates only?

I came across a question regarding logic gates and I can't understand how to solve it. Q) Construct the truth table and write the boolean output equation. i) Realize using NOR gates only: $$f(A,B,...
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1answer
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Boolean expression question

So im kinda curious which this would be. I have a question to turn a Boolean expression into a logic circuit which I have no issues doing but im a little confused about this question. I will leave an ...
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2answers
92 views

Logic Implementation

I need to implement a circuit but Im having some trouble since Im novice on electronics. I have 4 inputs. A being ON/OFF switch. B is an Inibitor. C is an Emergency and D is not an adequate ocasion. ...
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1answer
68 views

How implement this logic?

I have 3 logic input called: I1, I2, I3 and 1 ouput logic call OP. I need: 1/ When I3 set Low, OP is High, not depend on I1, I2 's state which mean even I1 or I2 state is Low or High, OP keep High. ...
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1answer
86 views

Design this memory with D Flip-Flops

Design the following memory with D Flip-Flops. (you can use other gates or decoder if needed) The following memory has 4 one-bit locations and can access 2 locations in each moment and read from ...
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Fast Arbiters for On-Chip Network Switches

For "Fast Arbiters for On-Chip Network Switches", what is the difference between Proposed-I and Proposed-II topologies?
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1answer
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Are Tri-state buffers even necessary?

I'm trying to make a 1-bit computer, and I'm stuck on the registers. I think I am going to have 2 of them, and I want a way to separate their outputs. Let me explain. Let's say Register A has a 0, and ...
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1answer
118 views

How do I convert a Karnaugh map into a Logic gate circuit?

Ok, so I currently have some questions that I need to work out in uni, ive basically been given 2 lengthy boolean expressions and I need to simplify them. Question a I feel like ive done right but ...
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9answers
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What is the process of going from machine code to electrically controlling individual transistors? [closed]

For someone who writes software but doesn't have a computer engineering background, the dozens of abstraction layers have always bewildered me. I know all source code in their most fundamental level ...
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1answer
88 views

Finding frequency of a series of pulses (3 - 60 Hz) without using a microcontroller or frequency-to-voltage converter

I came across an interesting yet challenging problem of finding the frequency of a series of pulses. The pulses can have a frequency anywhere from 1 to more than 100 Hz. The goal is to detect if the ...
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2answers
130 views

What will happen if I initially set J=K=Clk=1 in this circuit?

Will it remain in the state \$Q = Q-bar = 0\$ as the feedback given back will always be zero? Will this lock the JK in this state as long as the \$V_cc\$ is connected? Note: I have used the word ...
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1answer
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Why is there no race around condition in NOR SR latch when S=R=0(initially)?

When the IC gets connected to the Vcc+, both the NOR gates get the input 0 and 0 (low) which yields the output 1. Now since both the outputs are again connected as one of the input to each of the NOR ...
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3answers
588 views

Using HC/HCT, AHC/AHCT series logic

I am builing a circuit, and i need to connect a few different IC's (obiosly). My circuit is based on 5V TTL logic and i found a part that is made only in AHC/AHCT variant. So let's take it from the ...

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