Questions tagged [logic-gates]
Symbolic representation of ideal devices implementing boolean functions
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Schmitt triggers hysteresis symbols
So we're studying Schmitt triggers at university and we got these representations. Searched them on google for more info and got other representations. Now I'm confused. Can anyone help me with some ...
7
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3answers
2k views
Why do TTL integrated circuits have such complicated schematics for logic gates with so many transistors as opposed to RTL?
I'm in the process of building a 4 bit computer out of discrete NPN BJTs and resistors. I'm using RTL, and I've made flip flops, full adders, and demultiplexers, and everything is working fine so far. ...
1
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1answer
29 views
Pull down for 74HCTXX series logic ICs
I am building an adder with standard 74HC/HCT series logic ICs. I see the result when input pins are left floating are erroneous. Shall I have to connect some pull down resistors. Thank you.
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2answers
52 views
Use LED as a latching diode
I am working with 74HC08 (AND gate chip). I have to assemble my circuit according to following image:
Everything works fine, but I have suddenly a fancy idea to replace 1N4148 diodes with low-power ...
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0answers
47 views
Estimating gate or transistor count for an IC
I'm messing around with calculating predicted failure rates using MIL-HDBK-217F. For microcircuits (depending on linear or digital) you need to come up with a gate count or a transistor count for the ...
15
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3answers
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Why am I Seeing A Weird “Notch” on the Data Line For Some Logical 1s?
I'm attempting to build a Z80 homebrew computer for some retrocomputing fun and to teach myself the basis of electronic design. For proof-of-concept, I've already assembled a basic system on ...
1
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0answers
49 views
Can an OR gate be made using 2 XOR and 1 and gate?
Hello i was wondering if an OR gate can be made using 2 XOR gates and 1 AND gate.
as i got this question in one of my exams a few days ago.
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1answer
39 views
Where I can find a list of logic gates with non-inverted output?
I'm doing my homework, where I need to build a pulse duration counter device. I've done it, but now I understand, that every time I build parts of the device, I have to specify the chip, that contains ...
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1answer
43 views
Finding out the values in a truth table for a SR-Latch [closed]
My task is to fill in this table the output Q by analysing following circuit
My suggestion would be:
Would that idea be right?
in the digital electronics means: S=1 => Q=1 and R=1 => Q=0
Edit: My ...
0
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2answers
54 views
K-maps for forming 8bit binary to 8bit BCD digital circuit
I have been trying to convert 8bit binary to 8bit BCD. The circuit I have been working on is below:
I built a 4bit binary to 5bit BCD converter using a similar truth table like the one here:
Do I ...
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0answers
35 views
Designing 4-bit prime checker with Demultiplexer
I found a question that wanted to design a 4-bit (A B C D) prime checker (2,3,5,7,11,13) with 2 Demultiplexer (1-to-8 DEMUX). (And minimum amount of other gates).
I know one way is connecting "B C D"...
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1answer
57 views
How to select 8 bits?
I am working on a simple counter that takes start, stop and increment values as decimal inputs. Here's the circuitry of the start value input of my counter:
What the whole counter does is count from ...
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4answers
149 views
what is the triangle component in electronics?
From the following image we can see 3 triangle symbols:
looking to the triangle to the right i suppose it is a voltage buffer, but the ones at the left have 2 inputs. What are they?
This image is ...
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0answers
12 views
Deriving state table /equation confused
A sequential circuit has two JK flip-flops A and B, two inputs x and y, and one output z. The flip- flop input equations and circuit output equation are
JA = BX+B'Y' KA = B'xy'
JB = A'x KB = A +...
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1answer
40 views
3 Input XNOR gate made with XOR and not gates [duplicate]
hi i have implemented this equation with XOR and Not gate but i'm not getting the correct answers
(A.B.C)+(A'.B'.C')
What is the Problem ?
thank you
1
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1answer
91 views
Logic gate on negative signals
I need a logic gate to check if A or B or C is negative voltage (referenced to the ground).
It does not matter if the output is positive or negative logic (as long as it is in positive voltages)
Does ...
1
vote
1answer
35 views
How can I draw the diagram using few decoders for this truth table?
For the truth table above, abc is the input and xyz is the output.
I do know how to draw the diagram using a decoder in case of when I have only one output.
How can I draw the diagram using a decoder ...
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1answer
40 views
Finding functions for JK / D / T flip flops
I am trying to understand this concept of flip flops. Given some Karnaugh Map, all I need to know is how to find the functions of various flip-flop types:
sr flip-flop (\$s = \text{ ??} \quad r = \...
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1answer
21 views
Implementing function with NAND only quickest way
I'm trying to remind myself how to implement given function or karnaugh map with NAND or NOR gates. I remember how DeMorgan's laws work.
Let's say I have some Karnaugh Map and I want to implement the ...
6
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3answers
1k views
Detect the first rising edge of 3 input signals
I have 3 input signals which are pulse waveforms The output is switch to high once once all 3 first rising edges of 3 inputs are detected.
Is there a digital circuit from logic gates, flip flop that ...
0
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1answer
46 views
Disjunctive Normal Form
The boolean expression:
y= (a'+b) * (b(c'+d')) = (a'+b) * (bc' + bd')
is given.
Find out the disjunctive normal form to this boolean expression.
My suggestion:
y= a'bc'd' + a'bc'd + a'bcd' + abc'...
-4
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1answer
70 views
logic gates, implementation [duplicate]
Task: Draw an AND circuit with 8 inputs, a circuit which implements the expression a∧b∧c∧d∧e∧f∧g∧h.
Condition: Use only NOR-Gates with two inputs to solve this task.
Could anyone give me a hint, ...
6
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5answers
2k views
How does a NAND gate work? (Very basic question)
I'll preface this question by saying that I am a software developer just starting to learn the basics of electronics, so it's very likely I'm missing some fundamental intuition here.
Below is a ...
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2answers
54 views
Inverting input of 555 timer
The common 555 timer triggers the output when the trigger signal falls down. Although this is not a problem, I want it to do the opposite, which is to trigger when the signal that controls the 555 ...
0
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1answer
74 views
Exclusive OR Proof
I’m given a question and its to prove exclusive OR can be the equivalent of using a NAND, OR and a AND gate show in the Boolean equation.
$$A \oplus B = (A+B) \cdot (\overline{AB})$$
But when I look ...
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0answers
51 views
Can a classical Toffoli gate be built from irreversible gates?
The Toffoli gate is a reversible gate with three inputs (A, B, C) and three outputs (S1, S2, S3) generated as
S1 = A
S2 = B
S3 = AB ^ C
It can be implemented in a classic way using the following ...
0
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1answer
64 views
boolean algebra question regarding how to simplify a 5 input circuit
Background:
I'm teaching myself computer architecture because I do not have a technical degree and want to learn this even though my finances won't ever allow me to have a formal education. I am doing ...
3
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4answers
687 views
Truth table with logical gates for a traffic light
I want to create this truth table:
So I tried this but I was not able to get the last row, which is:
While a =1 and b =1 ,yellow = 1 red = 0 and green = 0.
This is my design for it, but I could ...
0
votes
3answers
82 views
Why is my Gated Latch not a Gated Latch?
After watching the excellent Carrie Anne's Crash Course Computer Science #6 (https://www.youtube.com/watch?v=fpnE6UAfbtU), I tried to design a Gated Latch in Logicly.
I played with it a little, and ...
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0answers
64 views
Stable states in Flip Flop
I had seen that flip flop have two stable states 1,0 and 0,1 as output. Why are 1, 1 or 0,0 is not a stable state? Or what do you mean by a stable state here?
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1answer
43 views
Logic behind this automatic gate light
I was doing this circuit which I found on the Internet. My question is what is the logic behind the functioning of this circuit? Thanks!
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2answers
62 views
Implementing logic expression and the truth table of logic function
(a) Expression for \$Z\$
\$Z=(B+\overline{C})A+B(C+\overline{D})+BD\$
\$Z=AB+A\overline{C}+BC+B\overline{D}+BD\$
\$Z=AB+\overline{A}C+B\$
\$Z=B+A\overline{C}\$
(b) Truth table
...
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2answers
53 views
Can not get the IC version of some gates to show up in KiCad
I don't know if this is a problem with the software i am running, or the way i am trying to go about doing this. But every time i try to place the 74LS04 IC in Eschema it only shows the option to ...
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4answers
83 views
Driving a 74HC series chip with a 74LS series
I made a mistake and accidentally bought a 74LS AND gate: this one. My other chips are 74HCs. I need the output of one of the AND gates to drive the clock signal on a JK flip-flop: this one. ...
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1answer
84 views
Having trouble determining circuit purpose
My apologies if this is the wrong section.
I am having trouble trying to determine the purpose of circuit. As in, what would this circuit be useful for, if it was installed in a logic board.
The ...
2
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2answers
64 views
Can CML differential signal lines be flipped to act as a NOT gate?
If I want to invert a CML differential D-Flip Flop (Ex: hmc747lc3c) output before entering into a CML Counter(Ex: MC10EP016), is it as simple as flipping the signal lines before entering the counter? ...
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1answer
66 views
Identifying this logic gate
Could somebody please explain the two logic gates with only the one input, A and B, respectively??
It is a NAND gate, with a box just before it.
What is this box?
Why only one input?
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0answers
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Creating coder of MFM linear code (Miller) using logic gates
I have a problem with the implementation of my MFM encoder using logic gates (in the CEDAR program). It's not working correctly, and I don't know if this is software problem, or if I'm doing something ...
0
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2answers
94 views
MOSFET logic gates: Putting the pieces together
So I got this problem.
And I know MOSFETs...Sort of.
So the area in red is a NAND gate and the area in blue is an Inverter...I think?
So I know what those two pieces are, now how do those connect? ...
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3answers
109 views
7432 behaves like an AND gate & 7408 behaves like an OR gate
Ok. First of all, I'm an absolute beginner about IC and circuits.
If you will view the pictures, you will notice that the 7432 behaves like an AND gate and the 7408 behaves like an OR gate.
PS. I ...
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0answers
43 views
4 bit to 4 bit subtractor logic gates problem
I'm trying to create a 4 bit by 4 bit subtractor here but I get wrong output. In the picture it shows that 0000-1111=10001 which should be 0000-1111=11111. Please help me.
By the way the rightmost IC ...
0
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1answer
81 views
Latching switch to single pulse circuit? (monostable multivibrator with 555?)
I am looking at using a latching switch (SPDT) to momentarily connect two pins. This is for a power button for a raspberry pi, so to power the machine from a hold state you have to momentarily short ...
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1answer
93 views
BCD code Detector
So basically I'm trying to design the circuit for a BCD code detector which should have 4 inputs and gives an output of 1 if the equivalent decimal is 0<=input<=9.
Else, it should give zero.
...
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4answers
101 views
TTL Logic for displaying large 7-segment values [closed]
For fun, I was trying to imagine how I might implement large values in 74 series logic (or any commonly available discrete logic from the 1970s). An example might be displaying prime numbers up to ...
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0answers
72 views
Building a 6-inputs XOR gate with only 12 AND/OR gates
I would like to compute a 6-input XOR gate with only 12 AND/OR gates, any number of inverters can be used. I failed to find any optimization with the K-map and so far I can only decompose it with 13 ...
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0answers
36 views
1-bit maximum selector (iterative design)
I'm trying to create a 1-bit maximum value selector with an iterative design that can solve larger problems. I understand that I go from the most significant bit (MSB) to the least significant (LSB), ...
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2answers
54 views
percision timing ratio of multiple lights blinking with different durations and intervals
I'm learning a lot of this as I go, my background is mostly in programming. I'm trying to setup a timing circuit for two sets of lights going into a model, and am trying to determine the best way to ...
0
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3answers
55 views
TTL square wave inverter adjustable duty cycle
I am an amateur and I don't have experience with logic circuits so please forgive me if this is very simple.
I have a 5V TTL crystal oscillator (4-pin). I need to create a second square wave from it ...
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0answers
49 views
Performance issues when using CMOS SR Latch with 180nm transistor models in circuit simulator
I am trying to incorporate a CMOS SR latch made with 180nm Level +49 transistors into a larger circuit but am running into issues. I am hoping this community can point me in the right direction of ...
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5answers
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Why does a single AND gate need 60 transistors?
Looking at the datasheet for the MC74VHC1G08, under the features section, it states Chip Complexity: FETs = 62.
Why does this IC need 62 transistors, while an AND ...
