Questions tagged [logic-gates]
Symbolic representation of ideal devices implementing boolean functions
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Diodes needed (parts) for OR gate automotive relay circuit
I need to power up a make-or-break simple automotive relay (4pin, 40A 12V) via an OR gate.
OR gate as follows:
Source 1 is the cable that provides +12V to activate car dome light which I will tap ...
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How can I implement this function with JK flip-flop + NAND gates?
I need to design a mod-5 up/down counter with control input x. When x = 0 it will count down, and when x = 1 it will count up. I'm allowed to use only a JK flip-flop and NAND gates. Complement of x is ...
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Master-Slave JK Flip Flop Truth Table
In my computer logic and design class, we have gone over the different types of flip flops and their representations. I understand what the goal of the master-slave configuration is but I am having ...
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Help needed Creating a truth table and a logic circuit using a statement given [closed]
i have gotten this question in my assignment, i'm quite confused about this and don't know where and how to start doing it, any help is appreciated
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How to convert logic gates to multiplexer in a circuit?
In one of my previous questions, I wanted to know what integrated circuit I could use to replace my logic gates in the circuit below:
The accepted answer helps me to redesign my circuit and replace ...
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How does a two input transistor AND gate work?
I'm trying to self study electronics. I started reading a book on digital electronics and I got stuck on the first chapter. It's about the logic gate circuit. There is a two input AND gate circuit ...
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Do MOSFET logic gates necessarily need an N channel MOSFET?
I've been studying CMOS logic gate design, such as an inverter here:
Why do we need the N-channel MOSFET at the bottom at all? Couldn't it be replaced with a simple resistor into ground like this?
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How do I make a gate with only one condition?
I need a simple gate with one condition only but with two ends, if its given 10V it will deliver a square wave from an oscillator I've built, if not then it will deliver a wave from a signal generator,...
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9T SRAM Circuit Supporting 1-bit Multiplication
I was reading a paper that added a 3T NAND gate, consisting of two NMOS and one PMOS, to the regular 6T SRAM, achieving 1-bit multiplication. However, I'm struggling to understand how the NAND part of ...
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I keep coming across the term "bubble pushing in logic gates."
Can anyone please simply explain to me what it is? A simple little lesson or answer would be appreciated.
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SR flip-flop with Preset and Clear should not work as described
In the presented flip-flop, suppose the Enable signal is high, the S is low, and R is high. Now we set the Preset low (0) and the Clear high (1). In this condition, we expect Q=1 and Q'=0.
But ...
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Is there any way to know how real discrete components are being connected to each other using logical gates?
Let's say we created some gates or something with VHDL. How can I convert that code into those diagrams that show how discrete components (such as transistors and resistors) are connected to each ...
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Logisim shows output as X, even though the gate is connected
Below is a basic NOT circuit using a NAND gate.
Not sure why output is X, when I change Output properties to three state no, I can't modify circuit.
Sometimes, these issues go away when I restart ...
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Tri-state buffer, why is it called high-impedance?
I found this picture of a tri-state buffer:
When the enable signal is 0, the output is disconnected from the voltage sources. But why is this called high-impedance? From what I understand impedance ...
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12 transistor XOR CMOS gate
I have come across this circuit for an XOR gate (see below) using 12 transistors in CMOS technology. I am having trouble understanding the circuit, mainly in identifying the logic gates.
I know that ...
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Logic gate biasing a BJT (again)
The following schematic shows a PNP BJT driven by the output of a logic gate. When the logic gate output is high the transistor must be off, and only be activated when the logic goes low.
The problem ...
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How do I make a gate diagram for \$a'c'+abc+ac'\$? [closed]
I have checked with the program Logic Friday and it checked the shown gate diagram, which showed me another result and came with this gate diagram:
Is this the correct answer?
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Can I implement addition and subtraction in different operations using a MUX?
I'm building a 16-bit ALU that needs to be able to perform logical AND, OR, add, subtract and rotate one bit to the left.
I need to have addition and subtraction operate with different op codes ...
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555 timer and JK flip-flop activation problem
I need to toggle a MOSFET after I hold a button for 3 seconds. Here is my circuit:
I have a JK flip-flop for the toggle function. When the clock pin of the JK flip-flop goes high to low, output of ...
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Why would I use HNM (high noise margin) gate drive over a TTL gate drive for DC motor driving application?
I am making a very simple half bridge DC motor drive using the MAX1760 gate driver. Looking through the datasheet I saw that it offers two types of logic level technologies (if that's the right word?);...
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Is it possible to create a logic gate design for a clocked D flip-flop register where there is a synchronous reset and an enable pin?
I'm currently designing a register where there needs to exist a data input pin (DIN), Clock (CLK), Reset (RST), and a RUN pin. The register is designed such that, only at positive edges of the clock ...
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Does taking dual of a boolean expression also result in its complement?
I was revisiting XOR and XNOR and the form of their different equations.
XOR = A ⊕ B = A'B + AB'
I took the dual of it:
Dual of XOR
= (A'+B) (A + B')
= AA' + AB + A'B' + BB'
= AB + A'B'
This is ...
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RS (NOR) flip flop stuck at undefined
I'm trying to make an asynchronic automata which outputs every other impulse (any amount of 1's) from input ( 0 in any other state).Heres states table:
...
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Unknown logic gate on circuit
I'm studying the CMI decoder circuit from Maniatopoulos, Antonakopoulos and Makios, 1995, but I can't understand some symbols in the diagram. They look like a small logical OR. Can anyone tell me what ...
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Which is the preferred circuit layout? Horizontal vs. Vertical (Combinational logic)
I have 2 equivalent circuits
Picture 1 (Compact, a bit messier)
Picture 2 (Easier to read, less compact)
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Design this memory with D flip-flops
Design the following memory with D flip-flops (you can use other gates or decoders if needed).
The following memory has 4 one-bit locations and can access 2 locations at each moment and read from ...
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I need to make an OR-gate
I have 3 kOhms resistors, one voltage (5 V), 2 switches so I can control my input.
Can someone help me?
I need to do like this:
I have done this so far:
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Please explain how this XNOR gate works
As S1 is 1 (5 V) and S2 is 0 (0 V) then D1 is conducting, D3 and D4 are reverse biased, and D2 is conducting. Q1 is switched over and shuts the output to 0 V via D2 and S2, etc. All states. Could ...
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FPGA: How do LUT's change their logic
I've looked at a couple of posts on this topic, but I can't really get a feel to them. Does the LUT have an input where the logic address is given, or does the LUT read from the D Latch? If anyone has ...
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Multi-level circuit simple NAND conversion: Why keep non-NAND symbols?
I am working on understanding the NAND conversion. I have just got the basics of two-level NAND conversion, and when I went to the book example for a multi-level NAND conversion it used solved an ...
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Finding the SOP expression for the XOR gate and the circuit for it
Would the sum of products expression look like so:
\$\overline{A}\cdot B+A\cdot\overline{B}=Z\$ ? And the corresponding circuit should look like so?
Sorry for the bad drawing. I'm just wondering if ...
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Designing a 4-bit adder-subtractor circuit
I am designing a 4-bit adder-subtractor circuit using CMOS technology.
The instructions I was given for the design portion are as follows:
Given two 4-bit positive binary numbers A and B, you are to ...
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How do I integrate this MOSFET NOR logic gate with my circuit?
I have got an H bridge circuit controlled by a bridge driver (not in the schematic here). I want to control the disabling of it cutting of the conection to ground. I need the logic of a NOR gate but I ...
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Output of a logic gate when its inputs are floating
As per this answer, the output of an OR gate when one of its inputs is 1 is 1 regardless of the other inputs, even if they are floating/disconnected.
However, what is the output of an OR gate when ...
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7404 IC Always outputting high
I'm new to electronics, and it's my first time using a hex inverter.
The following pins are connected:
1(Input A)-GND or VCC
2(Output A)-LED
7-GND
14-VCC
VCC is 5V, but whatever I do the output is ...
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Clock logic for 8-bit computer
I have been in the process of remaking Ben Eater's 8-bit-computer, and have a few questions. I got to the part where the clock, which consists of 3x 555 timer, is connected with logic gates. However, ...
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Tail Light Control State Diagram
I am attempting to implement this tail light design first by using a state diagram. The car has 4 tail lights on each side, making a total of 8. They behave accordingly when the following inputs are ...
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Diodes for implementing digital logic
This diagram in this post is from Microelectronic Circuits by Sedra and Smith. The question corresponding to this picture asks to write a truth table with A and B as inputs and X and Y as outputs and ...
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A high-voltage logic part in PSpice
I'm trying to build the following part of a circuit:
I'm wondering what the part is that has "HI" written on it; I couldn't find it in any PSpice guide.
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Wired AND and OR question, logic levels?
In the "wired AND and OR" gates pictured can anyone explain what the voltage levels will be for each function?
For AND, I see the output is A*B and for OR, A+B. Is this correct? Also, is ...
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How to turn an LED on in an inverter circuit
I am currently trying to build an inverter circuit which turns on an LED (on a simulation before building it physically). I am using an 2N3904 NPN transistor, 5V voltage sources, a 220k and a 47k ...
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Time (Propagation delay) taken for adding 3 n-bit binary numbers using Carry Propagate Adders (Ripple carry adders)
While being introduced to carry save addition technique, I was told that the time taken for adding 3 n-bit binary numbers using ripple carry adders will be (2n+1)t_FA (Assuming we neglect the minor ...
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NAND and NOR gate, question on choice and function
I see both described in following images 1, 2 and 3. Does anyone know why image 3 has more transistors? Also, the basic advantage to using NAND or NOR gates in digital electronics?
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In the ...
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Convert And-Or Gate to only NAND Gates
I have to create a two level circuit NAND only gates for the Fibonacci from 1-8. After creating a truth table and K-Maps, I got the Function F=A'B + B'C. Then I drew the AND-OR circuit and tried to ...
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Which of these is the correct circuit for JK flip-flop
Are both of these correct ? I am seeing both of these in different places
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Using a logic driver with a 50 ohm load
I have a load which is an external trigger input of the Highland Technology T130 single-channel picosecond EOM driver (technical manual - Google Drive link) which is 50 ohm and it requires a pulse ...
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Connecting input and output to the same bus
I'm reading "But how do it know". And in register chapter, it talks about connecting both input and output pins to a bus. I tried to do it on Logisim but it shows red wires.
Can someone ...
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Transistor Not Entering in Cutoff region
I have constructed these circuits, utilizing either DTL or TTL logic, and I'm aiming to place transistors T1, T2, and T3 into the cutoff region. However, I'm currently unable to achieve this. Could ...
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How to simulate a button press on DFPlayer Mini?
I have a DFPlayer Mini with an SD card with one song on it. I want to make a circuit to power it on, and after a couple seconds, simulate a button press through a 33k resistor on pin 12 to trigger the ...
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