# Questions tagged [logic-gates]

Symbolic representation of ideal devices implementing boolean functions

153 questions with no upvoted or accepted answers
Filter by
Sorted by
Tagged with
380 views

### Minimalist 3-input XOR gate using CMOS

As an enthusiastic noob to CMOS I browsed multiple examples of XOR gates using PMOS and NMOS. I find it hard to find any good examples of 3-input XOR gates; I found an example of a 4 FET 2-input XOR ...
133 views

### Why does NOR need one more output to the multiplexor but NAND not in ALU?

Recently, I was learning "Computer Organization and Design: The Hardware/ Software Interface" riscv 2nd Edition by "David A. Patterson" In appendix A, A-37 shows the question in &...
• 193
109 views

### Chaser circuit with a chain of 4017's

I have a problem with this chaser circuit. It should work like this: When I switch on the power, no outputs should be activated. When I press the reset button, the clock signal will be started and ...
• 31
434 views

### Logic gate biasing a BJT (again)

The following schematic shows a PNP BJT driven by the output of a logic gate. When the logic gate output is high the transistor must be off, and only be activated when the logic goes low. The problem ...
• 77
170 views

### What is the internal schematic for a 74HC series gate (NAND gate as an example)?

It's rather easy to find the schematics for a CMOS NAND gate on the net -- two series NMOS transistors as the pull-down network, two parallel PMOS transistors as the pull-up network. What would an ...
72 views

### If two Boolean functions $f_1$ and $f_2$ have same truth table, does that means they have exactly same characteristic? can one f1 numerate to f2?

if $f_1(x,y,z)=\neg xz+x\neg y+\neg xy\neg z+xy\neg z$ determine if $f_1$ is symmetric and whether it is unate. What I thought is: $f_1$=¬xz+x¬y+y¬z, the truth table of $f_1$ has the same ...
87 views

### How to understand this combinational cyclic circuit made of interconnected SR latches?

I'm trying to understand the following circuit, or better said, what must be the approach to analyze other similar ones: What I'm doing for now is forget about the clock signal and the ...
• 1,259
169 views

I try to implement a full adder circuit using square arrays. I've used Digital software to design it. Also I've tested it. It works fine. But my implementation is quite different from the circuit ...
259 views

### Minterms from Logic Circuit

I have the following logic circuit: And I'm asked to identify the minterms in F's truth table. The expression for F is F = C + A'B' and the truth table isn't too difficult to construct (X=F): I ...
• 21
118 views

### Low Current Consuption on a Voltage Inverter

I'm working with a uC and a Bluetooth Module. I need the lowest current consumption in this project because it is intended to be a mobile device. Thus, I'm using sleep modes on the uC. Now, I've ...
1 vote
69 views

### Specific, practical examples of limits of logic gate fan-in?

I've been looking around for discrete, specific, and practical answers to the question "how many inputs can a (N)AND/(N)OR gate have?" as it relates to ASIC/VLSI/MOSFET/semiconductor ...
1 vote
84 views

### Use a pair of half-bridge drivers to make a full-bridge driver

I intend to use a pair of half-bridge drivers and a logic gate to make a full-bridge driver for controlling my DC motors with 3 standard input pins of Enable, Direction, and Arduino PWM. I looked at a ...
• 31
1 vote
68 views

### Lower transistor count CMOS implementations of XOR and/or XNOR with leakage current only for all static input combinations

I'm perfectly fine with the 10- and 12-transistor implementation(s), see e.g. en.wikipedia on XOR gate CMOS implementation. There are variations of 6-transistor pass-gate XOR implementations (...
• 1,973
1 vote
307 views

### How to turn an LED on in an inverter circuit

I am currently trying to build an inverter circuit which turns on an LED (on a simulation before building it physically). I am using an 2N3904 NPN transistor, 5V voltage sources, a 220k and a 47k ...
• 11
1 vote
521 views

### How do I implement a synchronous reset switch to my D-Flip Flop

This is my master slave D Flip Flop and I was wondering where do I put the reset switch to make it into a D Flip Flop positive edge with a synchronous switch. I know that for synchronous, you can ...
• 23
1 vote
150 views

### How to simulate a button press on DFPlayer Mini?

I have a DFPlayer Mini with an SD card with one song on it. I want to make a circuit to power it on, and after a couple seconds, simulate a button press through a 33k resistor on pin 12 to trigger the ...
• 11
1 vote
172 views

### Chaining NAND gates does not work and results in wrong simulation with LTspice

I started building basic logic gates. I wanted to start basic and understandable so I started building some NAND gates just using two transistors. On its own hooked up to a switch and a LED they work ...
• 33
1 vote
145 views

### Circuit help required - press two buttons to trigger third input using common ground fightstick board

I have a gaming fightstick which I don't want to install any additional buttons into. I need help with connection or a circuit so when I press two buttons (eg select & start), it triggers a third ...
1 vote
76 views

### Unexpected voltages on home-made OR gate

I've created some home-made gates using discreet components onto strip board. So far I have an OR gates, an AND gate and 4 NOR gates. Logically they all work as expected but on only one of my 4 NOR ...
• 163
1 vote
105 views

### Did I create this Karnaugh map correctly?

I'm tasked with making a 4-7 decoder for a 7-segment LED (common anode). I am an extreme layman (1st year EEE student) I have 4 inputs (A,B,C,D) ...
1 vote
254 views

### What's the problem with this four-transistors XOR gate?

I aimed to design a XOR gate using as few transistors as possible. Eventually, I came up with this: Designed and simulated here. The two terminals on the left are inputs, where the "low" ...
• 111
1 vote
66 views

### NEC asic information from around 1990

I'm looking for datasheets with specification for the NEC ASIC/Gate Arrays from around 1990. More preciselly, any information with specifications of their ASIC/Gate Array lines. I would like to known ...
1 vote
188 views

### How to determine if a gate/inverter can drive a fanout of 4 gates?

I have a circuit in which a driving inverter output (Fanout of 4) with equal Wn Wp sizing (m=4) is driving 4 other gates having same equal Wn Wp sizing (m=1). How to calculate if the inverter fanout ...
1 vote
157 views

### NAND circuit from boolean expression

What is the best way to convert following boolean expression to circuit based only on NOT, NAND gates? I already done OR, AND circuit. But what is the method to receive that?
1 vote
130 views

### We want numbers that lie between 1 and 10 inclusive, why should I use OR gate instead of AND?

I know the answer, I need to use an OR gate because that is how the code works. I want to learn the problem solving part of this. The code that works is: ...
• 11
1 vote
2k views

### I am trying to implement a function using only NAND gates

I am trying to implement a function using only NAND gates. I know I can simply use but my book never mentions such a thing like above. This is a question from my book and I don't understand how I ...
1 vote
174 views

### CMOS Logic Gate Interpretation

So I came across this interesting question while researching CMOS logic gates: As is says, a logic function $Y$ is given and you are required to create a logic network that implements it. I am ...
• 91
1 vote
59 views

### How to know whether addition has been done in a parallel binary adder?

I am little new to electronics and getting some high level overview of digital electronics. The question is that how to know whether addition has been performed in a logic circuit. For example I have ...
1 vote
454 views

### creating symbol for Transmission gate switch in ltspice

I need to create a symbol of transmission gate to use but when putting its symbol I get a message "unknown subcircuit called in xx1_nc01_nc02_nc03_nc04 how may I fix it?
• 11
1 vote
255 views

### Verilog project - Binary to BCD - 0-49 2 digit display

I have an end of the year project where I must create an 4 operation ALU that outputs its result onto 7 segment displays in Verilog. 2 of those operations are multiplication and addition. Considering ...
1 vote
65 views

### Does this circuit include two level logic circuits?

I made the circuit below from the logic expression below. A'B' + A'C' + A'D + ABC But, I was told to consider adding two level AND-OR and NAND-NAND logic circuits. I think the circuit below has them,...
• 173
1 vote
148 views

### Use battery to drive main circuit or load battery and cut-off main circuit depending on power source

Please excuse my beginner's question. Having read about electronics and logics basics and specific power-related questions, I've not found anything that would explain to me how to realize the ...
• 123
1 vote
146 views

### Logical Effort (G) and Effort (H) in Parallel

I am struggling with this question in which I need to understand what is the route with the least effort (H). Usually, I'm given a route but it's very simple to calculate, because all the other inputs ...
• 11
1 vote
1k views

### Why simple digital multiplexer uses OR gate to combine chip parts outs?

Why not just wire together outputs of the internal AND gates. For instance, consider the following Mux scheme: Here outputs of the internal AND gates are combined using out OR gate to produce output, ...
• 111
1 vote
223 views

### Build a T flip-flop with enable and reset using only a JK flip-flop (without enable or reset) and some necessary logic gates

Can someone help me to check whether my answer is correct or wrong, because I am confused with some of the condition of enable and reset. I am confused if the enable is low and the reset is high, ...
1 vote
312 views

### How do I implement a Barrel Shifter?

I'm using Multimedia logic for this particular assignment, I am to implement an ALU that performs Bitwise Rotation on the input from "A" by the amount defined by "B". Not quite sure how to approach ...
• 11
1 vote
578 views

### Estimating gate or transistor count for an IC

I'm messing around with calculating predicted failure rates using MIL-HDBK-217F. For microcircuits (depending on linear or digital) you need to come up with a gate count or a transistor count for the ...
• 13
1 vote
80 views

### Can an OR gate be made using 2 XOR and 1 and gate?

Hello i was wondering if an OR gate can be made using 2 XOR gates and 1 AND gate. as i got this question in one of my exams a few days ago.
• 19
1 vote
217 views

### Can a classical Toffoli gate be built from irreversible gates?

The Toffoli gate is a reversible gate with three inputs (A, B, C) and three outputs (S1, S2, S3) generated as S1 = A S2 = B S3 = AB ^ C It can be implemented in a classic way using the following ...
• 191
1 vote
227 views

### Jellybean Radio Button logic Chip

Below is an LTSpice simulation of a 'radio button' circuilt. Ignore the bottom button, I am working on a 'reset' mechanism to unlatch any of the other buttons. The idea is that the button you push, ...
• 309
1 vote
62 views

### I need help with designing a specific circuit

Design an arithmetic unit. Let A and B be two 4-bit 2’s complement numbers. Design a circuit to compute: Z = A + B if k1k0=00 A + B + 1 if k1k0=01 A if k1k0=10 A - B ...
1 vote
106 views

### 2^n - 1 modulo parallel prefix adder

So I have to do a simple 4-bit modulo 2^n -1 parrallel prefix adder. I've actually made a working one, but not modulo. Now I have a trouble with transforming it to modulo one. This looks like this: ...
1 vote
5k views

### Drive a 50-Ohm load from a logic gate

I have a device that I'm trying to send a trigger too, it has a 50$\Omega$ termination and suggests a pulse between 2-5 volts, ~1$\mu$s width. The way things are set up, the trigger needs to come ...
• 179
1 vote
53k views

### Designing a 4-bit adder-subtractor circuit

I am designing a 4-bit adder-subtractor circuit using CMOS technology. The instructions I was given for the design portion are as follows: Given two 4-bit positive binary numbers A and B, you are to ...
• 11
1 vote
153 views

### clarification on a particular 555 implementation for 4017 johnson counters

I'm trying to build a 13 count johnson ring counter (which flashes LEDs sequentially 1 thru 13 and then repeats), and I found this circuit which looks perfect: I assembled it with an extra LED on the ...
• 11
1 vote
155 views

### 74F86PC XOR does not work in 4 bit adder

I made a 4 bit adder where one input is from user and the other from a gated master-slave R S Nor. It seems that the XOR gates (note, not just one) always give a floating output. I have pulled all ...
1 vote
817 views

### Microcontroller on/off circuit in battery power device

I am using the below circuit to turn ON and OFF my load microcontroller circuit in my battery powered device. The max current draw I'm expecting is around 800mA. My logic is like this. For power up ...
• 21
70 views

### LEDs driven by constant-current drivers to light up like AND gates with the same intensity

Suppose that A and B in the image is connected to the two output pins of LED driver, which can be independently switched on and off a constant current of 30 mA. I want LED D3 to be turned on only when ...
• 11