Questions tagged [lvds]
LVDS stands for Low Voltage Differential Signalling. It is a popular high-speed (>100 Mb/s) way to connect chips.
173
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2
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1answer
59 views
Purpose of split termination in differential pairs
Can anyone tell me what the purpose of split termination is in a differential pair?
If you look at the LVDS article on Wikipedia, you'll see the 100 Ohm termination resistor in parallel across the two ...
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0answers
52 views
How can I bridge across a change in differential impedance?
In a design I'm working on, I have a 100Mbps differential signal traveling from a chip on one PCB to a chip on another PCB. For various reasons, I can't make the differential impedance the same on ...
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0answers
47 views
One Differential end into Single Ended Input
I am trying to test a LvPECL signal into a LVDS receiver (NI 6583). Unfortunately, I currently only have the single-ended segment/connector. Looking at the spec, the single ended receiver should still ...
0
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1answer
77 views
Comparator merge analog and digital grounds [closed]
My schematic looks like this:
simulate this circuit – Schematic created using CircuitLab
How should i connect ground and power supply to comparator? I have some signal which i want to convert ...
-1
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1answer
42 views
Can you integrate an LVDS with a common RS485 if the RS485 is used as a discrete and not a digital serial signal? [closed]
Is the LVDS compatible with an RS485 signal? Can i integrate 2 systems in this way?
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2answers
117 views
Differential Signaling and RS485 difference?
I am trying to wrap my head around the difference between differential signaling (mainly LVDS and LvPECL) and RS-485.
All seem like differential signaling for serial communications.
From the TI Page, ...
0
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0answers
17 views
Will this interface work? HCSL Clock interface
I have an HCSL interface and I want to make sure it will work correctly. The oscillator is a AX3HAF1-125MHZ part and the receiver is the NXP LS1046 device.
The specs for the oscillator are:
Output ...
1
vote
1answer
145 views
Sniffing a SPI BUS
I want to sniff some data from a SPI Bus between boards from a loom machine. The bus starts at J9 from PCB 5722 and goes through 8 boards named PCB 5778, which I guess are the slaves. The connector ...
1
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0answers
101 views
Difference between LVDS, MIPI, DPI and DSI
I'm on a project that involves TFT displays and Raspberry Pi Compute Module 4. I noticed that there are several acronyms, protocols confusing information.
As I understand it, there are protocols:
DBI:...
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0answers
26 views
BOE LVDS Display Troubleshooting
I am trying to bring a LVDS display up.
Display: BOE EV121WXM-N10-1850. Datasheet: Link
Driving MPU : STM32MP1. I am using VisionSoM STM32MP1 based evaluation Kit. Link
The firmware changes required ...
0
votes
1answer
60 views
How can I identify this QFN IC marked GX?
I'm trying to identify what this part could be based on the top marking, GX, but I've been totally unable to find it online. I'm pretty sure the packaging is QFN, it has 16 pins, and I know it has ...
0
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1answer
34 views
How do terminate the coax shield of AC coupled LVDS signal? (isolated grounds)
I have an LVDS clock signal that goes to several PCB cards. Frequency: 100Hz --> 20MHz
I am going to use a fan out IC to supply each card with it's own buffered CLK signal; I am not going do a '...
0
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1answer
56 views
Can a laptop display directly connect with mobile phone motherboard like iPhone 4s MB. If it's possible then how can one achieve? [closed]
I have dell vastro 40 pin display and iPhone 4s MB which I want to connect directly to it. Do I have to give separate power supply to the display or will work with phone's supply and can connect with ...
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0answers
41 views
Non white lines on 1920x180 LVDS controlled TFT
We are integrating a LVDS 27" 1920x1080 panel with a commercial DVI to LVDS controller board.
We have a PC, that has a DVI output, and we connect it to the Video controller.
The video controller ...
0
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0answers
51 views
What is "VESA standard" PCB mounting pattern
In hirose's LVDS connector datasheet, I find there is a "PCB mounting pattern : VESA standard", but I can't find out what is special for this mounting pattern. May someone give some clues.
...
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2answers
184 views
How to filter a LVDS clock properly
I have an LCD interface for a Beaglebone Black that is failing EMC. The Pixel clock is 65 MHz and is failing there as well as 195 MHz. Here is what the schematic looks like:
The setup is 24 bits RGB ...
2
votes
3answers
123 views
LVDS/differential driver source impedance matching
A very basic/stupid question.. I'm designing some LVDS multipoint pcbs, and I'm a bit confused about the source termination on the driver end. my colleague said that ideally there should be a 100ohm ...
2
votes
4answers
547 views
Is there a way I can convert from USB to LVDS UART (~1Mbps)? [closed]
I'm working on a spacecraft that requires very low noise levels so it was requested that we pursue LVDS UART. So it's using something similar to RS-422 because it's differential, but instead of a ...
0
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1answer
61 views
Understanding specifications
I have a differential signal which I want to measure with a differential probe.
While reading the specification of the probe, I got confused with a few terms.
Can someone what the highlighted terms ...
0
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0answers
57 views
What are these on the probes
I am having a Lecroy differential probe and trying to measure a LVDS signal. This is the Reference Manual which I am referring to as a guide.
My differential probe tip/lead model number : DX20 - SP/SI/...
0
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0answers
78 views
What are the differential voltage technology used for PCIe gen 4, gen 5 and gen 6?
I have been studying various IO standards used for various PCIe generations? I understand that PCIe Gen-3 uses LVDS, LVPECL and PCML.
I would like to learn what are the standards used for other ...
1
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0answers
71 views
Differential Signal Measurement best practice
I have 4 differential signal pairs (LVDS Data lines and Clock) running between my Microcontroller and TFT. There are no test points over the lines.
Can someone tell me what is the best practice and ...
0
votes
1answer
51 views
LvPECL TX and LVDS RX
I have a quick sanity check question because it seems too good to be true.
If I have a LvPECL signal that I want to receive, I can just use a LVDS receiver (422/485 specifically) right? From reading ...
0
votes
1answer
46 views
Why this LVDS transceiver doesn't specify the differential input polarity?
I've been looking to implement a LVDS transceiver in my project where i can hook up to Displayport AUX differential pair.
I've discovered a suitable part, SN65MLVD200A in the following design ...
0
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0answers
44 views
Laptop LCD video cable extension
How long that cable:
https://www.aliexpress.com/item/32885352799.html
can be extended without losing image quality if I cut it in the middle and add wire?
Which wire will fit and what kind is the ...
0
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0answers
28 views
SPI Configuration in TFT
I have a TFT which requires SPI Communication interface to get it configured.
My questions :
When we say, "configure the tft", what do we actually do? Do we set some bits or erase some bits ...
0
votes
1answer
46 views
Video format using LVDS signalling
I have a 3.1inch TFT.
I have the below two pins
Can someone tell me what does the 2 pins do?
My questions :
So, I can select either 6 bit or 8 bit for the whole communication and can't change in-...
1
vote
1answer
88 views
Is the TMDS intended for long distance transmission?
The TMDS Transition-minimized differential signaling is similar to LVDS but not identical. I have a few questions about it:
Why does it use current mode logic instead of the ubiquitous voltage mode ...
2
votes
1answer
72 views
Power dissipation calculation for FPGA-ADC interface
An FPGA can be interfaced with an ADC using CMOS or LVDS. Is there a way to use simulation to predict the power dissipation of the I/O blocks for a given operating frequency for this interface? If so, ...
0
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0answers
25 views
Level Translation Clarification (LVPECL and LVDS)
I am trying to understand something about level translation. I am sure I am probably misunderstanding something basic, so I'm hoping you can help me understand.
I am trying to convert a LVPECL signal ...
0
votes
2answers
96 views
LVDS comparator re-triggers on falling edge
I have a problem with a simple comparator circuit. The comparator takes a 1 PPS (pulse-per-second) signal as a single-ended input, and outputs an LVDS signal.
The issue is that the comparator, ...
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votes
1answer
36 views
Common Cable/Connector with (at least) 24 parallel conductors (USB/DVI/LVDS/etc.)
I'm designing a special device that needs 24 parallel connections to the outer world. Of course compact solution is of preference. Kinda like flex cable, but it must be durable, and the end user will ...
0
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2answers
200 views
LVDS difference between Vpp and Vdiff
I am looking into LVDS and I see the terms Vpp and Vdiff being used. I understand how LVDS works but the terminology is a little bit confusing. For the below picture we can see Vcm = 1.2V and the ...
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0answers
27 views
Are eDP driver boards compatible between resolutions?
I'm looking at various eDP to HDMI controller boards that are available. The ones that I've found identify a very specific resolution: 1920x1080 or 1366x768, etc.
If I buy a controller board for ...
1
vote
1answer
237 views
Car Head Unit LCD LVDS to HDMI
I've recently picked up a head unit for my car and I am trying to get a HDMI signal to it. I've taken it apart and had a look at the hardware, and it seems to be using a single ribbon cable to drive ...
3
votes
1answer
66 views
LVDS pairs close to other pairs
Is it a problem when I keep different LVDS traces really close to each other?
0
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0answers
36 views
LVDS signals with vias around
I know it isn't best practice to put a via or a component in between LVDS traces. But my routing requires the LVDS traces to go in between of vias. How bad is this for the signal integrity?
1
vote
1answer
137 views
How to open this LVDS connector?
I'm having trouble disconnecting the dual LVDS cables from a Philips PFL6008 main board. These don't seem to have a "flip-up" type of bracket, but the 2 small black taps on the top look as ...
0
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1answer
365 views
What is the best method to transmit a DVI-D video signal from a FPGA?
I need to transmit a video signal from a FPGA. It will be better if this signal is some kind of standard protocol like DVI-D.
There is an article that proposes to use LVDS transmitters for TMDS lines. ...
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0answers
31 views
Custom HDMI-to-( TFT or LVDS ) decoder/driver
I am working on a custom-made handheld PCB based around a PI Compute Module 3+ and one of the hardest steps I have found is how to include an HDMI-to-50pin-TTL driver on my PCB to run an LCD TFT 7&...
1
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2answers
124 views
LVDS Termination - Not sure what it accomplishes
I am looking at the following schematic where there is an LVDS to LVDS connection. The common mode and swing are a little different between the output and the input.
I am use to seeing 100 ohm ...
1
vote
1answer
179 views
SMA Differential LVDS to DB9 and termination
I want to connect a differential LVDS signal to a DB9. It seems pretty straightforward but I just want a sanity check and after seeing this (Connect SMA to a regular pin/wire), Im doubting myself.
The ...
1
vote
1answer
171 views
SGMII Termination - Not understanding recommendation
I am going to be using a processor that has a few SGMII interfaces. From what I understand, these interfaces have LVDS logic levels. I am not use to seeing the termination scheme as recommended below.
...
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0answers
119 views
Floating LVDS Input
I am designing a FPGA based receiver for a specific IC, which communicates its data utilizing standard LVDS interface with 100 Ohm termination resistors.
The IC has 10 channels (pairs) plus the clock. ...
1
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0answers
118 views
LVDS Interface - Output Max Swing is Higher than Max Input Swing
I am connecting together two "LVDS" devices. The specs are as follows:
Output: VoDiff = 247-600 mV, Vcm = 1-1.485 (1.25 typ)
Input: VinDiff = 100-500 mV, Vcm = 1-1.6 (1.25 typ)
So for the ...
1
vote
1answer
290 views
Difference between LVDS SerDes and FPD-Link III SerDes?
I'm new to the world of video interfaces and am working on a project in which parallelized video stream data is transmitted and subsequently received by processing components on the other end of an ...
0
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1answer
211 views
How would you connect a LVDS display to a laptop motherboard supporting natively a different display?
I'm planning a project of building a 4:3 laptop based on existing (modern) components.
As 4:3 displays are not manufactured anymore the idea is to take one from a old laptop, like a thinkpad T60. Then ...
0
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0answers
61 views
LVDS connections for V29 LCD driver board
I am trying use LP154W02 B1K7 LCD (from Acer 5670 laptop) with V29 LCD driver board. As per datasheet, LP154W02 B1K7 LCD is 2 channel 6 bit, 3.3v, 1680x1050 resultion. Original LVDS connections from ...
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votes
2answers
787 views
Could I use a 2Ch 6bit LVDS cable on an LCD that uses 1Ch 6 bit LVDS?
This is my first question here so I'll try to make it as clear as possible.
I've bought a T.V53.03 control board to use with an old laptop display I have at my home. After searching for the display ...
0
votes
3answers
34 views
What is the expected output of an LVDS IO cell of an FPGA (or just simulation) when the P and N pad inputs are both the same logical value?
I am curious what, in general, the output would be of an LVDS signal when both inputs are the same voltage level.
So if the truth table is:
...
