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Questions tagged [lvds]

LVDS stands for Low Voltage Differential Signalling. It is a popular high-speed (>100 Mb/s) way to connect chips.

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Layer stack up and impedance matching- 100 ohm

I have a 14 layer stack up as follows (the stack up is from EURO circuit): I need to provide 100 Ohm differential impedance for my LVDS on layer 7, currently by the information from the manufacturer (...
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Sony IMX421 Eval board with IMX422 Sensor - produces odd repeating patterns instead of true images

I am working on an application that involves use of a Sony IMX422 CMOS image sensor - namely writing VHDL code to act as a receiver interface to the sensor over an SLVS bus. the setup involves a ...
CNfan's user avatar
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DisplayPort video into a Cyclone V FPGA

I designed a carrier board that has a Type6 COME module that outputs DisplayPort 2.1 to a Altera 5CGXFC7D6F27I7N Cyclone V FPGA. The FPGA firmware contains DisplayPort IP. I am having problems getting ...
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Differential pairs-length match- Altium designer- cross talk

I'm routing LVDS and I wonder how much gap should I consider in between different pairs to not have any cross talk issue? (frequency=1 GHz)
Andromeda's user avatar
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Can I set LVDS permanently to HIGH or LOW with this simple circuit?

I have a chip with 14-bit LVDS input data lines (DATA0P/N to DATA13P/N) on the chip DAC3174. I don't have enough space left to route all these data lines, so I chose to set the two least-significant ...
johnny_1010's user avatar
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LVDS Display connected to Deserializer clarification needed

I need to use an LVDS display in my project.The pin configuration of LVDS display is given below(I can't share P/N here due to NDA). As per my knowledge the PIN No 18 and 19 are Horizontal sync and ...
Confused's user avatar
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Obtaining analog video from car LVDS interface theoretical question

Got a theoretical question. A car has 4(5 with GND) pin FAKRA connector between head unit (NAC) and head display. 2 of them are mentioned as LVDS+ and LVDS-. As far as I understand, it's 2-way gigabit ...
Alex Smirnoff's user avatar
5 votes
3 answers
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Is a gap needed with LVDS with metal layer below it?

I have a 1.8 V, 350 MHz, 100 Ω LVDS signal on an FFC on the bottom plane. Below the FFC is an aluminum metal layer; the aluminum is pretty much unconnected from the FFC. The air gap/solder mask gap is ...
Voltage Spike's user avatar
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LVDS for TFT touch display [closed]

I have a hardware with the LVDS interface to control the display. My question: Which programming language and IDE would be most suitable for programming LVDS? Or is it possible with any language like ...
unknown's user avatar
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How do I best connect my LCD panel? [closed]

I have started an electronics project as a hobby that requires an TFT-LCD panel to be directly controlled by a Raspberry Pi / Orange Pi. More information: I would prefer not having a control board, ...
Lolmerkat's user avatar
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M-LVDS differential signals through multiplexers

I'm experimenting with M-LVDS via USB 3.1 cables, passing the differential signals through the SuperSpeed lanes. I'm using the DS91M040 for driving M-LVDS. So far no issues, however, I need now to ...
Emerson's user avatar
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Convert NIM logic levels to LVDS

For my application, I need to convert a negative voltage pulse which is in NIM logic ('1' is -0.8V, '0' is 0V) into LVDS signals. The other part of the problem is that a pulse width is approximately 0....
Murfoll __'s user avatar
-1 votes
1 answer
269 views

Low-Voltage Differential Signalling (LVDS) not working

I have updated the schematic and hopefully included all the suggestions. The problem of the LED strip flickering is still there, however, I have noticed a slight improvement after altering the circuit ...
Nugget's user avatar
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LVDS oscillator's complementary output does not swing

I am using a SIT9121 27 MHz LVDS oscillator. The MPN is SIT9121AI-2B2-33E27.000000 The circuit design is shown below. The 100 Ω resistor is right at the oscillator's output (about 2 mm distance track)....
CHG's user avatar
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How to get a clean clock signal from FPGA to DACs?

I have the VC707 FPGA board and an external reference clock (fairly clean 100MHz), that I want to use as a reference for a 200MHz generated clock on my board. Then using this clock to clock my DACs (...
johnny_1010's user avatar
5 votes
2 answers
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What is the difference between PN- and PM- Differential pairs?

I am looking in the past recent weeks in a lot of datasheets and I see PM labels for LVDS (Low voltage differential signals) or generally Differential pairs on the Block Diagram. Altium would ask me ...
johnny_1010's user avatar
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What are the most effective techniques for reducing the negative effects on differential pairs routed on top of two different ground planes?

I have an FMC Card with analog circuitry containing channels. I've separated the ground for these analog channels into two distinct planes: AGND and PGND. PGND serves as the ground for the power ...
kakeh's user avatar
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Connecting LVDS to oscilloscope using ferrite bead to isolate GND/SHIELD

I want to measure LVDS signals with a scope. Will my solution work? (Shown at bottom.) I know of other ways of doing this, but I am hoping this way is cleaner and easier. Specs: Frequency:~100MHz ...
Tony's user avatar
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Can Raspberry Pi be used for LVDS image signal reconstruction

I have a NOIP3SN5000A image sensor manufactured by Onsemi with a LVDS output. I would like to reconstruct the output signals into images by a Raspberry Pi 4B, can it work? I have seen a lot of ...
Cai's user avatar
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Expected Outcome of a LVDS Transmitter Output if there's no Termination Resistor

I know this sounds like a silly question, but what would the expected waveform of a LVDS transmitter that has no termination resistor look like? If the expected output were to be a 20 MHz LVDS clock ...
Oscyzilla's user avatar
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2 votes
2 answers
233 views

The best way to light an LED at a distance

I need to control an LED (SSR) at a someway-long distance of about 20 meters (60 feet) from a microcontroller. A simple LED on/off control type where I could keep it on for a long period of time. The ...
nochkin's user avatar
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20-pin LVDS (DF14-20P) to USB/HDMI for post-processing?

I am looking to convert a 20-pin LVDS (DF14-20P) signal from a thermal imager to another format (i.e. HDMI) so that I can do post-processing on a Raspberry Pi, OAK-Som, or similar. Everything I can ...
Cajer's user avatar
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3 votes
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LVDS to Singled-Ended - Transmission Line Balun Matching

I need to convert a LVDS clock into a single-ended signal. In the past I've used a voltage balun with a center tap on the secondary but I haven't found any good past 1GHz. I need to get to 2GHz in ...
Spegs21's user avatar
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1 vote
1 answer
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No light detected from 1310 nm IR optical transceiver AFBR-5813TQZ

I am trying to build a test application circuit for an AFBR-5813TQZ IR (1300 nm) optical transceiver. For now, I am only trying to verify that the transmitter works, so I have breadboarded the ...
Ahmad's user avatar
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translating LVDS to LVTTL using amplifier and high speed output buffer

I am receiving an LVDS clock differential signals and need to convert them to LVTTL . the problem is that the LVDS frequency is above 500Mhz and the LVTTL output needs to drive a 50ohm resistors, when ...
Danny Am's user avatar
2 votes
1 answer
368 views

LVPECL output circuit explanation

I don't understand the circuit itself, how we will get VOH and VOL on the outputs. There is 2 modes one mode is when Q1 is conducting and the other mode is when Q2 is conducting , how from here how ...
Danny Am's user avatar
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211 views

How can I translate LVDS to LVTTL with limitations?

I want to convert LVDS differential signals to LVTTL. I have 2 limitations: The frequency of the LVDS signal is around 500 MHz. The LVTTL voltage output should be around 2.4 V and it needs to drive a ...
Danny Am's user avatar
1 vote
1 answer
423 views

LVDS pin configuration

I'm trying to drive a LVDS display. However, there are pins that I don't know about their functions and how to apply signal to it: DIMO (Output): Backlight CABC controller signal output CABC_EN0 &...
Michael's user avatar
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What is the name of the controller that turns a framebuffer to an LVDS signal?

I've been googling around for a bit and I'm having trouble coming up with the term for a device that takes in an address and a color and saves it to a frame buffer then sends that frame buffer over ...
Dave Fol's user avatar
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2 answers
213 views

Creating a 10MHz clock grid

I have a round surface of 1.5 meters in diameter that contains many electronics. What I would like to do is distribute a 10MHz 3.3V clock signal from Teensy 4.0 across the table for 200 ADCs to access ...
Gabriel's user avatar
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3 votes
1 answer
181 views

Will the LVDS signal rise time improve after a counter IC?

I want to improve an LVDS signal's rise and fall time. With a Cyclone III FPGA, the LVDS signal has a 500 ps rise and fall time. If I apply these signals to a counter/divider IC like the SY100EP33VKG ...
Ahmet Atcı's user avatar
1 vote
1 answer
528 views

LVDS vs driver strength in FPGA IO

In the FPGA, there is I/O constraints that can be done to configure the output buffer. Some of these constraints are like setting the output drive strength parameter, on die termination, output delay, ...
Shannon's user avatar
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1 answer
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Help identifying LVDS display connection type

I have a new motherboard arriving with this connector attached but I need help identifying what display type this LVDS connector uses. I don't think it's MIPI or the standard LVDS but I can't tell. In ...
Fried Green Tomatoes's user avatar
2 votes
2 answers
327 views

Should LVDS SerDes communication be with or without driver?

I have LVDS SerDes signals coming out from FPGA1 IO and have a few questions regarding the design. My plan is to output the signals from the FPGA1 to a connector and from the connector a cable will be ...
Shannon's user avatar
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1 answer
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How to calculate the maximum cable length for SerDes using data isolator component?

I am using ADN4655 component to isolate LVDS SerDes lines that run at 1GHz. https://www.analog.com/media/en/technical-documentation/data-sheets/ADN4654-4655-4656.pdf Termination 100Ohms resistors are ...
Shannon's user avatar
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1 answer
139 views

Reference plane in small PCB

I have a small PCB, 6mm by 16mm with 6 layers. There are LVDS SPI signals (4 pairs) on this PCB, but due to the density and size of this board, it was difficult to have a reference plane under the SPI ...
Shannon's user avatar
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2 votes
3 answers
2k views

What are the recommended CK, DQ, DQS, ADDR impedances for LPDDR4?

I am using a micron part with LPDDR4, in many datasheets from micron there are no references to a specific impedance for CLK, DQ, DQS, ADDR. The datasheet mentions that the LVSTL is tuneable, but what ...
Voltage Spike's user avatar
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1 vote
2 answers
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LVDS voltage levels

LVDS terminology can be a bit confusing when noted that Vcm typically is 1.2V and Vd 350mV. Does this mean 350mV as in +/-350mV so (Vin+ - Vin-) is (2*350mV) or overall swing (peak to peak of a ...
Shannon's user avatar
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0 answers
119 views

Formula for coupled stripline of 100 ohm

I am designing a PCB which involves MIPI and LVDS routing. What is the formula to calculate the impedance of asymmetric coupled stripline for MIPI and LVDS routing (100 ohm)? The required calculator ...
Boovaragan's user avatar
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195 views

What is the standard common mode voltage of Media Dependent Interface MDI[0:3]± signals?

I am working on the selection RJ45 connector for MDI interface between PHY and the link-partner. I am planning to use this PHY for my SGMII interface application. From various online readings, I ...
student7's user avatar
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What is the SGMII differential peak to peak voltage?

I am trying to understand the SGMII Driver and Receiver DC specification. Here is the link to SGMII specification - SGMII.pdf I am studying. Table-1: Driver DC specification Table-2: Receiver DC ...
student7's user avatar
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2 votes
0 answers
395 views

Is it possible to convert LVDS (TI DS90c241/124) differential signals to optical signals?

I have a circuit that uses the TI DS90C241 DS90C124 serdes pair to serialize 24bits of data from one board to the other. Either due to electrical interference or the transmission media's ...
deepak's user avatar
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0 votes
1 answer
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Interface a CML device with FPGA

I want to interface an IC with an FPGA however I noticed that the datasheet says the digital control inputs are differential and CML standard based. Can someone please guide how to interface this if I ...
malik12's user avatar
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0 answers
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How can I drive an LP101WX2 LCD panel with the Chalkboard Electronics HDMI-dualLDVDS converter?

I am trying to drive an LP101WX2 panel with the Chalkboard Electronics HDMI-dualLDVDS converter but all I am getting is a black screen. I tried to flash the board's firmware with both the demo and the ...
user1969903's user avatar
-1 votes
1 answer
1k views

When can you AC couple LVDS?

According to Wikipedia Wikipedia-LVDS, 350mV signal (700mV differential) is developed when a 3.5mA current flows through 100 ohm differential resistor. and according to this app note from Analog ...
sp2821's user avatar
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2 votes
1 answer
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What values should be checked for SGMII signal compatibility?

How can I verify the DC electrical compatibility of the SGMII signal between PHY and MAC (within FPGA)? Here is the reference-design that I am working on. Page 40 is using a Marvel PHY that is ...
student7's user avatar
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How to connect Mini LVDS to standard LVDS or HDMI?

I've purchased a LCD TFT Display (LG Display LA123WF-SL01) that has an absurd connecter that i haven't seen anywhere online that it has been used before. The name of the connector is FH28D-64S-0.5SH. ...
danielvolt's user avatar
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538 views

LVDS rise/fall time measurements - confused

In a document I found they mention that the rise/fall times are measured over 20-80% of the signal. They mention that the common mode is 1.2V with a output voltage swing of 350mV. This all makes sense,...
Matty's user avatar
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Consequences of having an external signal connected to an output of a LVDS Receiver?

I am trying to debug an issue with an LVDS receiver on a fellow colleagues board. They are using an LVDS differential pair from an FPGA to control a reset line on a MPU on their board. For debugging ...
Oscyzilla's user avatar
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1 answer
199 views

LVDS: Higher skew deviation or termination resistors as close as possible to the IC

I am designing a pcb with a video interface which runs lvds. LVDS has termination resistors and the datasheet states to have them put as close to the IC pins as possible. It's not 4k, but close to ...
PhreakShow's user avatar

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