Questions tagged [memory]
Consider instead more specific tags, e.g., dram, sram, flash
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EPCQL controller
I am trying to access in read and write my EPCQL-1024 from simple soft running in NIOSII. I have the Altera Serial Flash Controller I configured in QUAD mode connected from its avl_csr and avl_mem to ...
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23 views
How to use Altium Multi-Board to define SODIMM board and socket connections?
I am attempting to use Altium 18.1.9's new "Multi-Board" feature to connect a 200-pin SODIMM board ---> to a SODIMM socket connector ---> on my mainboard PCB. This Altium article is just about the ...
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2answers
49 views
Maximum cells in a row in a SRAM memory array
I was considering designing an SRAM memory array. For my design to be useful in a certain system, I need to have several cells in a row (e.g. 1024, 2048).
In textbooks I have seen examples of arrays ...
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2answers
238 views
What does the number of “ single-word instructions ” mean on a MCU's memory specifications?
I have copied the following sentence from a PIC MCU datasheet:
"PIC18(L)F26K22, PIC18(L)F46K22: 64 Kbytes of Flash Memory, up to 37,768 single-word instructions."
the question is what does " 37,768 ...
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1answer
90 views
Designing a RAM, using 4x2 chips, with a 8 address capacity
This is a typical exam question, and I've seen some very helpful posts about, but I still have a lot of doubts.
Given an integrated circuit of certain dimensions, for this example a 4x2, I have to ...
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32 views
Finding the memory polynomial model coefficients
I want to build a memory polynomial model given that I know the corresponding output signals for known input signals. What is the easiest way to find the coefficients of it? And how do we take the ...
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2answers
68 views
What design differences make ram faster than ssd for read/write [closed]
I understand that RAM is connected directly to the CPU via a high bandwidth bus, and SSD is a peripheral, but my assumption is that there are also electrical design differences (e.g. memory cell ...
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2answers
62 views
Image memory on micro controller [closed]
I am trying to specify a microcontroller for a very simple task. All it does is show an image at boot up (which will most likely be black and white).
The display itself is 240*240 and 12bit color ...
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1answer
45 views
How to write more than one page at once in Winbond W25Q32JV
I am using Eclipse IDE for firmware development. I am using Quectel MC60 module with Winbond W25Q32JV (4 MB memory). The thing is that I am able to read/write single page.
I am facing issue with ...
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0answers
44 views
How is CAM implemented?
I have a book statement:
A content addressable memory is a circuit that combines comparison and storage in a single device.
I want to know how this is implemented in real world? Sounds like an ...
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40 views
Help understanding data output from DDRx cell array
I'm trying to understand how DDR SDRAM memory works internally, and I'm getting stuck at a key point: how many bits are actually coming out of a cell array, and why.
As I understand, a single cell in ...
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1answer
35 views
Commercial SRAM with separate power supply for the core and peripheral?
Are there commercial SRAMs available with a separate power supply for the core transistors (6T) and a separate supply for the remaining circuitry such as the sense amps, write drivers, etc?
I believe ...
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1answer
70 views
How to understand “Power Up Checksum” in embedded system?
For an Embedded hardware system, how do we understand the "Power Up Checksum" in the initialization part? How does it work in detail? (Where does it check, what is the mechanism)
A "Power Up ...
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3answers
117 views
Embedded Firmware Question - Memory dump
Ok so the back story is this. I landed an online code interview with a company that shall remain nameless.
I know I am not ready for a job there but I was basically given the chance by an insider. ...
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1answer
63 views
NOR Flash Memory Full chip vs Block vs Sector Erase
I am trying to use a NOR flash memory device: SST25VF016B (with STM32 discoveryboard F407VG). However, I am confused on some terms on their datasheet. You can find the datasheet here: https://www.elfa....
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2answers
156 views
Finding the address of structure knowing the address of one of it's members in C
This sounds like a little too far fetched, but is there any possibility to find the address of a structure, if the address of one of it's members is known? The struct itself contains different data ...
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3answers
79 views
Is memory possible without a flip flop circuit?
All the memory circuits I've seen use some form of flip-flop/feedback mechanism to store a value. Is this the only circuit design that can store a value? Is there anyway to create memory without a ...
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Created a 16 bit word - 2kB memory element in vhdl, are inferred latches bad here?
Here is my code that I used to create a 2kB 16 bit word memory element in vhdl
...
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1answer
93 views
Data Strobe in DDR memory
In DDR3 memory there is a signal called DQS that I have several question about.
What is DQS abbreviated for? specially Q
What is the purpose of data strobe in DRAM and why not use simple clock.
Is ...
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1answer
89 views
How do memory seats keep track of their position?
I was wondering how do memory seats keep track of their position. Since this kind of equipment existed in 1990's cars, it must be simple yet ingenious. I have been thinking about this for quite a time ...
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1answer
81 views
Can a computer increase its memory in machine cycle? [closed]
For my college assignment, one of the question asks to explain how a computer increases its memory in machine cycle. I have searched and so far I have found that a computer can't increase it's own ...
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1answer
48 views
What is address allocation of memory register? [closed]
What is ment by address allocation of memory register in microprocessor and memory topic or in computer architecture?
Memory chips are have no processing elements(passive elements). How memory chips ...
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2answers
78 views
Does pin A15 on a Z80 tell if the CPU is addressing ROM or RAM?
I am designing a simple, hobbyist single board computer similar to an Arduino using a Z80 CPU. The trouble I am running into is how the CPU addresses memory. I know that the Z80 uses pins A0-A15 to ...
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1answer
27 views
Using narrower DDR RAM than controller
I have some ARM processor that have 72-bit width (8 for ECC) RAM controller.
Can I buy eg. two 32bit chips and combine them? If yes then how?
Can I buy just one 32bit and pull down rest of data pins ...
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2answers
92 views
Memory choices for lack of arduino speed [closed]
I'm designing a system which reads values from a microphone and feeds it to the Arduino to calculate a few sound parameters. The measuring happens during a couple of milliseconds. The problem is that ...
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1answer
57 views
Memory Addressing How To? [closed]
I have read some about computer memory and the article said DRAM is mainly made from a transistor to direct the electricity and a capacitor to store them. I don't understand how it fills certain ...
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0answers
52 views
Improving a SRAM-based memory cell by reducing number of transistors
I'm working on Emulated version of a memory cell. It is a volatile single-bit memory.
It uses 4 NAND gates to store one bit. I want to connect several of those memory cells together to create one ...
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2answers
385 views
STM32H7 with 512MB SDRAM
I'm considering to design an audio processor based on the STM32H7. I want to experiment with MCU-based DSP instead of using a dedicated DSP. I chose this high-end ARM MCU to have ample headroom for ...
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2answers
71 views
Why is there a need for an eNVM and an eSRAM in the same SoC FPGA
SmartFusion2 SoC FPGA is distinguished by containing an embedded Non-Volatile-Memory (eNVM) that is used to store the code needed for the booting process of the FPGA after power up. So in the presence ...
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2answers
2k views
Parallel RAM without large number of pins?
Back in the 1970s, Texas Instruments had a now-discontinued range of products that they called GRAM (and read only equivalent GROM) which was basically a standard memory chip with address and data all ...
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1answer
74 views
Asynchronous SRAM routing crosstalk concerns
I'm routing a large BGA SRAM that is connected to a BGA FPGA, and there's about 40 signals altogether connecting the two. I'm using Henry Ott's recommended 8-layer stackup:
1 ________________Mounting ...
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2answers
79 views
Are memory-mapped registers actually implemented as real registers?
I am currently trying to better understand microcontroller-architectures and I am particularly studying the ARM cortex-m3 right now. What I have always wondered is, if memory mapped registers are ...
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1answer
71 views
How memory is stored in memories like SD Card, USB flash drive, etc. that the data stays even if removed to the device?
This latches ( Gated Latch, SR Latch, and Flip Flops) can only store memory IF there is electric current flowing, but everything will go OFF if no current.
I wonder how memory is stored in memories ...
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4answers
145 views
Does computer memory record the zero binary state?
It's been two years since I started reading about electronics and computer circuits. I fell in love with the homemade computers and the possibility of building one by myself.
You will see: When ...
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0answers
36 views
Power consumption of RFID vs SD card
I am working on enhancing security of data on electronic passports using homomorphic cryptography. Obstacles I am facing in application of the solution I have came up with relate directly to available ...
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3answers
2k views
Size of program counter
Can we say anything about the program counter by looking at the size of a memory chip?
I think the program counter is part of the microprocessor and memory is external. How can we comment about the ...
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1answer
40 views
Interfacing multiple SPI data input into EBI memory for access in verilog
I have several SPI peripherals that collect data into the FPGA and I have an EBI memory module to communicate data from FPGA to micro controller. I am having a hard time understanding the best way to ...
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46 views
Writing data to external Flash Memory chip
I develop a microcontroller project that requires writing big chunks of data in a Micron 4Gb SPI NAND Flash memory and I am a little confused regarding manipulation of the Flash memory blocks.
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0answers
37 views
DRAM write operation
In a typical read operation from a dram chip, all the banks are equipped with sense amplifiers which select one bit from each bank using column multiplexer. But how does write operation takes place? ...
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1answer
55 views
DRAM memory organisation
I've been trying to understand the working of DRAM chips but apparently in a lot of confusion.
Suppose there are 8 banks in a single chip on a module. Is it only one bit that comes out of a single ...
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1answer
480 views
What determines the ground state of a computers dram?
I have read a paper about the cold-boot attack led by J. Alex Halderman.
Full pdf: https://jhalderm.com/pub/papers/coldboot-sec08.pdf
The paper shows the decay of a data in memory without power. They ...
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1answer
38 views
Cache memory on hit, no data stored
So, I have a question about the cache memory, i know that if the tag matches the data will be retrieved, but what happens if the current address has the same tag with others but in that place, in my ...
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2answers
154 views
How to secure an EMMC
My department of the company I am working at is in charge of developing a circuit for production, and security in the embedded system is a crucial requirement. The current prototype of our embedded ...
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2answers
175 views
Altera DE2-115 - Lack of on-chip memory resources for storing audio samples (?)
I have currently successfully stored some 16-bit, 48kHz audio samples using M9K blocks. Everything is perfectly functional, including their playback. My only problem is that, from my understanding (...
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1answer
73 views
Why address bus bit and data bus bit different [closed]
Recently I read address bus is 16 and 4 bit data/address in ROM.
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1answer
62 views
Memory access at microprocessors
I just learned about memory segmentation that is used in microprocessors and I was told that old microprocessors like Intel 8086 had 20 lines of address bus which means that it could access 2^20 ...
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28 views
Need to realize Mealy machine on embedded memory (VHDL)
Need Help to realize Mealy machine on emb. Now i have working code to Moore machine.How to get Miles to work it, according to control signals
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1answer
217 views
How does a memory map of a 1K EEPROM look like? [closed]
I am using a 1Kbit: The device is organized as one block of 128 x 8-bit memory. I want to understand how to it's organized and how addresses are structured?
Example: I want to store the world "Hello" ...
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47 views
Accessing encoder buffer from a task
The LPC1768 has a quadrature encoder interface (QEI), which stores the encoder count in a fixed memory location.
Can this be accessed in the typical way, through a FreeRTOS task (I think header files ...
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3answers
145 views
Is “new” acceptable when using C++ objects in a FreeRTOS application?
I've read that malloc() should be avoided when designing FreeRTOS applications. Does the same apply when using "new"?
E.g.:
TestObject* test = new TestObject();
...
