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Questions tagged [memory]

Consider instead more specific tags, e.g., dram, sram, flash

2
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1answer
41 views

Interfacing 16-bit SRAM/MRAM with Arduino Mega

I a looking to interface a MR2A16A 4Mb 16-bit MRAM with an Arduino Mega. I am new to interfacing with memory chips and would like some advice from someone more experienced than myself. I am not ...
0
votes
2answers
64 views

Storage structure in RAM [on hold]

Lets say we had to execute an instruction stored in RAM The instruction stored at address 0000 decodes to LOAD_DATA_15_A LOAD the data at address 15 in RAM to the register A Would there be any ...
0
votes
0answers
22 views

SRAM reading and restoring value [closed]

I have attached an image of a memory array SRAM, during a read operation, the bit lines are pre charged and the wordlines are enabled. The sensing amplifier calculates difference between bitline and ...
0
votes
1answer
34 views

Reading memory array

im new to memory cells. I have taken the below image from a video, i wanted to ask in the video he explains that the MUX can select 8 bits, but how is this even possible? The output of a MUX is always ...
0
votes
1answer
32 views

Reading a MD25Q128SIG SPI flash memory with raspberry pi

I'm trying to read a MD25Q128SIG SPI flash memory with my raspberry pi, you can find its datasheet here: http://www.firstjit.com/Uploadfiles/20160121152131319.pdf Here are raspberry pi pinouts: Here ...
0
votes
0answers
41 views

Maximum write cycle endurance for DS1302 chip RAM? [closed]

I'm using a DS1302 clock module in my project and am planning to write a variable to the battery backed memory of the DS1302 about once a minute. I couldn't find any information about this on the ...
6
votes
8answers
3k views

What prevents the construction of a CPU with all necessary memory represented in registers? [duplicate]

Modern CPUs employ a hierarchy of memory technologies. Registers, built into the chip have the lowest access times, but are expensive and volatile. Cache is a middle-man between RAM and registers to ...
-1
votes
1answer
80 views

How to find the memory capacity? [closed]

A memory component spans the address range 0x00400000 to 0x007FFFFF, what is its capacity? I only know the calculate the two ...
1
vote
0answers
31 views

S25FL512S flash driver, read or write not working correctly

I am trying to write a driver for an S70FL01GS chip, which is two stacked S25FL512S chips. I am successfully reading status register, SFDP register, RDID, etc. I am also able to toggle (and verify) ...
1
vote
1answer
83 views

Core rope rom not working

I am trying to make my own core rope rom, according to the link. I have 15mm ferrite cores, which I wound about 30 times with 1mm magnet wire. I thread the primary ( also 1mm wire) through one of ...
2
votes
4answers
113 views

How can we determine memory usage of a microcontroller

How can we determine how much memory is being used, or will be used by firmware in a microcontroller? What tools can support this? Generally we don't use dynamic memory in embedded systems, but how ...
-3
votes
1answer
66 views

How to write STM32F4 OTP Area

I am reading the reference manual page 75 that shows the flash memory organization of STM32F4 MCUs. There is an OTP area of 528 Bytes in it as shown in the image: Is it possible to write on this OTP ...
0
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0answers
22 views

Synopsys Technology File (STF)

I am using a memory IP block from STM. The manuals of the memory IP has talked a lot about Synopsys Technology File (STF), though, with no info on how and where to use it. Among all files related to ...
0
votes
1answer
97 views

How to increase memory on the FPGA board?

Situation I'm running a driver code driver.cc on the FPGA board (PYNQ-Z1) but it gives an error in the middle of the code where the code calls to ...
0
votes
0answers
19 views

Can FOTA be performed by changing the execution point of the code i.e, changing the program counter in lpc1759

For FOTA can we divide the memory into two blocks, eg : block A and block B. And whenever there is a new version of firmware detected, we shall change the execution point of the code. Is this ...
0
votes
1answer
56 views

Is a multiplexer needed to read from memory

we need to enable a register to write into that register, which is done using a decoder. even if we enable 1 register using decoder, given that RD(bar) is 0, all registers can still produce an output. ...
0
votes
0answers
46 views

EPCQL controller

I am trying to access in read and write my EPCQL-1024 from simple soft running in NIOSII. I have the Altera Serial Flash Controller I configured in QUAD mode connected from its avl_csr and avl_mem to ...
0
votes
0answers
49 views

How to use Altium Multi-Board to define SODIMM board and socket connections?

I am attempting to use Altium 18.1.9's new "Multi-Board" feature to connect a 200-pin SODIMM board ---> to a SODIMM socket connector ---> on my mainboard PCB. This Altium article is just about the ...
0
votes
2answers
55 views

Maximum cells in a row in a SRAM memory array

I was considering designing an SRAM memory array. For my design to be useful in a certain system, I need to have several cells in a row (e.g. 1024, 2048). In textbooks I have seen examples of arrays ...
1
vote
2answers
249 views

What does the number of “ single-word instructions ” mean on a MCU's memory specifications?

I have copied the following sentence from a PIC MCU datasheet: "PIC18(L)F26K22, PIC18(L)F46K22: 64 Kbytes of Flash Memory, up to 37,768 single-word instructions." the question is what does " 37,768 ...
1
vote
2answers
147 views

Designing a RAM, using 4x2 chips, with a 8 address capacity

This is a typical exam question, and I've seen some very helpful posts about, but I still have a lot of doubts. Given an integrated circuit of certain dimensions, for this example a 4x2, I have to ...
1
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0answers
34 views

Finding the memory polynomial model coefficients

I want to build a memory polynomial model given that I know the corresponding output signals for known input signals. What is the easiest way to find the coefficients of it? And how do we take the ...
0
votes
2answers
71 views

What design differences make ram faster than ssd for read/write [closed]

I understand that RAM is connected directly to the CPU via a high bandwidth bus, and SSD is a peripheral, but my assumption is that there are also electrical design differences (e.g. memory cell ...
1
vote
2answers
69 views

Image memory on micro controller [closed]

I am trying to specify a microcontroller for a very simple task. All it does is show an image at boot up (which will most likely be black and white). The display itself is 240*240 and 12bit color ...
0
votes
1answer
75 views

How to write more than one page at once in Winbond W25Q32JV

I am using Eclipse IDE for firmware development. I am using Quectel MC60 module with Winbond W25Q32JV (4 MB memory). The thing is that I am able to read/write single page. I am facing issue with ...
1
vote
0answers
47 views

How is CAM implemented?

I have a book statement: A content addressable memory is a circuit that combines comparison and storage in a single device. I want to know how this is implemented in real world? Sounds like an ...
0
votes
1answer
43 views

Commercial SRAM with separate power supply for the core and peripheral?

Are there commercial SRAMs available with a separate power supply for the core transistors (6T) and a separate supply for the remaining circuitry such as the sense amps, write drivers, etc? I believe ...
-1
votes
1answer
100 views

How to understand “Power Up Checksum” in embedded system? [on hold]

For an Embedded hardware system, how do we understand the "Power Up Checksum" in the initialization part? How does it work in detail? (Where does it check, what is the mechanism) A "Power Up ...
1
vote
3answers
133 views

Embedded Firmware Question - Memory dump

Ok so the back story is this. I landed an online code interview with a company that shall remain nameless. I know I am not ready for a job there but I was basically given the chance by an insider. ...
0
votes
1answer
191 views

NOR Flash Memory Full chip vs Block vs Sector Erase

I am trying to use a NOR flash memory device: SST25VF016B (with STM32 discoveryboard F407VG). However, I am confused on some terms on their datasheet. You can find the datasheet here: https://www.elfa....
1
vote
2answers
160 views

Finding the address of structure knowing the address of one of it's members in C

This sounds like a little too far fetched, but is there any possibility to find the address of a structure, if the address of one of it's members is known? The struct itself contains different data ...
1
vote
3answers
83 views

Is memory possible without a flip flop circuit?

All the memory circuits I've seen use some form of flip-flop/feedback mechanism to store a value. Is this the only circuit design that can store a value? Is there anyway to create memory without a ...
0
votes
1answer
236 views

Data Strobe in DDR memory

In DDR3 memory there is a signal called DQS that I have several question about. What is DQS abbreviated for? specially Q What is the purpose of data strobe in DRAM and why not use simple clock. Is ...
0
votes
1answer
106 views

How do memory seats keep track of their position?

I was wondering how do memory seats keep track of their position. Since this kind of equipment existed in 1990's cars, it must be simple yet ingenious. I have been thinking about this for quite a time ...
-1
votes
1answer
90 views

Can a computer increase its memory in machine cycle? [closed]

For my college assignment, one of the question asks to explain how a computer increases its memory in machine cycle. I have searched and so far I have found that a computer can't increase it's own ...
0
votes
1answer
50 views

What is address allocation of memory register? [closed]

What is ment by address allocation of memory register in microprocessor and memory topic or in computer architecture? Memory chips are have no processing elements(passive elements). How memory chips ...
0
votes
2answers
143 views

Does pin A15 on a Z80 tell if the CPU is addressing ROM or RAM?

I am designing a simple, hobbyist single board computer similar to an Arduino using a Z80 CPU. The trouble I am running into is how the CPU addresses memory. I know that the Z80 uses pins A0-A15 to ...
0
votes
1answer
34 views

Using narrower DDR RAM than controller

I have some ARM processor that have 72-bit width (8 for ECC) RAM controller. Can I buy eg. two 32bit chips and combine them? If yes then how? Can I buy just one 32bit and pull down rest of data pins ...
-2
votes
2answers
94 views

Memory choices for lack of arduino speed [closed]

I'm designing a system which reads values from a microphone and feeds it to the Arduino to calculate a few sound parameters. The measuring happens during a couple of milliseconds. The problem is that ...
1
vote
1answer
61 views

Memory Addressing How To? [closed]

I have read some about computer memory and the article said DRAM is mainly made from a transistor to direct the electricity and a capacitor to store them. I don't understand how it fills certain ...
1
vote
0answers
54 views

Improving a SRAM-based memory cell by reducing number of transistors

I'm working on Emulated version of a memory cell. It is a volatile single-bit memory. It uses 4 NAND gates to store one bit. I want to connect several of those memory cells together to create one ...
0
votes
2answers
885 views

STM32H7 with 512MB SDRAM

I'm considering to design an audio processor based on the STM32H7. I want to experiment with MCU-based DSP instead of using a dedicated DSP. I chose this high-end ARM MCU to have ample headroom for ...
0
votes
2answers
97 views

Why is there a need for an eNVM and an eSRAM in the same SoC FPGA

SmartFusion2 SoC FPGA is distinguished by containing an embedded Non-Volatile-Memory (eNVM) that is used to store the code needed for the booting process of the FPGA after power up. So in the presence ...
16
votes
2answers
2k views

Parallel RAM without large number of pins?

Back in the 1970s, Texas Instruments had a now-discontinued range of products that they called GRAM (and read only equivalent GROM) which was basically a standard memory chip with address and data all ...
0
votes
1answer
100 views

Asynchronous SRAM routing crosstalk concerns

I'm routing a large BGA SRAM that is connected to a BGA FPGA, and there's about 40 signals altogether connecting the two. I'm using Henry Ott's recommended 8-layer stackup: 1 ________________Mounting ...
0
votes
2answers
84 views

Are memory-mapped registers actually implemented as real registers?

I am currently trying to better understand microcontroller-architectures and I am particularly studying the ARM cortex-m3 right now. What I have always wondered is, if memory mapped registers are ...
0
votes
1answer
71 views

How memory is stored in memories like SD Card, USB flash drive, etc. that the data stays even if removed to the device?

This latches ( Gated Latch, SR Latch, and Flip Flops) can only store memory IF there is electric current flowing, but everything will go OFF if no current. I wonder how memory is stored in memories ...
1
vote
4answers
154 views

Does computer memory record the zero binary state?

It's been two years since I started reading about electronics and computer circuits. I fell in love with the homemade computers and the possibility of building one by myself. You will see: When ...
0
votes
0answers
36 views

Power consumption of RFID vs SD card

I am working on enhancing security of data on electronic passports using homomorphic cryptography. Obstacles I am facing in application of the solution I have came up with relate directly to available ...
6
votes
3answers
2k views

Size of program counter

Can we say anything about the program counter by looking at the size of a memory chip? I think the program counter is part of the microprocessor and memory is external. How can we comment about the ...