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Questions tagged [memory]

Consider instead more specific tags, e.g., dram, sram, flash

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219 views

Altera DE2-115 - Lack of on-chip memory resources for storing audio samples (?)

I have currently successfully stored some 16-bit, 48kHz audio samples using M9K blocks. Everything is perfectly functional, including their playback. My only problem is that, from my understanding (...
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1answer
9k views

STM32F4 NAND flash via FSMC, difference between bytes written and read back

I have a Waveshare Open407V-D development board, basically a "motherboard" in which an STM32F4DISCOVERY kit is fitted (this kit, for those not familiar with it, is made by ST itself and based on the ...
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1answer
25 views

Can more than one memory device transmit on the data bus at once?

I know that in general only one device can transmit over the bus at once, but if they are all memory devices, can they act as one? I have four 256x8 chips, which I think means that I have 256 cells ...
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1answer
34 views

Reading memory array

im new to memory cells. I have taken the below image from a video, i wanted to ask in the video he explains that the MUX can select 8 bits, but how is this even possible? The output of a MUX is always ...
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1answer
98 views

How to increase memory on the FPGA board?

Situation I'm running a driver code driver.cc on the FPGA board (PYNQ-Z1) but it gives an error in the middle of the code where the code calls to ...
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1answer
57 views

Is a multiplexer needed to read from memory

we need to enable a register to write into that register, which is done using a decoder. even if we enable 1 register using decoder, given that RD(bar) is 0, all registers can still produce an output. ...
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1answer
106 views

How do memory seats keep track of their position?

I was wondering how do memory seats keep track of their position. Since this kind of equipment existed in 1990's cars, it must be simple yet ingenious. I have been thinking about this for quite a time ...
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1answer
71 views

How memory is stored in memories like SD Card, USB flash drive, etc. that the data stays even if removed to the device?

This latches ( Gated Latch, SR Latch, and Flip Flops) can only store memory IF there is electric current flowing, but everything will go OFF if no current. I wonder how memory is stored in memories ...
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1answer
483 views

using generate statement in verilog

I am using nested for loops using generate module for creating multiple instances of sub-modules in verilog this is for finding 4x4 determinant. I generated the sub-modules with inputs given ...
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1answer
67 views

Memory in sequential circuit

In sequential circuit block diagram ,it is said that some outputs are again feedbacked to inputs,after storing them in memory. But,where is that memory in sr latch.In sr latch ,it is seen that the ...
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1answer
704 views

STM32F401RE SPI DMA flash driver read/write not working

I am facing problem with STM32F401RE with SPI flash driver. I am able to do normal SPI operations like read,write etc... But I need to use DMA to read and write to FLASH. /*****************************...
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1answer
39 views

Cache memory on hit, no data stored

So, I have a question about the cache memory, i know that if the tag matches the data will be retrieved, but what happens if the current address has the same tag with others but in that place, in my ...
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1answer
56 views

How cpu access bits?

I know that base address and its length of are stored.I want to know how its circuitry access bits and stop accessing after particular stored length? Are there any some kind counter used to access ...
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0answers
252 views

SDRAM interfacing problem with lpc4357

I am trying to interface SDRAM - AS4C8M16SA from Alliance, with LPC4357 (LQFP208 package). I'm not familiar with EMC or SDRAM. I got the RAM get initialized. But ,I cannot successfully write beyond 64 ...
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0answers
3k views

How to know the memory occupied by the various memory segments in a microcontroller

I'm using STM32 based microcontroller, IAR embedded workbench and STlink v2 debugger. I just want to know how to check the memory utilized/used by the program/system in various memory segments like: ...
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0answers
682 views

How is it possible that lower CAS latency and lower timings on RAM memory to result in lower performance?

I have watched many benchmarks on RAM memories and I was shocked to find out that sometimes lowering the memory timings can result in lower performance in BOTH synthetic benchmarks general use of ...
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0answers
253 views

Problem with writing eeprom memory

I am trying to write atmel at28c256 on breadboard so I tied all address lines to ground, and all I/O lines also tied to ground. I untie I/O lines for reading, tie 'WE to high, 'CE to low, and 'OE to ...
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0answers
766 views

Why DDR3 RAS timing have to be greater than RCD + CAS timing?

By definition, tRAS is the minimum delay from when a particular row in a bank is activated, to when it can be closed with a PRE command. I have seen claims numerous times that tRAS should be > tRCD + ...
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0answers
992 views

STM32 Flash acting like RAM

I've been trying to program a word of flash memory on my STM32F030F4, but for some reason whenever I power it off and on again, the memory location has defaulted to '0xFFFFFFFF' again. Am I missing ...
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0answers
583 views

Can I use full-size 64/72 bit DDR2/DDR3 memory module with CycloneV hardware controller of 24 + 24 bits?

I thinking of using Cyclone V FPGA and its hardware memory controller: There is "Cyclone V FPGA Multiport Memory Controller" document from Altera: http://www.altera.com/devices/fpga/cyclone-v-fpgas/...
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0answers
203 views

Interfacing NAND flash with USBMSD

I'm trying to read files from a NAND flash (K9LAG08U0M) that I took off an old MP3 player, so far I've been able to read the NAND contents successfully by interfacing it to my PC as a USBMSD (Mass ...
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0answers
39 views

S25FL512S flash driver, read or write not working correctly

I am trying to write a driver for an S70FL01GS chip, which is two stacked S25FL512S chips. I am successfully reading status register, SFDP register, RDID, etc. I am also able to toggle (and verify) ...
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0answers
34 views

Finding the memory polynomial model coefficients

I want to build a memory polynomial model given that I know the corresponding output signals for known input signals. What is the easiest way to find the coefficients of it? And how do we take the ...
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0answers
47 views

How is CAM implemented?

I have a book statement: A content addressable memory is a circuit that combines comparison and storage in a single device. I want to know how this is implemented in real world? Sounds like an ...
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0answers
55 views

Improving a SRAM-based memory cell by reducing number of transistors

I'm working on Emulated version of a memory cell. It is a volatile single-bit memory. It uses 4 NAND gates to store one bit. I want to connect several of those memory cells together to create one ...
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0answers
43 views

DRAM write operation

In a typical read operation from a dram chip, all the banks are equipped with sense amplifiers which select one bit from each bank using column multiplexer. But how does write operation takes place? ...
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0answers
60 views

How to read all memory from damaged CF?

My CF card has been corrupted. I don't know how is that happened. I just using new card (five months old) on EOS 5D Mark II with installed ...
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0answers
84 views

Finding RAM product/solution for tiny embedded linux system (<1GB)

I'm finding it quite difficult to navigate among the copious memory solutions available when selecting a RAM solution for a tiny embedded system I'm developing. I will run an OS such as PetaLinux on ...
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0answers
101 views

Defining a variable in the bit-banded area

I wonder to know is there anyone who define a variable in bit-banded region in c programming language for cortex-M3 particularly LPC17XX. I have followed the compiler attribute for Keil (...
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0answers
152 views

GDDR Power Calculation

I'm wondering if there is any publicly available documents or research papers that cover GDDR power estimation? Micron provides very nice documentation and calculators for DDR up to DDR4, however I ...
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0answers
147 views

Best device to read/write memory on multiple architectures?

tl;dr: I want to read/write memory from a PIC MCU and an EEPROM, both of which are soldered to an experiment board. I would like to explore programming and debugging ARM in the near future. Which ...
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0answers
73 views

Crypto key handling in a uC

What are the general guidelines for handling a cryptographic keys? I know that saving them in plaintext is generally frowned upon, does this hold for true uCs where no user code is run?
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0answers
63 views

Handling Large Variable Data with a Microcontroller

What is good practice for storing and manipulating variable data in a microcontroller circuit when the data may exceed microcontroller working memory? In my application, I am designing an access ...
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0answers
15 views

Chaging EA/VPP by software on Intel MCS-51/8051

I'm designing a circuit that uses the combined Program/Data bus from Intel MSC-51 as advantage. By the MCS-51 specification it has an internal 4K ROM and a EA/VPP pin that if set to high will access ...
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0answers
22 views

Synopsys Technology File (STF)

I am using a memory IP block from STM. The manuals of the memory IP has talked a lot about Synopsys Technology File (STF), though, with no info on how and where to use it. Among all files related to ...
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0answers
19 views

Can FOTA be performed by changing the execution point of the code i.e, changing the program counter in lpc1759

For FOTA can we divide the memory into two blocks, eg : block A and block B. And whenever there is a new version of firmware detected, we shall change the execution point of the code. Is this ...
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0answers
47 views

EPCQL controller

I am trying to access in read and write my EPCQL-1024 from simple soft running in NIOSII. I have the Altera Serial Flash Controller I configured in QUAD mode connected from its avl_csr and avl_mem to ...
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0answers
53 views

How to use Altium Multi-Board to define SODIMM board and socket connections?

I am attempting to use Altium 18.1.9's new "Multi-Board" feature to connect a 200-pin SODIMM board ---> to a SODIMM socket connector ---> on my mainboard PCB. This Altium article is just about the ...
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0answers
56 views

Writing data to external Flash Memory chip

I develop a microcontroller project that requires writing big chunks of data in a Micron 4Gb SPI NAND Flash memory and I am a little confused regarding manipulation of the Flash memory blocks. ...
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0answers
31 views

Need to realize Mealy machine on embedded memory (VHDL)

Need Help to realize Mealy machine on emb. Now i have working code to Moore machine.How to get Miles to work it, according to control signals ...
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0answers
48 views

Accessing encoder buffer from a task

The LPC1768 has a quadrature encoder interface (QEI), which stores the encoder count in a fixed memory location. Can this be accessed in the typical way, through a FreeRTOS task (I think header files ...
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0answers
109 views

PIC memory problem

I write program for PIC16F73 and XC8 compiler. If I add additional variables and Data Memory increased to 50% or more microcontroller will be not working in real life. If microcontroller use more ...
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0answers
41 views

Sobel Edge Detection - estimating possible memory requirements

I'm looking into doing Sobel Edge detection on a FPGA. I'm interested in the memory requirements of the output of the Sobel edge detection. I'm trying to do Sobel edge detection on 250x250 pictures. ...
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0answers
149 views

Memory redundancy and Yield

this question it's a little bit too much specific but I hope you can help me. Let's say I'm designing a SoC. Inside the this SoC there are several and different memories. Now let's say I'm using TSMC ...
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0answers
36 views

Power consumption of RFID vs SD card

I am working on enhancing security of data on electronic passports using homomorphic cryptography. Obstacles I am facing in application of the solution I have came up with relate directly to available ...