Skip to main content

Questions tagged [microblaze]

MicroBlaze is a CPU implemented in HDL core written by Xilinx for Xilinx FPGAs. It's implementation is optimized for efficient space and execution on their products. It's a full CPU capable of running Linux and other complex operating systems.

Filter by
Sorted by
Tagged with
1 vote
0 answers

Relative FPGA Footprint of ARM Cortex M3 vs. MicroBlaze

I may have missed it, but does anyone have experience with the relative resource consumption of a MicroBlaze versus the core for an ARM Cortex M3 IP? It seems like there should be a ballpark ...
Daniel Abramovitch's user avatar
1 vote
1 answer

VC707 Eval Board - Synthesis/DRC issues during implementaion of a Microblaze Based PS2 Controller

The following is the top level module of a VC707 based Microblaze/PS2 controller. I have connected a FMC-CE GPIO Daughter Card to the FMC1 Connector on the FPGA and a PMOD-PS2 on the 6 pin GPIO ...
Vahe's user avatar
  • 171
1 vote
1 answer

Vivado Video IPs not working as expected

I've been trying to understand how to utilize AXI-Stream IPs for Video processing and display via VGA for a few days now, but can't seem to get any circuit to work. Here is a test circuit I created: ...
RN_'s user avatar
  • 121
0 votes
1 answer

Fastest way of transferring data from VHDL section to Microblaze processor

My basic application involves sending ADC samples to PC via Ethernet. The ADC sampling and storing is happening in VHDL section while the Ethernet socket programming code is in Microblaze processor. ...
samjay's user avatar
  • 66
1 vote
2 answers

AXI SPI of MicroBlaze connected to SD card

I would like to connect SPI IP core of microblaze on custom board but I have some problem. I need 100-400 KHZ clock but the system clk is 100MHz and SPI Clock is 6.25 MHz. Is it necessary to reduce ...
Student77's user avatar
4 votes
2 answers

Reset the configuration of FPGA without reprogramming

I am doing an experiment on Xilinx VC709 board. The experiment involves removing and plugging in the DDR3 RAM while the FPGA is running. But every time I plug back the RAM I have to reprogram the FPGA....
Misiker's user avatar
  • 43
9 votes
2 answers

What are the typical uses for a soft-processor such as MicroBlaze?

I know that the FPGA-DSP combination is typically used for high-end power electronics/ultrasound/MRI/etc. Is it possible for the soft-processor to fully replace the DSP even on lower-end FPGAs such ...
user02222022's user avatar
  • 1,646
2 votes
1 answer

xiomodule.h no such file or directory

I'm working with MircoBlaze_mcs core and implement simple GIO file from the tutorial but it gives error ( "xiomodule.h" No such file or directory )when I synthesize the project . I find it in the ...
sepeee's user avatar
  • 61
0 votes
1 answer

Check the value of FSL_M_Control in the MicroBlaze

I wrote a hardware accelerator which communicates with a MicroBlaze over FSL. In the Microblaze C code I would like to use putfsl() in a loop until the hardware ...
Gonçalo Ribeiro's user avatar
1 vote
1 answer

Problem using FSL with microblaze

I want to pass some data from my verilog to my microblaze core in ISE 14.7. I was doing some research and it seemed like the FSL was the easiest way to go about this. What I did was create a ...
toozie21's user avatar
  • 111
2 votes
2 answers

How to get MicroBlaze running on Papilio Pro

I am new to the FPGA world, and there seems to be gazzilions of boards and FPGA vendors. I just bought the Papilio Pro, which is based on the Spartan 6 LX9, and although I can already bitstream basic ...
Hugo Sereno Ferreira's user avatar
3 votes
2 answers

Generating a MSS file at command-line?

Is there a way to generate a mss file from the exported SDK XML file at command-line? At the moment, I still have to open xsdk, generate a new hello world project to create the mss file. But I would ...
vermaete's user avatar
  • 390
3 votes
3 answers

Designing with AC'97 - why does it not have a (FIFO) buffer?

The AC'97 codec seems to dominate the world of digital audio I/O but, what is weird is that it has neither interrupts nor buffers so that it is difficult to interface with a controller, which has ...
Val's user avatar
  • 392
2 votes
1 answer

Finding Absolute Value In Verilog Data Designated by System C/Xilinx X

I have been trying to find the Absolute value of an integer which is designated to Verilog core using Xilinx C running on Microblaze, what i have seen is that Verilog treats the negative number as a ...
aibk01's user avatar
  • 145
2 votes
1 answer

FSL Bus Problem in Xilinx FPGA Data Return

I wrote a custom IP peripheral in Verilog and interfaced it to MicroBlaze, using a hardware co-processor option. I can see the peripheral connected on the System Design Diagram. Everything compiles ...
aibk01's user avatar
  • 145
10 votes
4 answers

Is the Microblaze soft cpu better than the Cortex M3 soft cpu [closed]

Is the Microblaze soft cpu better than the Cortex M3 soft cpu in terms of functionality? Given all the buzz about the ARM based processors, I was wondering if to implement an ARM processor on my FPGA ...
user avatar
2 votes
3 answers

Microcontrollers: Can I perform floating point operations in a Microblaze controller?

I wonder if I could perform floating point operations in a Microblaze controller? Thank you to all posible answers with direct references to documentation or articles.
Peterstone's user avatar