Questions tagged [microfabrication]

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On different well processes (fabrication process)

My textbook (Weste and Harris's CMOS VLSI Design) is trying to explain to me the nature of fabricating wells in the twin-well and triple-well processes. My question here is about how we can use so few ...
EE18's user avatar
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Why do we use LDD technique in IC fabrication technology?

Why do we use LDD(lightly doped drain) in IC fabrication technology? In the "silicon VLSI technology" book, was mentioned that this is in order to create a voltage drop in drain region. So ...
mohammad rezza's user avatar
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Difference between arsenic and phosphorus in IC fabrication technology

What is the difference between arsenic and phosphorus in IC fabrication technology? When do we prefer one of them over the other?
mohammad rezza's user avatar
1 vote
0 answers
217 views

Is a cylindrical GAAfet fabricated with lithography and etching?

The GAAfet, aka the surrounding gate transistor (SGT), is basically a FinFET that surrounds the channel on all 4 sides instead of 3. However, a lot of examples show a cylinder instead of a rectangle. ...
DrZ214's user avatar
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What is the "dangling transistor" in this operational amplifier equivalent schematic?

I was comparing the datasheets for the three related CMOS Op Amps from TI: TLC2252, TLC2262, and TLC2272. TLC2252 is the micropower version; TLC2272 is the high-performance version; TLC2262 is ...
Theodore's user avatar
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Is there any specific application for an indirect band gap semiconductor?

I know that direct band gap semiconductors are very attractive for optical emission, and even though indirect band gap are used as well, I keep wondering: is there any technology that specifically ...
Bidon's user avatar
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2 answers
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Shared IC tape out

I have a IC design about 300*300 micrometers. Due to the high cost of IC tape out, is it possible to fabricate the IC jointly with other people? Does the company have such a service?
seyyedali hosseini's user avatar
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2 answers
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Dry or wet etching in fabrication cmos chip?

What types of etching are used in conventional chip fabrication technologies such as TSMC 0.18, dry or wet?
seyyedali hosseini's user avatar
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What is the pad-etching process in standard CMOS fabrication process

What is the pad etching process? Is it possible to etch to the bottom metal layers or vias in standard CMOS fabrication?
seyyedali hosseini's user avatar
2 votes
2 answers
907 views

What's the use of bonding pad assignments?

This is not the first time that I've seen a bonding pad diagram like this on chip data sheets:- But this is inside the chip, so why do we care? And is it of interest that the chip die is 15 mils ...
Paul Uszak's user avatar
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Does melting microwires cause internal shorts

If you overheat a chip, you can melt the microwires attaching the wafer to the package. When this happens, can the melted microwires cause shorts between the pins of the chip, inside the package of ...
Tom's user avatar
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Decreasing phase noise of natural oscillators by passive resonant filter on-chip in the MHz regime

I was doing a literature research on microwave filters and to me it looks like passive SAW filters/resonators have the highest quality factor below 1.5 GHz, but with a high power loss. Coupled planar ...
user48953094's user avatar
3 votes
2 answers
630 views

How are integrated circuit photomasks fabricated with such high resolution?

I understand that photomasks / photoreticles are used for the fabrication of integrated circuits, CPUs, and such. I also have read that CAD software and languages like VHDL are used to describe the ...
nbura's user avatar
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How do we extract the etchant after it is stopped at the boron layer in MEMs fabrication process?

Dopant-Selective etch stop method is where we create a layer of highly doped boron in the substrate to stop the etching process at that exact layer, but when that cavity is created the etchants are ...
Arshdeep Singh's user avatar
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3 answers
155 views

Can you approximately detect the closure of up to 100,000 switches using a resistor chain?

Consider the following outline circuit:- It is a series of switch controllers that can short out parts of a chain of serially connected resistors. The short is accomplished with a BJT or MOSFET. A ...
Paul Uszak's user avatar
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2 votes
4 answers
232 views

How was physical design verification accomplished before CAD?

I'm reading a history of EDA for ASICs because I'm curious about how older ICs were mass-produced. The article explicitly mentions that in the early 1970's, SPICE was used to simulate circuit ...
cr1901's user avatar
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4 votes
3 answers
3k views

Ordering Integrated circuit fabrication [closed]

Is there IC fabrication services? You upload the IC design you want and pay. They send you physical IC of what you ordered. Something like 3D printing service, such as shapeways.com for example, but ...
Mustafa's user avatar
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Why solvent cleaning of clean wafers includes de-ionized (DI) water?

Solvent (or solution) cleaning of clean wafers includes acetone wash, isopropyl alcohol (IPA) wash and de-ionized (DI) water wash, followed by drying in nitrogen. What's the purpose of using DI water?...
Sparkler's user avatar
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1 answer
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How are few-nanometer multigate MOSFETs fabricated?

Intel and IMEC came up with multigate MOSFET designs with channels as narrow as new nanometers. Which methods/techniques/machines are used to pattern/fabricate such small features? (source) (source)
Sparkler's user avatar
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2 votes
1 answer
93 views

How can I deposit metallic electrodes on a temperature-sensitive wafer?

How can I deposit metallic contacts on a wafer in a process that won't heat the wafer above 80C? The size of the electrodes should be around 1mm2. The wafer could be glass or silicon, coated with a ...
Sparkler's user avatar
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