Questions tagged [nand]
Use this tag when referring to any circuit that uses NAND gate / NAND logic, or for asking questions relating to NAND gates.
126
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What NAND gate chips should I use to create a simple computer
I have been reading the bool 'The Elements of Computing Systems' and I have designed a circuit for the computer that will use 1232 NAND gates, which assuming that there are 4 on a chip, is 308 chips. ...
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2answers
83 views
Multiple Switch Equation to NAND Only equation
I'm trying to convert a regular Boolean equation that has multiple inputs into a NAND only equation. My guess is that I'm supposed to convert using DeMorgan's law, but I'm not entirely sure how to do ...
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49 views
Nand gate is not working
I am trying to use a nand gate from a 4093BE chip with a digital sensor which is supposed to output 5 V when an obstruction is detected and 0 when not. I am setting both inputs of gate to the output ...
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3answers
74 views
Implement \$AB \overline{C}+\overline{BC}\$ using only a maximum of three 3-input NAND gates only
I need help with this question, I am lost.
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15 views
Measuring time propagation of NAND gate with different inputs
I want to measure time propagation of the signal in an NAND gate and I'm getting confused about how I should measure it. Should I take a point in time where both of the inputs changes simultaneously ...
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11 views
LPC1788 and (K9F2G08U0B or K9F1G08U0B) and Jlink
I am working on programming LPC1788 with external ROM (NAND Flash) K9F2G08U0B or K9F1G08U0B (They are somehow similar). The NAND works perfectly on LPC1788 with simple reading datasheet, writing ...
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1answer
26 views
Does a secure erase on a SSD with lots of free space cost less P/E cycles than an SSD that's almost full?
Doing an ATA Secure Erase on an SSD should reset all of the cells to factory condition, which results in a program/erase cycle on cells at least in blocks that contain data.
On self-encrypting drives,...
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39 views
Realizing an XOR expression using NAND gates [duplicate]
I've been trying really hard to understand the construction of a logical circuit using only NAND while also trying to minimize the number of gates. The minimization of gates is what is really ...
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2answers
45 views
SN74LS26 2-input NAND gate. No output
I purchased SN74LS26N quadruple 2-input NAND Gates chips for my circuit. Before I insert any chip into circuit I test it on separate breadboard.
So I did with this chip and I get NO output when my ...
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1answer
48 views
What happens when you nand the same input?
I am trying to conceptually understand what happens to the output of the second nand gate when input into the 1st nand gate are combinations 00, 01, 10, 11.
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2answers
70 views
Circuit using only NAND gates
I am starting to get beyond frustrated with gates and breadboards now in general because of this simple circuit (which is literally experiment #1 in my digital logic class).
Using only NAND gates, ...
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1answer
27 views
Can I read programmed content inside any sort of non-volatile re-programmable memory device with Microscope, X-ray, etc.?
Non-volatile re-programmable memory like NAND flash, NOR flash, and etc. stores information in forms of electron charges and doesn't change in structural forms that can be inspected with X-ray or ...
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1answer
31 views
NAND flash pull ups
I am new to electronics, but always wanted to build my own devices and decided to start with simple usb flash drive as a first project. I found some reference designs by cypress and it confused me a ...
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1answer
74 views
Digital electronics design
Our professor asked us to name the pins of the gates as below based on a chip pinout diagram he provided which includes only NAND and NOR but in the circuit diagram, there's a negative OR gate.
Can ...
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25 views
understanding NAND ONFI interface and timing
In this question im trying to understand how NAND interface ONFI 1.0 works going to compare (code, datasheets) from ready ASF framework example (microchip)
the development board : SAM4E XPlained Pro
...
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1answer
55 views
Wear leveling and supply of voltage
Does anyone know if a NAND flash device (e.g. microSD) has to be continuously supplied with energy for its wear leveling algorithms work as designed? Or, if it doesn't matter if the device is (safely) ...
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0answers
111 views
File system to use with NAND Flash and 32 bit microcontroller
I am searching for a file system, suitable for NAND flash memory chips.
Currently I use a Micron 256MB SPI NAND flash memory where I write and read raw sensors data but without a file system and ...
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1answer
47 views
Can't read an entire page at once (NAND flash)
I am working for quite a while now with a GD5F1GQ4UCYIG from GigaDevice. The goal is to dump the content of the flash.
To do so I use a BusPirate. The NAND flash itself is still attached to the board,...
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1answer
164 views
TTL Logic Gate Resistor Values
I've been teaching myself the basics of circuits for the last few months and have been enjoying going into chip schematics. I'm trying to understand why the resistor values are as they are. For ...
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1answer
68 views
Converting gates in XOR circuit to NAND gates
I have this XOR circuit:
I tried to write it using only NAND gates and this was the furthest I got:
According to my book, it should look like this:
I did this:
$$(x.y')+(x' . y) = ( (x. y')+(x' . y)...
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0answers
98 views
Is there a need for a third transistor in a NAND gate?
I was attempting to create my "own" NAND-gate S/R latch using NPN transistors (I know there are ICs available for that)
From my own knowledge of how transistors work, I came up with this circuit for ...
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1answer
43 views
User controlled storage devices existence
Today's memory devices have a lot of logic embedded before data is actually written onto the NAND pages.
An example could be wear levelling algorithm , FTL functionalities etc.
The typical life of a ...
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1answer
80 views
Why is there no race around condition in NOR SR latch when S=R=0(initially)?
When the IC gets connected to the Vcc+, both the NOR gates get the input 0 and 0 (low) which yields the output 1. Now since both the outputs are again connected as one of the input to each of the NOR ...
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1answer
77 views
Output on Pass-transistor NAND gate lower than expected
I have an assignment to design an IC NAND gate, consisting og 2 NMOS-transistors and a designed inverter as seen in figure 1 and 2.
But when measuring the output at Vout, we only get about 60% of the ...
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1answer
103 views
1 TTL IC -> inverter + 2-input NAND + 3-input NAND
I came across this question in my homework:
Implement the following gates using only one TTL IC: one inverter, one 2-input NAND and one 3-input NAND.
The type of IC they're talking about has 14 pins,...
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2answers
219 views
Can anyone help me to understand what these capacitors do in this design?
I have a circuit design makes a button latch on-off and drive a mosfet. When I energize the circuit Vout that drives thr mosfet is initially low.
After pressing the button, the button state changes ...
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2answers
114 views
Using NAND gates to construct OR/AND gates
I have this Boolean equation
B'*C'*D' + A*C*D + C*D*E'
and I was just wondering how to use nand gates to express this equation.
With the schematic the inputs are
NAND1 it is B'*C'*D'
NAND ...
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2answers
227 views
use minimum number of NAND gates to realize this boolean expression [closed]
How should I proceed to find the minimum number of 2 input NAND gates to realize this boolean expression. I am allowed to use both complemented and non-complemented inputs.
$$F = X.Y + Y.Z + \...
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1answer
102 views
CD4011BE (DUAL INPUT NAND GATE) not working
I am using my CD4011BE NAND Gate IC. I connected a 9V battery in the 14th pin. And grounded the 7th pin. Then I provided input in the first 2 pins. I took a 330 ohm resistor from the third pin and ...
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2answers
244 views
Is there an intuitive reason for why NAND gate is a universal gate?
Now I know the maths and logic to figure out that every boolean function can be expressed using only AND and NOT gates, which in turn can be expressed using only NAND gate and hence every boolean ...
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1answer
283 views
Problem with NAND gate in proteus
I was doing a simple logic circuit in proteus when i realised that something was going wrong.
It looks like the NAND gate provides high voltage to its inputs from nowhere. No errors provided, but if ...
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1answer
205 views
momentary switch latching circuit
I'm very new at all this and hope you will have patients with me, I'm trying to use this circuit diagram to turn a momentary switch into a latching switch, I though it would be straightforward but ...
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1answer
145 views
Which input of NAND is preferred and why? [duplicate]
Let A and B be two inputs of the NAND gate. Say input A arrives at the NAND gate later than input B. To optimize delay of the two series NMOS inputs A and B which one would you place near to the ...
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2answers
80 views
Negative pluse generator does not reach 0V
I'm using an Arduino board to generate a 125KHz square wave signal to feed into this curcuit:
simulate this circuit – Schematic created using CircuitLab
So this is what I'm receiving from my ...
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1answer
98 views
Identifying this logic gate
Could somebody please explain the two logic gates with only the one input, A and B, respectively??
It is a NAND gate, with a box just before it.
What is this box?
Why only one input?
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2answers
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More Fun with the CD4093 IC as Schmitt Trigger Oscillator. Any practical difference between circuit version with “Enable” pin and Without?
I built two Schmitt trigger oscillator circuits using the CD4093BE IC from Texas Instruments. The CD4093 is a quad NAND gate with Schmitt trigger inputs.
You can find the datasheet here: http://www....
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0answers
119 views
Which pins are required when reading and writing NAND flash?
I plan on reading and probably writing NAND flash on some embedded devices or USB flash drives.
I did not come across many examples for in circuit reading though I'd give that a try at first if ...
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1answer
60 views
Simplifying logic circuit [closed]
I've been trying to simplify a combinational circuit and wanted to know whether there was any simpler way of solving such questions. Do we have to find all the outputs and such or we can use a simpler ...
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54 views
Implementing with only NOR gates [duplicate]
I have an equation
y = ab + cb'
How would I implement this with only NOR Gates?
Thanks
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2answers
370 views
Minimum number of NAND gates to implement f(x,y,z,w)=x(y+zw)+yz'
As the title states, given a function f(x,y,z,w)=x(y+zw)+yz', what are the minimum number of NAND gates you need to implement f?
My first attempt at a solution was to draw a kmap to see if there was ...
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72 views
Acquire a “TIC” signal from a power meter
I'm trying to acquire the tic signal of a french power meter.
From the datasheet available here of the TIC signal we can find out that the signal is (page 7/38): 6 Vrms +/- 10% at 50 kHz
It comes ...
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2answers
210 views
Can I lower flash power consumption by pre-flashing all values to high?
I am designing an embedded system that will use either embedded flash memory or an SD card.
The system must survive without much power and the estimated 30mA draw of an SD card sounds too high for me.
...
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1answer
47 views
NAND Simplified with xy + !x z
I've been trying to work on a few problems, though I'm not sure how to rewrite this a few circuits using only NAND/NOR -->
an example is shown below;
How am I able to rewrite only using NAND + NOR ...
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1answer
163 views
How can i make f(a,b,c) = \$A \cdot B \cdot \overline C + A \cdot \overline B\cdot C\$ using only XORs and NANDs?
i have this problem where i need to make the Logical Function represented by :
f(A,B,C)= \$A \cdot B \cdot \overline C + A \cdot \overline B\cdot C\ \$ using only XORs and NANDs
The function was as ...
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1answer
98 views
How to know the size (W/L) for a circuit to source or sink a minimum of 4 times as much current as a minimum sized conventional inverter?
Consider the tri-state NAND below (i.e. if EN is high, output is NAND of A&B; if EN low, output is
floating. Assume EN and ~EN always track). Show work.
a) Label each transistor with a size which ...
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3answers
61 views
Low voltage form a NAND logic gate then the state is high
I've been trying to learn how to use logic gates. I wanted to use logic gate to bump digital signal from 3.3V MCU to a 5V. I took a T74LS38D1 and mocked the solution using two switches connected to 3....
0
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1answer
41 views
Implementing a simple logic equation
I need to do a lab that seemed like it was simple, but for some reason i cant get the right output for this function. its G(0)= T1T3'+T5T7'. These are data inputs.. I can only use NAND and NOR gates. ...
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0answers
79 views
MOSFET burn down due to droping logic level voltage [duplicate]
I made 2 PCB, one is a logic driver with NAND Schmitt trigger (74HC132D & CD40106B) to drive FORWARD and BACKWARD of H-bridge channel, the other board is the H-bridge Power MOSFET, which used 4 P ...
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1answer
343 views
H-bridge MOSFET NAND gate driver suffered from logic voltage drop
I've tried to reproduce the NAND Schmitt triggers circuit to drive my H-bridge MOSFET as per following source:
http://axotron.se/index_en.php?page=34&chapter=0
All my design files are at this ...
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2answers
3k views
How to extract data from an NAND chip with an NAND reader from iphone 6? [closed]
I am not an electrical engineer and I cannot take phones apart.
I had an iphone 6 that suffered no water damage, no smashed screens, no dust... but suddenly it got an NAND memory issue. The phone ...
