Questions tagged [nand]

Use this tag when referring to any circuit that uses NAND gate / NAND logic, or for asking questions relating to NAND gates.

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Mux 2:1 with NAND gate and function generator

I want to simulate the operation of a 2:1 mux using only NAND gates. I want to insert two square wave signals and obtain the corresponding result depending on whether the selection is 0 or 1. With the ...
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2 answers
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SR flip-flop with Preset and Clear should not work as described

In the presented flip-flop, suppose the Enable signal is high, the S is low, and R is high. Now we set the Preset low (0) and the Clear high (1). In this condition, we expect Q=1 and Q'=0. But ...
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Minimizing logic expression for two-input NAND gate implementation

I have recently been struggling with this homework problem that is requiring minimization of a logic expression to be implemented using all NAND gates. The problem requires a very small number of NAND ...
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Why is this NAND gate not turning on with both inputs off?

Problem I am trying to simulate a circuit that acts like a memory bit in Logisim Evolution but for some reason the NAND gates don't turn on with both outputs set to 0. I suspect that the problem ...
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NAND output connected to P-MOSFET gate

I am connecting an NAND logic gate output to a Pchannel mosfet gate and intending under normal conditions to sink current into the NAND output. But there are two scenarios about this setup which are ...
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How can we know that when n1 and n2 is 1, the output is 0? What makes the circuit a NAND?

We start with the obvious part of the circuit, N1 and N2 are in series. I was given the truth table, where both N1 and N2 are 1, then the output is 0 and the rest is 1. By this picture, how can we ...
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Can circuit without memory give output depending on the order in which input pins were activated for non-commutative operations?

Going trough making small NAND based computer. I have two input pins zy (zero 16 bit Array y), ny (negate bitwise 16 bit Array y). Implementing each one separately or in connection is no problem but ...
2 votes
1 answer
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Modeling a NAND flash cell (a MOSFET with a floating gate)

After checking the ADS component palette, I found there are some MOSFET models available but there are no NAND flash cell models. How do I create one? A NAND flash cell can hold different states (...
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T flip flop from NAND gates

I recently was interested in whether a T flip flop could easily be made from NAND gates. A google search did reveal lots of examples that basically all look like an RS flip flop with two additional ...
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Convert boolean expression to nand gate only. X = A'B'C+AB'C'+A'B'

I have already made a diagram. However, it won't match the truth table that I have made, which I got from the logic converter in multisim. Could you please help me out with where did I go wrong? Is it ...
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How to invert a NAND gate IC and have it work like an AND gate IC?

I have created this circuit design using tinkercad. I thought I had two 74HC08 IC:s. Turns out I only have one. Can I replace the second 74HC08 with an inverted 74HC00 and if so how do I do this? If ...
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How do I make a NAND SR-latch with transistors

I'm trying to make a NAND SR-latch using only transistors, by combining a schematic for a NAND gate and a schematic for an SR-latch. The resulting circuit looks like this: (One thing not shown is ...
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NAND read returns 0 blocks

I need to perform a firmware extraction, so I extrcted the NAND TSOP48 chip from the board. Chip part no: S34MS01G200TFI00 Link to chip: link to chip I then mounted it on a NAND reader Link to NAND ...
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1 answer
184 views

Line follower robot using only NAND gates

I'm stuck on this and would appreciate some pointers. So for class I have to figure out the logic for a line follower robot using at maximum 8 NAND gates (two 74HC00 Quad NAND ICs). The robot has ...
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Trying to drive the clock pulse of a counter by a NAND gate output but the counter misbehaves

I have connected the output (2Y) of the NAND gate to the clock pulse (CP0) input of the counter, but as soon as I send an input to the NAND gate the counter misbehaves; it does not count in sequence ...
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CMOS logic gates | Number of Logic Gates issue

I came across this question for CMOS logic gates: Question - "Draw the schematic diagrams for CMOS logic-based implementations of f = a(b + c) + bc. Use minimum number of gates. Assume that all ...
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What's the difference between normal read and fast read on the W25N01GVxxIG?

I noticed that there were two separate instructions to read data from the data buffer of the W25N01GVxxIG flash chip. There is Read Data(0x13) and Fast Read(0x0B), but their descriptions seem to be ...
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NAND circuit from boolean expression

What is the best way to convert following boolean expression to circuit based only on NOT, NAND gates? I already done OR, AND circuit. But what is the method to receive that?
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Fan-Out Calculation on LTSpice

I need to find the fan-out of the circuit below. This is a Schmitt Trigger TTL NAND Gate. How can I exactly find the fan-out of the given circuit using LTSpice or calculate it theoretically?
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3 answers
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Intuition for building OR gate from NAND gates

The problem was to build an OR gate from NAND gates. I managed to do this in a kind of brute-force way just trying different variations, and finally got it but am feeling unsatisfied since I don't ...
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Memory Mapping Table

I am a begginer in the field of microcomputers and their architecture and recently I got an assignment with the following instructions: With the use of the mapping table find out which adresses in ...
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Is there some way to differentiate between NAND and other flash types on a PCB?

Modern devices (smartphone, notebooks) often use some kind of flash for data storage. Depending on the vendor this can be emmc, ufs, nvme and maybe even plain old NAND. The problem is you can't really ...
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What does the "source-like" symbol mean in the first NMOS of the CMOS NAND gate?

I would assume that it means the source is not left floating if Q4 is off (boot-strapping ?).
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Boolean Logic - Realization with using only 4 NAND gates

I am currently preparing the next semester of my program at university and I am stuck at a question of the "Digital Circuits" class. Here is the task: [...] pump P1 runs when the fill-level ...
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Is a NAND flash chip better for power saving purposes as a micro SD card?

I know, they are technically the same, but from what I read, NAND flash chips can be controlled better like putting it into standby and waking it up in the matter of a few nanoseconds, which could be ...
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Generating random bits using two oscillators and a D Flip-Flop

I'm an electronic musician and computer science student I have been tinkering a lot lately with Arduino and analog ways of sound synthesis. Mainly I've been using 4093 ICs (NAND gates) to make ...
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SR Flip Flop Latches

Which gate, NAND or NOR is a better choice for making SR Flip Flop latch? Please, provide the reason too.
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Method to realize any function with 2 input NAND/NOR gate

I'm preparing for a competitive exam where often these type of questions are asked Find the minimum number of 2 input NAND gates required to implement the function F(A, B, C, D) = AB + ACD + BC’ ...
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How to find NAND logic with the help of full adder?

Obtain a NAND logic diagram of a single full-adder from the Boolean functions: C= xy+xz+yz S= C’(x+y+z)+xyz I didn't understand the question. What do I have to do here? Do I have to simplify the ...
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How can I make this symmetric non-overlapping clock using digital Logic components?

How can I make a (dead-time) non overlapping symmetric clock like this with digital components such as inverters and NAND gates with 7 separate phases? The first photo is doctored to show what I want ...
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Why is the PMOS in NAND gate in Parallel and NMOS Series?

Why is the PMOS in Parallel, and the NMOS is in series?
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What NAND gate chips should I use to create a simple computer

I have been reading the bool 'The Elements of Computing Systems' and I have designed a circuit for the computer that will use 1232 NAND gates, which assuming that there are 4 on a chip, is 308 chips. ...
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2 answers
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Multiple Switch Equation to NAND Only equation

I'm trying to convert a regular Boolean equation that has multiple inputs into a NAND only equation. My guess is that I'm supposed to convert using DeMorgan's law, but I'm not entirely sure how to do ...
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Implement \$AB \overline{C}+\overline{BC}\$ using only a maximum of three 3-input NAND gates only

I need help with this question, I am lost.
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Does a secure erase on a SSD with lots of free space cost less P/E cycles than an SSD that's almost full?

Doing an ATA Secure Erase on an SSD should reset all of the cells to factory condition, which results in a program/erase cycle on cells at least in blocks that contain data. On self-encrypting drives,...
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Realizing an XOR expression using NAND gates [duplicate]

I've been trying really hard to understand the construction of a logical circuit using only NAND while also trying to minimize the number of gates. The minimization of gates is what is really ...
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SN74LS26 2-input NAND gate. No output

I purchased SN74LS26N quadruple 2-input NAND Gates chips for my circuit. Before I insert any chip into circuit I test it on separate breadboard. So I did with this chip and I get NO output when my ...
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1 answer
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What happens when you nand the same input?

I am trying to conceptually understand what happens to the output of the second nand gate when input into the 1st nand gate are combinations 00, 01, 10, 11.
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Circuit using only NAND gates

I am starting to get beyond frustrated with gates and breadboards now in general because of this simple circuit (which is literally experiment #1 in my digital logic class). Using only NAND gates, ...
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Can I read programmed content inside any sort of non-volatile re-programmable memory device with Microscope, X-ray, etc.?

Non-volatile re-programmable memory like NAND flash, NOR flash, and etc. stores information in forms of electron charges and doesn't change in structural forms that can be inspected with X-ray or ...
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NAND flash pull ups

I am new to electronics, but always wanted to build my own devices and decided to start with simple usb flash drive as a first project. I found some reference designs by cypress and it confused me a ...
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Digital electronics design

Our professor asked us to name the pins of the gates as below based on a chip pinout diagram he provided which includes only NAND and NOR but in the circuit diagram, there's a negative OR gate. Can ...
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Wear leveling and supply of voltage

Does anyone know if a NAND flash device (e.g. microSD) has to be continuously supplied with energy for its wear leveling algorithms work as designed? Or, if it doesn't matter if the device is (safely) ...
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File system to use with NAND Flash and 32 bit microcontroller

I am searching for a file system, suitable for NAND flash memory chips. Currently I use a Micron 256MB SPI NAND flash memory where I write and read raw sensors data but without a file system and ...
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Can't read an entire page at once (NAND flash)

I am working for quite a while now with a GD5F1GQ4UCYIG from GigaDevice. The goal is to dump the content of the flash. To do so I use a BusPirate. The NAND flash itself is still attached to the board,...
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1 answer
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TTL Logic Gate Resistor Values

I've been teaching myself the basics of circuits for the last few months and have been enjoying going into chip schematics. I'm trying to understand why the resistor values are as they are. For ...
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Converting gates in XOR circuit to NAND gates

I have this XOR circuit: I tried to write it using only NAND gates and this was the furthest I got: According to my book, it should look like this: I did this: $$(x.y')+(x' . y) = ( (x. y')+(x' . y)...
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Is there a need for a third transistor in a NAND gate?

I was attempting to create my "own" NAND-gate S/R latch using NPN transistors (I know there are ICs available for that) From my own knowledge of how transistors work, I came up with this circuit for ...
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User controlled storage devices existence

Today's memory devices have a lot of logic embedded before data is actually written onto the NAND pages. An example could be wear levelling algorithm , FTL functionalities etc. The typical life of a ...
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Why is there no race around condition in NOR SR latch when S=R=0(initially)?

When the IC gets connected to the Vcc+, both the NOR gates get the input 0 and 0 (low) which yields the output 1. Now since both the outputs are again connected as one of the input to each of the NOR ...