Questions tagged [nand]
Use this tag when referring to any circuit that uses NAND gate / NAND logic, or for asking questions relating to NAND gates.
0
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2answers
67 views
Negative pluse generator does not reach 0V
I'm using an Arduino board to generate a 125KHz square wave signal to feed into this curcuit:
simulate this circuit – Schematic created using CircuitLab
So this is what I'm receiving from my ...
0
votes
1answer
66 views
Identifying this logic gate
Could somebody please explain the two logic gates with only the one input, A and B, respectively??
It is a NAND gate, with a box just before it.
What is this box?
Why only one input?
3
votes
2answers
160 views
More Fun with the CD4093 IC as Schmitt Trigger Oscillator. Any practical difference between circuit version with “Enable” pin and Without?
I built two Schmitt trigger oscillator circuits using the CD4093BE IC from Texas Instruments. The CD4093 is a quad NAND gate with Schmitt trigger inputs.
You can find the datasheet here: http://www....
1
vote
0answers
31 views
Which pins are required when reading and writing NAND flash?
I plan on reading and probably writing NAND flash on some embedded devices or USB flash drives.
I did not come across many examples for in circuit reading though I'd give that a try at first if ...
2
votes
1answer
56 views
Simplifying logic circuit [closed]
I've been trying to simplify a combinational circuit and wanted to know whether there was any simpler way of solving such questions. Do we have to find all the outputs and such or we can use a simpler ...
0
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0answers
51 views
Implementing with only NOR gates [duplicate]
I have an equation
y = ab + cb'
How would I implement this with only NOR Gates?
Thanks
0
votes
1answer
122 views
Minimum number of NAND gates to implement f(x,y,z,w)=x(y+zw)+yz'
As the title states, given a function f(x,y,z,w)=x(y+zw)+yz', what are the minimum number of NAND gates you need to implement f?
My first attempt at a solution was to draw a kmap to see if there was ...
0
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0answers
59 views
Acquire a “TIC” signal from a power meter
I'm trying to acquire the tic signal of a french power meter.
From the datasheet available here of the TIC signal we can find out that the signal is (page 7/38): 6 Vrms +/- 10% at 50 kHz
It comes ...
1
vote
2answers
208 views
Can I lower flash power consumption by pre-flashing all values to high?
I am designing an embedded system that will use either embedded flash memory or an SD card.
The system must survive without much power and the estimated 30mA draw of an SD card sounds too high for me.
...
0
votes
1answer
31 views
NAND Simplified with xy + !x z
I've been trying to work on a few problems, though I'm not sure how to rewrite this a few circuits using only NAND/NOR -->
an example is shown below;
How am I able to rewrite only using NAND + NOR ...
-2
votes
3answers
70 views
Determination of read/write lifespans of NAND drives
I check around and there are various numbers for different manufacturers solid state drives as read and write life terms. At the very fundamental level input/output speeds of these devices are pretty ...
1
vote
1answer
94 views
How can i make f(a,b,c) = \$A \cdot B \cdot \overline C + A \cdot \overline B\cdot C\$ using only XORs and NANDs?
i have this problem where i need to make the Logical Function represented by :
f(A,B,C)= \$A \cdot B \cdot \overline C + A \cdot \overline B\cdot C\ \$ using only XORs and NANDs
The function was as ...
0
votes
1answer
54 views
How to know the size (W/L) for a circuit to source or sink a minimum of 4 times as much current as a minimum sized conventional inverter?
Consider the tri-state NAND below (i.e. if EN is high, output is NAND of A&B; if EN low, output is
floating. Assume EN and ~EN always track). Show work.
a) Label each transistor with a size which ...
0
votes
3answers
45 views
Low voltage form a NAND logic gate then the state is high
I've been trying to learn how to use logic gates. I wanted to use logic gate to bump digital signal from 3.3V MCU to a 5V. I took a T74LS38D1 and mocked the solution using two switches connected to 3....
0
votes
1answer
35 views
Implementing a simple logic equation
I need to do a lab that seemed like it was simple, but for some reason i cant get the right output for this function. its G(0)= T1T3'+T5T7'. These are data inputs.. I can only use NAND and NOR gates. ...
2
votes
0answers
73 views
MOSFET burn down due to droping logic level voltage [duplicate]
I made 2 PCB, one is a logic driver with NAND Schmitt trigger (74HC132D & CD40106B) to drive FORWARD and BACKWARD of H-bridge channel, the other board is the H-bridge Power MOSFET, which used 4 P ...
0
votes
1answer
213 views
H-bridge MOSFET NAND gate driver suffered from logic voltage drop
I've tried to reproduce the NAND Schmitt triggers circuit to drive my H-bridge MOSFET as per following source:
http://axotron.se/index_en.php?page=34&chapter=0
All my design files are at this ...
0
votes
2answers
1k views
How to extract data from an NAND chip with an NAND reader from iphone 6? [closed]
I am not an electrical engineer and I cannot take phones apart.
I had an iphone 6 that suffered no water damage, no smashed screens, no dust... but suddenly it got an NAND memory issue. The phone ...
-4
votes
1answer
161 views
TTL NAND logic circuit
how can find the maximum fan-out of the TTL-NAND gate using LTSpice ? i tried to solve problem by hand, but the problem how to find fan-out using ltspice
0
votes
2answers
106 views
CMOS NAND Image
I was looking at this image which shows a CMOS NAND standard cell.
However, how can I see this depicts a NAND?
A CMOS NAND has parallel PMOS and serial NMOS transistors but somehow I can't see this ...
0
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2answers
151 views
Momentary Switch NAND Latching IC Burning and (Possibly) Faulty Logic
Problem:
My issue is that the momentary switch with NAND latching logic that I have designed is not functioning consistently. It does work as intended at first, but then fails to work after repeated ...
1
vote
1answer
491 views
Latching Press-on / hold-off toggle switch circuit. Works on breadboard not on PCB
I followed a schematic and mocked up a Latching toggle switch with NAND gates. (see picture below for what I followed)
(Source)
I have mocked it up onto a breadboard. Using the exact same values of ...
0
votes
1answer
53 views
How can i simulate this circuit to match with the truth table?
How can I simulate this NAND logic circuit to match the truth table?]2
0
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0answers
51 views
Writing unused areas of a page on a NAND flash
I'm working on a project based on the ESP32 that uses a NAND chip from the GD5F1 family (link to the datasheet). Sorry for the long question, but it's a bit convoluted, and it's driving me nuts for ...
1
vote
2answers
196 views
nand gate astable vibrator do not work at 400kHz
I want to build a 400kHz square wave oscillator with NAND GATE using the CD4011BE circuit.
Unfortunately, it does not work as expected when I use R2 and C values according this schematic:
...
0
votes
1answer
45 views
Alternative for adder out of NAND-gates
Recently I was experimenting with the NAND-gate representation of an adder circuit and tried to implemenent it without crossing wires. So I got this:
The carry is negated, but when chaining two of ...
8
votes
5answers
3k views
Is the NAND logic gate perfectly symmetrical?
In other words: if we swap A and B, will Q behave exactly the same in DC and transient analysis?
0
votes
1answer
366 views
Current and Voltage in CMOS Logic Gate
So, in the NAND gate below, I understand how it works with the p-type and n-type transistors. However, my question is what happens with the current when the output is connected to Vdd? If the voltage ...
0
votes
2answers
155 views
NAND flash retention using USB charger?
NAND-based digital flash data storage devices such as SD,SSD,USBstick,eMMC,UFS,etc. do have transistors, where the small amount of electrical charge does slowly leak over time, resulting into data ...
0
votes
1answer
72 views
NAND technology - ecc error
Nand technology has some issues, which I find it a bit difficult to understand.
It is said in nand devices that manufacture guaranty that a page will have no more than X (4/8/16,etc according to nand ...
1
vote
1answer
65 views
Transforming logical circuit in NANDs and ORs [closed]
I can't transform this circuit in an exclusively NOR and another NAND circuit.
Everytime I tryed to simulate both circuits, neither of them gave me the correct result.
F=(notB)+AC
English is not my ...
0
votes
1answer
108 views
Circuit design using only NANDs and Inverters
So I'm having trouble with some circuit design for class.
We're given a truth table with 4 inputs and 2 outputs. I have karnaugh maps for the inputs and simplified my boolean expression. We have to ...
0
votes
2answers
744 views
How would I draw A'B' + B'D + A'CD using only NAND Gates?
I keep getting stuck when trying to draw this out. Mainly because the NAND Gates we are using are 2 inputs one output.
1
vote
2answers
258 views
Create a circuit with max 6 NAND gates
We need to make a logic circuit, the given function is:
f= (AB) + (not(C)) + (not(A)D)
I already tried a bit, and I can manage to make a circuit with 7 NAND gates but not with less...
Could anyone ...
0
votes
1answer
61 views
Embedded External Flash Device using NAND architecture
Our SoC device supports both external NAND devices as well as Multi-IO/QSPI NOR devices.
I can use either of them.
Now, for NAND device, it will store only Program Code and Const Data.
That means SoC ...
1
vote
1answer
144 views
AND/NAND LED Flasher circuit help?
I've come across a circuit I'm not too familiar with:
(Goggle Drive version)
How do I tune R1, R2, R3, and C1 to adjust frequency and duty cycle?
I get the general idea of how it works, but I've ...
2
votes
3answers
339 views
CD74HCT03E NAND Gate dont work
First of all I am new to this whole circuit building thing so please don't be too harsh on me.
I recently tried to build my first adder with NAND gates. So I went to a shop and bought some CD74HCT03E ...
0
votes
1answer
655 views
nand gates inverter
There are 2 ways to use 2 input nand gates as a inverter. I know one of them, which is make 2 inputs connected to one input signal.
simulate this circuit – Schematic created using CircuitLab
...
1
vote
1answer
2k views
Bitwise shift operation from NAND?
I'm building an 8-bit computer using the Ben Eater's videos and I would like to improve the ALU, e.g. add nand bitwise operation because every logic gates can be built from this.
But I ask myself if ...
0
votes
1answer
465 views
Equivalent circuit composed entirely in NAND gates
Summary / Instructions
I was given this problem in a test paper:
Take this circuit
and make an equivalent one only with NAND gates.
The problem
I've tried, with multiple combinations but almost ...
0
votes
1answer
125 views
obsolete DTL chip substitution
I'm trying to substitute the obsolete NAND chip in this circuit (part of an audio synthesizer) with a standard CMOS one (for example CD4011).
The original NAND chip is a DTL chip by Motorola, MC846.
...
0
votes
1answer
7k views
TTL NAND gate (totem pole) current and voltage analysis
I am working on a few practice problems for my course and I am unsure about my working throughout.
hoping for some feedback and guidance from the community as it's not my strongest topic.
Here is ...
1
vote
5answers
978 views
Purpose of resistors in a NAND gate
I'm trying to build some logic gates out of transistors to eventually be able to make a full adder circuit. I've tried building a NAND gate multiple times but I can't seem to be able to get it right. ...
1
vote
1answer
76 views
Logical effort and delay estimation
So as I have understood the logical effort for a 2 input nand gate with only one of the inputs active = 4/3. Furthermore the net logical effort is 8/3 (considering both the inputs). Now given that the ...
0
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1answer
68 views
Does repeated NAND flash erasing cause more wear?
That is repeatedly erasing pages without programming them. Or does it have to be a erase/program cycle to count?
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votes
2answers
439 views
Nand gate for binary addition instead of XOR gate
i am a novice to electronics,actually i am java and android developer who doesn't know the very basic concepts of computing and trying to learn from ground level.
i was checking out a video which ...
-3
votes
2answers
348 views
Using only NAND and NOT gates to represent a logic function that isn't an SOP/POS?
I understand that I should repreatedly use deMorgan's theorem until I am left only with NAND/NOT gates. This is easy when the starting function is an SOP/POS. However when it isn't, I get confused as ...
4
votes
3answers
390 views
TTL NAND analog amplifier does not work in Multisim - why?
I have found in Dieter Nuhrmann's book an interesting approach to amplifier circuit and decided to test it.
Unfortunately the Multisim simulation does not work as expected. The signal is not ...
0
votes
3answers
525 views
Implement AND gate multiple ways (positive & negative logic)
Could somebody explain to me how how negative and positive logic works? If I have an AND gate the truth table will be
x y z
0 0 0
0 1 0
1 0 0
1 1 1
If I wanted ...
0
votes
1answer
127 views
Does the microcontroller need to support a given filesystem in USB Mass Storage Class scenario?
I've been thinking about designing a small flash drive of sorts with the AT32UC3A3256. I'm planning on using e.MMC managed NAND which I can hook up to the MCU without a problem. Just wondering does ...
