Questions tagged [nand]

Use this tag when referring to any circuit that uses NAND gate / NAND logic, or for asking questions relating to NAND gates.

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TTL NAND gate (totem pole) current and voltage analysis

I am working on a few practice problems for my course and I am unsure about my working throughout. hoping for some feedback and guidance from the community as it's not my strongest topic. Here is ...
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2answers
358 views

Multiple Switch Equation to NAND Only equation

I'm trying to convert a regular Boolean equation that has multiple inputs into a NAND only equation. My guess is that I'm supposed to convert using DeMorgan's law, but I'm not entirely sure how to do ...
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3answers
3k views

What is the point of converting everything to NAND/NOR and how do you do it right?

The title pretty much says it all. I know that A' + B' = (AB)' is the basic transformation needed to do so (at least for NAND gates), but whenever I apply this I feel like I'm doing it wrong. For ...
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2answers
71k views

Making a logic circuit with only NAND GATES?

I am trying to create a logic circuit using only NAND Gates for this expression: (NOT Q AND P) OR R This question has really gotten me stuck! Can somebody please help?
2
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3answers
527 views

NAND with LED not working

ive been trying to create this small circuit but its not working. The truth table should be that of a NAND gate, but instead i get this: A|B|Q 0 0 1 1 0 1 0 1 0 1 1 0 I've put up the circuit in ...
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1answer
477 views

Different voltage characteristics of CMOS NAND gate for different connections

Recently, I've played with a simple 2-input 1-output NAND gate realised in CMOS technology as shown in Fig. 1. Fig. 1. CMOS NAND scheme. I took some measurements of volteges U(output) vs. U(input). ...
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1answer
426 views

H-bridge MOSFET NAND gate driver suffered from logic voltage drop

I've tried to reproduce the NAND Schmitt triggers circuit to drive my H-bridge MOSFET as per following source: http://axotron.se/index_en.php?page=34&chapter=0 All my design files are at this ...
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2answers
7k views

CMOS tri-state buffer internal structure

I was trying to understand the CMOS tri-state buffer internal structure with logic gates... The image is similar to this one: Anyway, I'm not understanding the logic I think something is escaping: ...
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1answer
3k views

Monostable out of NAND gates

For the diagram below, I can see that it functions as a monostable (I have built and tested it), but I can't really see why it works, I mean, I can see that there is an RC network, which a monostable ...
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1answer
540 views

TTL Logic Gate Resistor Values

I've been teaching myself the basics of circuits for the last few months and have been enjoying going into chip schematics. I'm trying to understand why the resistor values are as they are. For ...
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5answers
2k views

Purpose of resistors in a NAND gate

I'm trying to build some logic gates out of transistors to eventually be able to make a full adder circuit. I've tried building a NAND gate multiple times but I can't seem to be able to get it right. ...
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3answers
530 views

Implementation of NAND gate

The image below shows a extremely simplified circuit diagram. I do understand the logic behind that. However, the other image(below) is the one i dont understand. It shows a circuit diagram ...
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2answers
435 views

NAND flash retention using USB charger?

NAND-based digital flash data storage devices such as SD,SSD,USBstick,eMMC,UFS,etc. do have transistors, where the small amount of electrical charge does slowly leak over time, resulting into data ...