Questions tagged [nmos]

A n-channel metal-oxide semiconductor (nMOS) transistor has n-type carriers in the channel. A positive voltage on the gate turns inverts the substrate (PWell) creating the channel and turning the device on. The term may also be used to describe logic circuits built around nMOS transistors.

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Create NMOS in ADS [duplicate]

I want to create a nmos using ADS. What parameter values should I give be besides the Length and Width? also what gate voltage I should give to turn the mosfet on?
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Calculating capacitance in a MOS capacitor

A \$MOS\$ capacitor with \$t_{ox}=10nm\$ has an \$n^{+}\$ polysilicon gate electrode and an \$n\$-type substrate with doping concentration \$ N_D=10^{15}/cm^3\$ . Given: \$V_T=kT/q=26mV\$, \$\...
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Could we use holes in an NMOS?

In an NMOS we have a p-substrate, and we use a positive voltage to attract negative charge "to the top". But could we have used negative charge to attract holes instead and gotten a "...
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Water level indicator using CMOS inverter

I want to build the below circuit. The circuit has three levels to indicate water. low->o/p LED. Medium->O/P LED. High->O/P LED + Buzzer. Each level has two types of MOSFET; they work as CMOS ...
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MOSFET failure in a high power AC-DC SMPS buck converter

I've made a AC-DC step down buck converter that converts 220 VAC to a variable 45 to 70 VDC at 5 to 10 A to charge a Li-Ion battery. I'm currently using ESP32 to drive a MOSFET driver (IR2110) to ...
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How do you go from gate level to transistor level?

Is there a good method to go from circuit at gate level or truth table to transistor level, other than trial and error? I have an example here to illustate what I am asking. We have the function \$X=(...
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How does the CMOS Schmitt trigger work

I have some questions on how the schmitt trigger works. Assuming we start with low Vin hence Vout is high. It means that M1 is ON thus the source of M2 is conducting Vdd hence M2 is On as well. ...
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Why choose pmos over nmos

In the attached schematic, there are two branches. The branch on the left has a pmos + nmos transistor. The branch on the right has two nmos transistors. The sizes of the devices were selected such ...
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Characterizing "quadratic current" in an NMOS

I'm designing an integrated circuit where a series of NMOS with their sources tied to GND and their drains tied together work as parallel current sources. The total added current \$I_D\$ that I'd like ...
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N-Channel MOSFET with source not connected

I recently saw a circuit that left the NMOS's source open without connecting to any terminal. Gate: A pull-up 10 kΩ resistor to 3.3 V. Drain: A pull-up 10 kΩ resistor to 3.3 V. Source: Nothing ...
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NMOS as a switch [closed]

I'm doing some simulation with nmos transistor, which supposed to act like a switch according to this picture: but after doing the simulation, I get these results: I don't understand why the output ...
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PMOS/NMOS current direction and digital logic

What happens when the PMOS source is connected to negative Vcc (-Vcc). What I understand is that when the gate voltage is <=0 then the drain-source is connected. Normally I would expect current to ...
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Is an NMOS device symmetrical with regard to its D and S pins? [duplicate]

Can D and S be swapped? (Assuming the body is not internally connected to S.) The structure of a MOSFET is totally symmetric. Even the LTspice simulation shows that it can be swapped. Does this ...
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How is common source NMOS stage with active current load realized in practice?

In a well known book about CMOS circuit design (Design of Analog CMOS Integrated Circuits) I found this example about a cascode stage with current source load. The basic idea is, to replace the drain ...
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What are the limitations of AC coupling a MOSFET gate?

I came up with this AC coupled half bridge for high positive and negative voltage output with logic level control that I cannot find in any resources about (probably due to wrong search terms): It ...
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NMOS Cascode Logic

I have following problem and I ask you ,if possible, any help to resolve it. Size the following circuit so that it achieves a 100 ps delay (50-50) using 0.25 μm devices, while driving a 100 fF load ...
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Using NMOSFET for driving negative voltage

I want to use NMOSFEts for driving negative voltage. Is it possible to use it?
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How to determine which terminal of a MOSFET is source, drain or gate [duplicate]

I am a student and for my next exam, as part of the tasks, I need to identify which terminals (pins) of P and N type mosfet are gate, source and drain. I have an example photo here, but if possible, I ...
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How to do NMOS modeling analysis in Spice

Here is my circuit in Spice: I want to do a simple analysis of the NMOS like this: What kind of command should I use?
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Analyzing circuit that cascades a pseudo NMOS inverter with a CMOS inverter

I have simulated this circuit in LTSPICE and it seems that the output is only High for A = 0 and B = 0. In other words, the circuit behaves similar to a NOR gate. However, I'm having trouble analyzing ...
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To turn a ratioed circuit into non-ratioed circuit, what should be the transistor sizes for proper operation of this circuit?

The circuit is at the bottom. I know it is a ratioed circuit however, how can I convert it to a non-ratioed circuit without adding two more PMOS transistors between Vdd and the other PMOSs. Also, what ...
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Separating power ground from control ground to exceed NMOS threshold voltage

I'm a novice circuit designer looking to create a high voltage source follower NMOS circuit. I originally planned to use a Teensy digital I/O pin as the gate control signal, so when the Teensy ...
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Intrinsic gain of NMOS

In Razabi's Design of Analog CMOS Integrated Circuits textbook, the example 3.2 asks for the small signal voltage gain of the circuit below: He explains that since the current source I1 introduces an ...
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D2PAK 2-pin NMOS?

I was looking up high-voltage NMOSs on DigiKey and found this entry for model STB12NM60N. However, it appears to be a two-pin NMOS (at least, I'm not sure how that tab connects to anything). Based on ...
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Power switch PMOS controlled by button or Microcontroller (or both, with an OR circuit)

I´m trying to design an analog circuit to use a push button to turn on an MCU and then use it the same push button to change modes. A "one push button circuit". To achieve that, I used a ...
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N-MOSFET and NPN latching switch

I've seen many latching circuits through searching and reading some simple circuits. Most use NPN+PNP combination, some bistable ones use two NPNs, some use DPDT relays. Is the following circuit going ...
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Driving a Peltier Module via N-channel MOSFET H-Bridge

I'm working on a circuit to control a heating/cooling element (Peltier module) using an H-bridge. I'm using FDP8447L for that purpose. My Peltier is rated for 6 amps current and 15.4 Volts. The gate ...
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Will this work for power path?

My goal is to disconnect the battery while the device is connected to USB Input. However when the device is disconnected from USB power, the battery will be connected to the system load. I am using ...
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LED indicator controlled by MOSFET

I was just looking at a reference design and I can't see how this simple circuit makes any sense: It uses an EVERLIGHT LED and an NTZD3154N dual-transistor: I couldn't find the operation point of ...
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finding inverting vs non inverting functions

So Im learning cmos systems and Im struggling with the pmos and nmos part of it. So for example given F=minterms(m0,m1,m2...) I can do the kmap and get the function no problem but how do I know if ...
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VTC curve of cmos when Id does not saturate [closed]

For transistors, if the Id does not saturate at the saturation region (nmos: Vds>Vsg-Vt, pmos: Vsd>Vgs-|Vt|), but follow a linear relationship. How will the inverter VTC curve change? I am ...
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CMOS Transmission Gate Body Bias in 74HC4052

Page 2 of the 74HC4052 data sheet shows a diagram of a transmission gate. I'm curious about the way the body of the NMOS transistors is biased. It looks like when the t-gate is off, the body is ...
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Series transistor operation region

If I have all these series transistors with gate tied together, what is the region of operation of them? I saw multiple times that only one of them is in saturation and all the other is in triode. How ...
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Why we still observe leakage at gate when we ground source. drain, and body of NMOS?

Why we still observe leakage at gate when we ground source. drain, and body of NMOS? I think it has something to do with the gate oxide or capacitors but im not sure
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How does logic 1 get passed through an NMOS pass transistor?

I'm studying pass transistors. One thing I came across in several of the books is that when an NMOS has a logic state HIGH and the input terminal (the schematic below) is also HIGH, the output ...
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why there is a circuit breaker cut when I try to control NMOS

I'm trying to pilot NMOS but that doesn't work. simulate this circuit – Schematic created using CircuitLab No component is destroyed but the main electrical switch is broken, I have to ...
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Depletion transistor in 6502 nand gate

This NAND gate in the 6502, T2 and T3 are really easy to understand, they do A∧B. The output is before T2 and T3, to invert it. The T1 transistor is default-on. Why is it there?
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Does transconductance of a NMOS in saturation vary if I double both 'W' and 'L'?

Gm for a mosfet in saturation is 2Id/Vov. Vov is constant and we expected the Id to be a constant too for both cases since Id(sat)=0.5*UnCox (W/L)(Vov^2), W/L is unchanged and there for Id should be a ...
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N-channel MOSFET back to back do not turn off

I'm an hobbyist without experience in electronics, but I like to understand how the things works. Just now I'm playing with a PWM solar charger circuit. After some research I produced a schematic, ...
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Noise on LT1624 with shutdown function

In the circuit bellow, based on an LTC1624, with the SHDN input low, the Ith/RUN pin is extremely noisy, with spikes dropping way below the 0.8V shutdown threshold. As a consequence, the circuit can't ...
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Would an enhancement MOSFET work if there were no minority charge carriers in the substrate?

In an enhancement MOSFET, the channel is created from the minority charge carriers in the subtrate, attracted by the gate polarisation. Consider for example an NMOS. The substrate is P. If the P ...
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Is my summary of transistor behaviour (on or off) in saturation mode correct?

In the following Table, I made a summary of my understanding of the configurations in which the various sorts of field-effect transistors are on or off, in saturation mode. Is my summary of transistor ...
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MOSFET symbol - direction of source terminal

There are two possible illustrations of MOSFETs : with an arrow, and without an arrow. example for NMOS with arrow : example for NMOS without arrow : example for PMOS with arrow : example for PMOS ...
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Are NMOS and PMOS semantically meaning *enhancement* NMOS and PMOS?

Are NMOS and PMOS semantically meaning enhancement NMOS and PMOS? If so, how are depleted NMOS and PMOS called?
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Can a ggNMOS be implemented discretely on a PCB?

Reading this answer, I ran across the ggNMOS for ESD protection. https://electronics.stackexchange.com/a/576935/166672 Reading on the web a little, it seems that this is only used inside of an IC, not ...
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Can't turn on NMOS when using 1M pull-down resistor on gate

I am using ATmegA328P MCU to control ignitors which need about 500 mA current to work. To provide such current, I use AO3400A N-MOS to control the ignitors. In early design, I didn't use pull-down ...
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Switch on/off connection between variable voltage source and load

I am trying to switch on/off the connection between a load and a variable power supply (going from -10 to 10 V) using a combination of NMOSFETs and PMOSFETs. I want to use MOSFETs because of limited ...
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MOSFET FDN337N faulty (shorted)

We have a circuit like the attached. If the "+18V" was connected and the "power_on" was left(forgot, since they are from two different connectors) unconnected. FDN337N will became ...
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Short in MOSFET between Gate and Drain

I try to understand a circuit, where this is a part of: To me this looks like a short between the Drain and Gate in the pmos at the top and nmos at the bottom. The line from the top pmos to the right ...
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Why did this MOSFET blow up?

I have a DC drill with adjustable speed. I would like to add a battery protection circuit which shut-downs the motor if the battery voltage is too low. I would like to use the built-in slide switch ...
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