Questions tagged [nmos]

A n-channel metal-oxide semiconductor (nMOS) transistor has n-type carriers in the channel. A positive voltage on the gate turns inverts the substrate (PWell) creating the channel and turning the device on. The term may also be used to describe logic circuits built around nMOS transistors.

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43 views

What does a capacitor in parallel with a pull up resistor at the drain of a N mosfet do?

I am analyzing a past design that uses a GPIO to toggle the N mosfet on and off. The resistor is just a super long winded trace on a separate board. There is a capacitor in parallel with the resistor. ...
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MOSFET bootstrap switching circuit switching OFF problem

Currently I am designing a power switching circuit. The goal is to switch on a N channel MOSFET with a low side load. The circuit should work with input Voltages up to around 60 Volts. The switch is ...
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112 views

N-MOSFET Gate to Drain short and Vgs

I notice that in solution manuals to problems like these, when the gate is shorted to the drain on an NMOS, Vds = Vgs. So Vds >= Vds - Vtn, making the MOSFET always in saturation. I do not ...
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ALD1106/1107 transmission gate “off” state behaviour in LTSpice

I am making a transmission gate using ALD1106 NMOS and ALD1107 PMOS model files. For -5V (to NMOS and +5V to PMOS), with input 5V, the output should come 0 as the transistors would be in off state. ...
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30 views

Design a circuit to determine NMOS parameters

I am studying electronics independently, so this question is perhaps obvious for an engineering student. I know that, for the ALD1106 MOSFET, we can assume a typical \$V_t = 0.7 V\$. How could I ...
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54 views

Sharp transistor cut off outside active region

I'm building a simple temperature controlled NMOS switch for regulating the speed of a fan. It's a 12V fan and the controller works great (as long as the transistor is in it's active region.) This is ...
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23 views

NMOS Attenuator [duplicate]

Please what should be the circuit diagram which allows replacing R1, R2 and R3 by three identical NMOS transistors.
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45 views

2 N-MOSFETs in series

I'm trying to design a circuit to charge a capacitor bank with constant (limited) current and then discharge the capacitors through an LED. I've come up with the circuit in the schematic below, ...
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52 views

How do i get to study the impact of body bias on NMOS threshold voltage using LTSpice?

I am new to LTSpice. I have tried a design in LTSpice for the above requirement. But I dont get the plot for different values of body bias Vsb.
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Confusion with simulation result

I'm using iCircuit to simulate this circuit: I set the the threshold voltage as 0.7V. Here's my simulation result: It says the nMOS is in saturation mode. Since Vgs < Vth, should it be in off ...
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189 views

Why are two transistors or one transistor and a resistor used for a NOT gate?

We use one n-type and one p-type MOS transistor for a NOT gate or one transistor and one resistor. Why can't we use one transistor only without a resistor?
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back gate effect in low volatge circuits

1- In some circuits (Low voltage ones) the body of the pmos is connected to the gnd and nmos to the vdd. i wanted to know the reason behind this technique or in others words what's the idea behind ...
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Details regarding PMOS and NMOS transistors used as gates

My lab instructor explained very briefly what transistors are and started by naming them NPN and PNP then switched to PMOS and NMOS and I (as well as my classmates) am very confused, I need someone to ...
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How to write Boolean Algebra of a CMOS circuit?

How to write the boolean algebra of this circuit? I am confused with the inverter in the middle . Any help will be greatly appreciated!
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Why is the transfer curve of a real MOS not perfectly quadratical?

I am a student and trying to understand the MOS transistor. So I have simulated the transfer curve of a MOS in Cadence and done a parametric sweep for WL (500n, 1000n). Here you can see the plot sqrt ...
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Why is the PMOS in NAND gate in Parallel and NMOS Series?

Why is the PMOS in Parallel, and the NMOS is in series?
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High Voltage NMOS layout design in UMC130nm process using Cadence Virtuoso

I am required to design an NMOS switch in UMC130nm process which is capable of enduring approximately 10V VDS (drain to source) when the gate is 0V. And a current of approximately 50mA when the gate ...
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79 views

Reverse polarity protection using back to back NMOS

Designing a circuit to measure short circuit current of a power supply every second. Measurement will be on for about 50ms every second. Heat design has been made for this about of time not constant ...
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280 views

What does an NMOS transistor with the gate connected to the drain do?

I'm studying about PLAs and I came across this simple PLA design. What is the purpose of the highlighted transistors?
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68 views

Simulation doubt with Zener diode & MOSFET

I have the below circuit in which I am trying to perform simulations. Simulation Tool used - Falstad Simulator 12V Zener Diode Top MOSFET Bottom MOSFET Question 1 : The Zener diode is 12V Rated. I ...
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53 views

Switch individual MOSFETs connected across lithium-ion cell for passive balancing

I am working on a passive cell balancing circuit using N-MOSFET. The cell voltage will be monitored by the micro-controller and it can also generate corresponding logic level signal according to over ...
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45 views

I would like to know if the circuit is correct?

simulate this circuit – Schematic created using CircuitLab I have used the voltage follower concept in order to keep the output logic non-inverted.I would like to know the issues that I might ...
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196 views

Why it is preferred to use PNP and PMOS for pull-up, and use NPN and NMOS for pull-down

I have noticed that when I was designing universal logic gates like CMOS NOR gate that uses PMOS for pull-up and NMOS for pull-down. Then I faced it for second time with the H-bridge circuit, but ...
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215 views

Is the current, Ids, through a MOSFET truly 0 when in the cutoff region?

I was testing a circuit using this circuit simulator and found that the nMOS transistor had a current of a few nanoamps running through it when it was in the "off" state. This was unexpected because I ...
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108 views

Understanding the working of a NAND GATE using NMOS Transistors

I'm having incredible difficulties understanding how the "Switching Behaviour" (not sure if that's the correct English translation- in German it is "Schaltverhalten") for NMOS and PMOS transistors ...
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94 views

Deriving the NOT logic gate using PMOS logic

I recently started learning about Field Effect Transistors (FET's) and about the MOS circuit family. From my understanding NMOS is made from a p-type substrate and n-type source/drain, whereas the ...
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52 views

Why does this N-channel MOSFET not turn off?

I was playing around on CircuitLab to see if I can add an overvoltage cutoff to the reverse voltage protection circuit in TIs slva139. Using a zener, I expect OVS to start rising beyond the zener ...
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68 views

How do I design a RC phase shift oscillator using opamp with the help of cmos (pmos and nmos)?

Designing the opamp using cmos (pmos and nmos) to construct RC phase shift oscillator using opamp with the help of opamp (constructed using cmos.)
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High side mosfet- Extra pulse on turn off

I am making a 3 phase motor drive H-bridge using N channel mosfets (IRFB3607) and BJT based custom mosfet driver such that my turn on and turn off time is about 200ns. Right now I am testing the ...
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376 views

Do I really need the N-MOS driver here?

In this circuit I am wondering if I really need the n-channel mosfet to control my dual p-channel MOSFET. I think I can drive this straight from the micro. Just want to second opinion before I modify ...
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114 views

Can a N-channel MOSFET used as a highside switch

Hello I would like to add a high side switch for my circuit. Typically a physical switch can do this job but due to form factor restraints the switches that are rated for my application does not meet ...
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5answers
272 views

Improving dV/dt turn-on immunity of a mosfet without increasing turn-off time

I'm designing a solid state battery disconnect switch and I want to improve the mosfets' turn-on immunity (high dV/dt on Vds) without impacting the turn-off time. I don't really care about the turn-on ...
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37 views

Difference between transfer gate and NMOS switch in CMOS image sensors

I would like to know the difference between the transfer gate (TX) which is used in 4T CMOS Active Pixel Sensor (APS) as mentioned in the below image and a normal NMOS switch. As far as I know, the ...
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Bi-directional electronic switch for external circuitry

I am in the process of designing a PCB that is powered by a 10V / 1mA supply from a fandeck (incorporating EC/DC fan motors). One of the functionalities include having continuity between 2 pins on ...
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28 views

MOS circuit for RC circuit power

I am currently working on a circuit where we read the time it takes for a capacitor to charge depending on the load. I would like to know what is the purpose of the first stage with Q1 and Q2. I also ...
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49 views

What is the resulting Voltage Transfer characteristics of the modified CMOS-inverter circuit if NMOS and PMOS are interchanged?

What is the resulting Voltage Transfer characteristics of the modified CMOS-inverter circuit, if the positions of \$NMOS\$ and \$PMOS\$ are interchanged?
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48 views

Should you not go above max VGS for a Nmos?

I wanted to switch a relay with a raspberry zero, which uses 3.3v, after looking at my 16 years old electronic engineering notes (I'm in IT now), I moderatly re-understood how nmos works (controlled ...
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278 views

Why does nMOSFET keeps blowing up?

I have designed a Boost PFC circuit, But upon switch on transistor is getting blown up and fuse is burnt. So I removed transistor and just connected source to ground. the circuit worked fine. Then I ...
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58 views

Rs and Rd in series in MOSFET circuit?

Can we consider Rs and Rd to be in series? That is, is the equation ID = (Vdd)/(Rd+Rs) correct? What is confusing me is that they have the same current, but there's a voltage drop across the drain-...
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54 views

2 NMOS in series, connected source to source

I am working with DC2418A evaluation board (Link to datasheet is HERE) Schematic is on page 5 I am using version A, so we ignore Q1 My question is about Q2 and Q3: Why are they connected source to ...
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57 views

6T SRAM write operation calculations

C: Cut off , L: Linear , S : Saturation [keep in mind I am teaching this to myself ahead of time] I understand how to go about finding desired ratio (W/L) for read operation. In the image, M1 would ...
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51 views

Can ground and voltage terminals be connected by a wire?

Helo, I am working on an assignment for a circuit analysis class. I have always been a bit fuzzy about the following: Can I assume that the two top terminals are the same node, the two ground ...
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29 views

Is it possible to implement a high-side current mirror with only NMOS FETs?

I need to implement a difference amplifier only using NMOS technology. I am struggling when trying to reference the voltage difference to ground. From my reading it looks like I need a high-side ...
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81 views

Low Power Switching application With N-Mosfet

In my application I need to effectively switch on or off a very small load, around 0.5W to 1W. Also, I need to ensure that power loss is kept to a minimum. The voltage levels of my application will ...
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42 views

Parking Light And Signal light with same LED using MOSFETS

I have a project where I have an existing 12v parking light and I want to also have the turn signal use the same light. I've constructed a circuit using 2x NMOS and 1x PMOS. I think it will work and ...
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40 views

Biasing an Enhancement NMOS with Gate-Source Connected

I'm working on a university project wherein a full-wave rectifier is constructed using two enhancement mode NMOS transistors. I'm tasked with designing a biasing circuit for the NMOS', but I don't ...
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Additional V+ pin on ALD1106

I'm working with ALD1106 as part of a circuit I'm testing, but looking at the datasheet for the part, I'm confused by the addition of the V+ pin. It doesn't look like it's tied to anything in the pin ...
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275 views

Incorporating ALD1106 SPICE model in LTspice

I'm trying to incorporate a SPICE model of an NMOS IC, the ALD1106. I've used it before in class, but it's been so long that I've forgotten how to incorporate the files into LTspice in order to ...
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Deriving PU / PD given a sketch of a PMOS

For the PMOS given below I can derive the function f, such that f inverted in its variables corresponds to the expression of PMOS(f) and f inverted equals NMOS(f). For this specific problem I have ...
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Why would a Intel 8080 chip be destroyed if +12 V is connected before -5 V?

The Intel 8080 is a classic microprocessor released in 1974, fabricated using an enhancement-mode NMOS process, and shows various unique characteristics related to this process, such as the ...

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