Questions tagged [nmos]

A n-channel metal-oxide semiconductor (nMOS) transistor has n-type carriers in the channel. A positive voltage on the gate turns inverts the substrate (PWell) creating the channel and turning the device on. The term may also be used to describe logic circuits built around nMOS transistors.

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Why is this LDO circuit not working?

I am trying to generate 5 V with this circuit for a load of 100 mA with a 2% tolerance in the output voltage. I don't want to use LDO ICs due to various reasons. My intention here is to enable/disable ...
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What is the difference between an N-MOS FET and a tri-state buffer? [closed]

Is an N-MOS FET an equivalent of a tri-state buffer, where the source is the input, the gate is the enable, and the drain is the output?
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Finding the mode of a MOSFET

I'm trying to determine the state of MOSFET \$T_1\$ in the following circuit: We are given that the threshold voltage \$V_\mathrm{T}\$ is \$1.5\ \mathrm{V}\$ and that every voltage source is \$5\ \...
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CMOS (Energy Supply of voltage) [closed]

Can someone please explain why, when \$ln\$ is transitioning from low to high, the energy supplied is \$C_{vdd}\cdot V_{dd}^2\$?
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PMOS configured in common gate

This is an NMOS configured in common gate: I am trying to understand what a PMOS configured in common gate would look like. Would Vin and Vout be reversed in this case? So, would VDD be connected to ...
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How is the total gate charge of a MOSFET affected by the temperature?

For P- and N-MOSFETs, Vgsth will decrease (in absolute value) when the temperature rises. What is the impact of the temperature on the total gate charge for P- and N-MOSFETs? What is the order of ...
Rémi Baudoux's user avatar
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Is there a common N channel MOSFET with Pin1: Gate, Pin2: Drain and Pin3: Source?

I have designed a circuit in which I have used a BSS138 N channel MOSFET as a switch to turn on a 12V 50mA load from a GPIO. During the schematic design in KiCad, I have chosen the wrong symbol. These ...
WhiteShark's user avatar
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How to make a power switch using MOSFETs?

I am stumped on trying to create a circuit that, through an enable of 3.3V will let +18V go to the load or prevent it from doing so. This is my current approach. I know the pullup resistor should not ...
Noel's user avatar
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How can I take parameters from power NMOS and power PMOS transistors and translate these into LTspice simulations?

I am trying to simulate NMOS and PMOS power transistors in LTspice, but I keep getting error messages about the NMOS being duplicate. Some of the earlier LTspice file is here. I am trying to have a ...
Stephen Elliott's user avatar
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Is it always given that ground has lower resistance than output even If output is far closer in an inverting nmos? [closed]

Currently I'm learning about MOSFETs (N-MOS and P-MOS) --basically how a transistor works. My question is why does the current always prefer the grounding output even though it is further away than ...
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Inverting MOSFET drive circuit, is my scheme correct? [duplicate]

I am an automotive engineer student, building an inverting MOSFET driver (where a MOSFET drives and controls another MOSFET, Vin low -> Main MOSFET closed, Vin high -> Main MOSFET open). My ...
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Alternative to MOSFET transistors as a switch

I am looking for a 3-legged component that can be used as a switch as an alternative to an NMOS transistor. My circuit currently looks the following: - simulate this circuit – Schematic created ...
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Bootstrapping circuit vs. charge pump for high side switching

I am designing a circuit where I need to do some high side switching to turn on/off the power to a circuit (part of some protection circuitry). This switching is actually very slow and only occurs ...
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Channel Length Modulation in mos

The follwoing is a screenshot from youtube. According to the model on the left, it's easy to get $$I_{DS} = I_{DSAT} + \frac{V_{DS}} {\frac{1} {\lambda I_{DSAT}}} = I_{DSAT} + \lambda I_{DSAT} V_{DS} ...
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Io of NMOS in small signal analysis

The question is almost 7 years old and a few people seemed to be interested in this question. But the person who had posted the question said it's from textbook. I have doubt whether \$I_o\$ it's ...
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How to make fast CV/CC transition in linear NMOS regulator?

I want to design a linear regulator based on NMOS with CC/CV capability. I made a circuit with two separate loops (CC and CV), each of which is stable. The problem is in the transition moment when the ...
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How to make a PMOS work as a constant current source?

I have a circuit in which, the PMOS is biased to a voltage source, the gate voltage, V1, of the NMOS below varies based on the functioning of the analog circuitry before. Because of this, the current ...
Siva Sandilya's user avatar
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Electric-lock control via NMOS matrix

Currently I am working on the design that allows to control 8x8 electric lock matrix via PIC16F877A. As in comments for somebody it was not obvious (btw it was mentioned) I am using 64 electric locks ...
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NMOS as a low side switch

I am trying to use an NMOS(2N7000BU) to "turn off" the LM350 voltage regulator. I have an OR gate going into the gate of the mosfet, so either input will turn it off. The hope was to ground ...
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Can we use NMOS to drive WS2812

My ESP32 control circuits all use NMOS for external control. I wonder if the data control of WS2812 can be driven via NMOS?
murarduino's user avatar
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What does a thick MOSFET symbol mean?

I have come across a bag of about 5,000 n-type MOSFETs (2n7000), and I figured the best thing to do with them is to build a 6502. I found a diagram of the nMOS 6502 layout But I am confused as to ...
EvanTheGamer's user avatar
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Mosfet Linear Region LTspice simulation

I have a question regarding a mosfet simulation I am trying to perform. Here is the circuit in question. We can see that Vd=1kV , Vs=0V and Vg=10V(it is a pulsed source) Now to my understanding I ...
Dimitar Zhekov's user avatar
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the inverter switching point

As we know the mobility of the "nmos" device is 3x greater than "pmos", and when we want to correct the switching point of an inverter for vdd/2 we usually change the W of the &...
Vahe Armenakyan's user avatar
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N-channel MOSFET fails as an inrush controller

We have designed a inrush controller using the LTM9100 controller. The LTM9100 basically controls the ramp rate of the gate voltage, which in-turn controls the raise time of the DC bus across the load....
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MOSFET not saturating when Vds > Vgs - Vth

According to Wikipedia, the drain current (\$I_d\$) should stay relatively constant when \$V_{ds} > V_{gs} - V_{th}\$: (By User:CyrilB - File:IvsV_mosfet.png, CC BY-SA 3.0, https://commons....
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stages vs. frequency analysis of ring oscillator

I am currently working on ring oscillators and have stumbled across the following doubt. Upon practical analysis of CS-amplifier based ring oscillators on hspice(the not gates are comprised of CS ...
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R5613L understandig what MOSFET to use

I want to add a battery-protection to my circuit including a switch to disconnect the battery from the rest. I found the R5613L from Nisshinbo (Manufacturer product site with datasheet). On page 26, ...
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Gate-source connected MOSFETs for voltage division

Currently, I am engaged in the design of a Thermal Shutdown circuit for an LDO regulator. In this endeavor, I have obtained a circuit schematic from a senior colleague, which utilizes three NMOS ...
Arnab Deb's user avatar
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NMOS current is negative for a very short time when turning off

I am designing a circuit that uses the 2n7000 NMOS as a switch, controlled by a digital I/O pin from an Arduino Micro. I made a simulation in LTspice, and I notice that when the NMOS is turning off ...
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LTspice Half bridge current spikes

I simulated a half bridge with two NMOS and at every switching event a current spike up to 1.2 A in the voltage source V4 occurs. I used a resistor as load because with any inductive or capacitive ...
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NMOS is high when gate is low

I’m trying to simulate DRAM with N-MOSFETs with row and column selecting logic. When I select my column, which is connected to the source of an N-MOSFET, the N-MOSFETs in that column all turn on, even ...
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Transient Negative voltage on NMOS causing channel to open?

This is my first post here. I am an electrical engineer looking to cure my madness because a 2N7002 NMOS is doing things I cannot explain. If you look into the attachments, you will see some screen ...
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Parameter \$k\$ for MOSFET

Is the parameter \$k\$ used for the whole circuit or for every MOSFET in the circuit? For example the circuit has 2 MOSFETS and \$k = 1mA/V^2\$. If I want to find the \$Id_1\$ and \$Id_2\$, is k = 0.5 ...
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Problem with NMOS simulation in OrCAD

I have to run a simulation on how NMOS transistors work using OrCAD PSpice. Schematic: Simulation Profile: Simulation: As you can see the problem is that after sweeping VGS from 0 V to 12 V the ...
dim1221's user avatar
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How to shift 3.3V to 5V with 3.3V provided only

I am trying to control 5V LED using ESP32's 3.3V GPIO. I researched voltage shifting using NMOS but could not get it to correctly output 5V when simulated in Tinkercad. Is it possible to accomplish ...
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Which parameters should be compared to to replace N-MOSFETS with different package but with same pin functionality?

Since NTZD3154N is used a lot in my design, and I have BSS138PS only for used for one circuit, I want to replace BSS138PS with NTZD3154N in the following DP++ Auxiliary Conversion Block: Note: This ...
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What are NMOS level 1 CV equation and its main parameters?

I was asked to perform MOSFET CV modeling. I looked through some papers, but I still can't clarify what the CV model equation for a level-1 NMOS is, and I am also not sure what its main parameters are ...
Ko Stuart's user avatar
2 votes
1 answer
255 views

How can I separate the body from the source of a MOSFET?

The above are physical look of a decapsulated MOSFET and the diagram connection between the source (S), gate (G), drain (D), and the body. Both of them are kind of N-MOSFET. If you want to see how the ...
AirCraft Lover's user avatar
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671 views

What is the equation for the curve in an Ids-Vds graph that separates linear and saturated regions in a MOSFET transistor?

This curve separates Linear/Saturated regions in an Ids=f(Vds), with varying Vgs, graph for a 0.35um NMOS. I understand that I can connect the points where: ...
reanuk's user avatar
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Current flow in PMOS when not active

how can it be that Q2 is active when VA and VB are HIGH? If I understand correctly, a current (shown in yellow) should flow... But that is in my understanding not possible because both NMOS are ...
BukkitDEV's user avatar
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Benefits/downside of discrete high-/low-side NMOS/PMOS and high-side bootstrap NMOS switching circuit

What are the key features or rather benefits/downsides of these discrete switching circuits in comparison: Low-side NMOS High-side NMOS Low-side PMOS High-side PMOS Boot-strap NMOS circuit The basic ...
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H-Bridge only low output voltage; IRLZ-34N

I want to create a LED driver with the help of an H-Bridge. I have some experience with the IRLZ-34N and already created some simple inverter driver boards with it. But this circuit is giving me a ...
schoche's user avatar
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2 answers
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Adjusting the rise and fall time of a gate driver

I have a hard time understanding the specifications of the UCC27511A-Q1 gate driver. I understand that for a period of 0.5 μs (2 MHz) it can supply a source current of 4 A and a sink current of 8 A. ...
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Normally on at NMOS transistor to control another circuit

I need to design a custom board with the ability to control interlock of the laser mechanism. First of all, I have the product X with could get control from another circuit, this pin connect to ...
Knowledge's user avatar
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What is different in the manufacturing of differently rated MOSFETs?

The IRF540N is one of the MOSFETs I'm using, and the IRF510N. Both look exactly the same from the outside because they use the same packaging, but they are rated for different power levels. For ...
Rayyan Khan's user avatar
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Understanding the RDS(on) of an N-MOSFET

I need to calculate the time for C1 to discharge below 60 V using the following constant current sink if it is initially charged to 565 V (MOSFET's VGS(th): 4 V). At first, I looked at the MOSFET as ...
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How should I correct this NMOS static inverter?

So in my notebook I have this circuit scheme for a NMOS static inverter: Vi is the input Vo is the output VDD is the voltage source It is obvious that the M2 MOSFET will never turn on. Is the circuit ...
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Understanding N-MOSFET-based 5 V->3 V level shifter

Is there a simple way to know if a transistor is open or closed that doesn't involve writing equations and assuming that the transistor is open (passing current) and then by math finding out if it's ...
Firas Abd El Gani's user avatar
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Using MOSFETs controlled by GPIO pins to switch between two different sources

I need to switch between a constant current source and a programmable power supply to power a lamp. For both sources, I need to apply 7.6 V to the drain and have the 7.6 V outputted to the lamp. The ...
ray32's user avatar
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Is there anything wrong with using large values for L/W for a PMOS?

Worked on a project recently for a linear circuit design course. Professor gave us the requirements to build a 5T OTA circuit which must have a gain of 30dB, unity frequency of 200kHz, etc. Designed ...
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