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Questions tagged [nor-flash]

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Increasing voltage from 5 V VCC (i.e. logic HIGH) to 12 V during operation

I'm working with a handful of NOR flash chips that have a write protection mechanism where the memory can't be written to unless the blocks are unprotected. Evidently, unprotecting them requires the ...
Steve's user avatar
  • 11
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Can't enable W25Q for writing (using STM32F103)

I am trying to work with a W25Q128 and previous I got stuck with talking to the chip, but stackoverflow helped me and I was able to communicate with the chip. Now I am unable to bring the chip into ...
Rakesh Mehta's user avatar
1 vote
1 answer
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What is the difference of WP and HOLD pin of a flash chip (Ex: W25Q128)

I don't really understand how Flash Chips works, my current understanding of these pins is that you must hold the HOLD pin to be able to communicate with the flash chip , but Write Protect seems to be ...
Pablo's user avatar
  • 13
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Why do many SPI flash devices from different suppliers have specifically "25" at the beginning of their part number?

There is some nomenclature that I understand for SPI flash devices that indicate the memory size. When looking at the packaging and ordering information, I can see the following: Picture sources from ...
Colin's user avatar
  • 734
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External NOR Flash malfunctioning

External NOR Flash malfunctioning Part used: ZD25WQ16CTIGT Zetta NOR Flash We are using Zetta family 16MBit NOR Flash in a partitioned format. One partition is used as an emulated EEPROM, and another ...
EmbeddedEngineer's user avatar
2 votes
1 answer
190 views

Booting from NOR or booting from NAND

We're working on a new project, and we're considering using a TMS320C6657 DSP, or a similar DSP. There are many boot modes, NAND Flash, NOR Flash, Ethernet, etc. What are the pros and cons of booting ...
Ben's user avatar
  • 677
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What throughput should I theoretically expect when reading sequentially from parallel NOR flash?

Background: I'm trying to minimize the boot time of a u-Boot+Linux system running on a fairly powerful T4240rdb powerpc development board. Once in U-boot the process is as follows: A linux kernel ...
mortelsson's user avatar
1 vote
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NOR flash address lines

I am wondering if someone can explain how the address lines work on NOR flash. Does each address line map to a physical area in flash? as in A0= 0000-FFFF if this is the case and the NOR has 21 ...
Wellness 2 All's user avatar
1 vote
0 answers
114 views

Inconsistent replies from a Micron N25Q Flash

I have a board with a MT25QL128ABA SPI Flash from Micron, I am using simple standard SPI (no Quad). I do the following: Send Write Enable Send Erase Command (Program Command resp.) Repeat: Read the ...
Jens's user avatar
  • 111
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IMX6Q using SPI-NOR flash keeps crashing!

I'm kinda new to the whole board bring-up thing so please be patient with me. The problem: I'm getting lots of ext4-errors randomly and the whole thing eventually crashes after a few reboots. ...
Jing Hao Ngiam's user avatar
1 vote
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66 views

Does erasing a flash sector that is already erased cause wear?

Does erasing a NOR flash sector cause any wear if it is already erased (and no data has been programmed into it)? I.e. does an erase count as a program/erase cycle? Some data sheets refer to max ...
Ronnie Shipman's user avatar
2 votes
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185 views

Does NOR flash wear occur when rewriting a bit to its same value?

The obvious answer is no. Wear is caused by discharging a memory cell (bit). If the cell is a 1 and you write a 1, the cell does not get discharged. If the cell is zero and you write a zero, the cell ...
Maxwell Kunes's user avatar
1 vote
0 answers
86 views

Unable to get frequency on oscilloscope

I am using NOR flash IS25WP256D in my project. I configured a frequency of 80 MHz and a bus width of 4 in DTS, but when I observed with an oscilloscope I got 62 MHz. Why does this happen? These are ...
Chithra M G's user avatar
1 vote
1 answer
307 views

NOR Flash endurance: damage happens during Program or Erase?

In NOR Flash memories, the endurance of the device is generally measured in (P/E) cycles. This datasheet is a typical example. My question is, in a P/E cycle, when does the damage occur? If I perform ...
FrancoVS's user avatar
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1 answer
119 views

NOR flash ignores dummy cycle config (gd25b512)

I have existing code on a STM32F7 using qspi for a micron MT25QL512ABB that I am porting to use on a Gigadevice GD25B512ME. I am operating the bus at 108 MHz. The issue I'm facing is that the ...
Erik Friesen's user avatar
  • 1,963