Questions tagged [optimization]
The optimization tag has no usage guidance.
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0answers
27 views
Adjust LQR weights to improve battery runtime in two-wheeled-inverted pendulum
I'm currently doing a controls project involving a self-balancing robot(or two wheeled inverted pendulum). I have been able to stabilize the system with the use of PID and optimal state feedback.
...
0
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2answers
42 views
Altium Designer: Not assigning all the sub-parts of a device
I've been banging my head against this one for a while now and can't seem to find and answer anywhere.
I have a multi-channel design that uses a a quad comparator as the base part. However in the ...
1
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2answers
43 views
Optimizing magnetic field force of a coil
For a personal project, I've done a redesign of Samy Kamkar's MagSpoof project. Basically, it is possible to use an electromagnet, h-bridge, and microcontroller to trick a magnetic card reader into ...
0
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1answer
55 views
Optimization voltage divider measurement
How to design a voltage divider to optimize the measurement error?
Intuitively I would take the same ratio $$\frac{load}{divider} = \frac{divider}{measurement}$$
As follow: the voltage is roughly ...
1
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1answer
93 views
How to optimize a binary circuit?
I'm currently in the situation in which I need to optimize a binary circuit by reducing its number of gates.
We regard a circuit simply as a directed acyclic graph with some input wires and some ...
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1answer
59 views
DC Power Supply Output Caps: Electrical Advantage to using many smaller capacitors instead of few large?
Question: What is the electrical advantage to paralleling smaller capacitors to reach a given capacitance, rather than using fewer smaller capacitors on the output of a DC power supply?
For example, ...
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1answer
58 views
2^4 finite field multiplication in VHDL
I am currently trying to optimize a 4-bit finite field multiplication modulo X^4 + X^3 + 1 that I've made in VHDL. I did a 16x16 array containing all the results of ...
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1answer
157 views
Optimization of Vivado synthesis
I am currently using Vivado to develop several FPGA designs, and I am wondering if the components numbers given during Synthesis are optimal. I mean, are there some ways to optimize the synthesis, in ...
0
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1answer
229 views
Connect 3 circuits to one switch
I am building some electronic circuits with some arduino in it to animate LED-strip.
The device is powered by 3 USB cables, because as I am using 270 RGB LEDs I can have 5A running trough the cables,...
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0answers
26 views
How much more hardware for Keerthi's' SMO compared to Platts SMO?
Not sure if this is the correct forum to ask this question. Please let me know if it is not. It would be great if anyone can point out if there is any forum where it may be accepted.
This question ...
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2answers
954 views
ltspice matlab optimization
Has anybody used ltspiceIV in a optimization process using Matlab? I need feedback because I am running my circuit in transient analysis, and when I found the optimal point of my optimization, I ran ...
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7answers
1k views
Simplifying many window comparators
I have 8 thermistors and I must make sure that each of them is inside a temperature window. They all have the same window and I don't care which or how many are inside the valid range, I just need to ...
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2answers
468 views
Minimizing(optimizing) digital logic circuit with multiplexer(s)
(this by the way was an exam question)
For \$F = \sum m(2, 3, 5, 7, 11, 13)\$, I am trying to implement a digital logic circuit using only the following:
2:1 MUX (cost: 12, and must use at least one ...
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1answer
59 views
Is there an advantage to my sequential circuit optimization?
I'm trying to create a snake game on a Xilinx Artix7 FPGA, and one of the things I want to check is if the snake has collided with itself. I need to perform this check between game updates to know by ...
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0answers
1k views
Speed up Vivado Implementation
In Vivado, implementation of my projects can take a while especially if I use debug cores. What can I do to make implementation faster? I tried the "RuntimeOptimized" constraint and it made no ...
2
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3answers
252 views
Design to replace several jumper on a dense PCB
I'm working on the design of a board which include a lot of Jumpers (around 40). They are used in order to provide a possibility to connect or disconnect parts of the schematics. Signals are all ...
2
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2answers
141 views
How to partially drive a load with respective impact on my electricity meter?
I want to optimize the use of my photo-voltaic production by redirecting the remaining unused energy to electric heaters in winter, or something else in summer (given that fans are inductive loads and ...
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1answer
225 views
How to predict the output of a solar panel depending upon weather conditions for real time hardware simulation?
I want to build a system for smart grid which can optimize the grid power, load and battery charging to reduce my costs for grid power. For the optimization problem, I must know the current date to ...
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3answers
533 views
Optimizing Resistor Values for Comparator Reference
Curious if there is a general rule for optimizing total resistance values in a voltage divider reference in a comparator circuit. Guessing it ultimately comes down to whether maximizing accuracy or ...
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0answers
69 views
Optimal design of electrical grid [closed]
After all that has been learned about electricity - if the grid and removing financial considerations and adoption feasibility. Imagine you're constructing for Mars or some post apocalyptic ...
3
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1answer
131 views
Supercompilation for electronic design
I'm reading Advanced FPGA Design and the first example, one of simply raising a number to the 3rd power, quickly diverges into various quite clever optimizations to make the valuation faster.
Now, ...
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0answers
2k views
Implement a 3-input function using only two 2-input LUTs
This is my homework: "Given the function \$f(x_1, x_2,x_3) = \sum (2,3,4,6,7)\$ Show how it can be realized using two 2-input LUTs. Give the truth table implemented in each LUT."
At the beginning it ...
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4answers
1k views
Code Optimization of IF Statements?
Considering the design limitation of hardware (clock speed, memory, etc…), is there any better way to write IF statements more efficiently in C language (e.g. run on Arduino), more specifically the ...
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2answers
73 views
Stochastic optimal control different in finance and engineering [closed]
What is the different between stochastic optimal control approach in finance and engineering?
Why methodes used in finance approach like Ito calculus are not used in engineering?
6
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3answers
685 views
SPI chip select optimisation
I am designing an SPI system with one master and two slaves. In a normal SPI system, the master needs 2 outputs to control the slaves' chip select lines. I want to use only one output to drive both ...
2
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1answer
214 views
XC32 optimizes vaiable used for register reading
I am facing a problem with XC32 compiler's optimization. Whenever I write a function to read something from register, XC32 optimizes (read: Removes) the variable which holds the return value.
I have ...
0
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2answers
52 views
Optimization of component values in LPF
I'm designing a 2nd order low-pass Butterworth filter using a Sallen-Key topology (for reminder) :
simulate this circuit – Schematic created using CircuitLab
Now, I am trying to find the ...
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4answers
3k views
How to control the driving frequency when working with high power ultrasonic transducers
I would like to know the simplest solution to dynamically tune the driving frequency of an ultrasonic transducer to its resonance frequency.
My amplifier has a power meter that I can read an optimize ...
2
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1answer
205 views
Optimally convert (small) boolean expressions into NOR form by hand
Is there a way to easily convert a boolean expression with only few variables into a NOR form?
Let's take the half-adder as an example:
...
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3answers
4k views
Most efficient way of creating a bool array in C - AVR
I'm using an Atmega32 to read various sensors using its ADC.
Using digital logic and a few multiplexers, I've multiplexed the entirety of PORTA, using PA0:6 for address and PA7 as the input. ...
2
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0answers
299 views
Exclude certain module from optimization in Xilinx ISE 14.4
I'm synthesizing a quite large design in Xilinx ISE 14.4 and would like to exclude certain modules from optimization. Is that possible?
The design I'm synthesizing is the LEON3 microprocessor. I have ...
2
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0answers
163 views
Operator synthesis VHDL, numeric_std.vhd
if i include the library numeric_std.vhd
(the implementation is here https://standards.ieee.org/downloads/1076/1076.2-1996/numeric_std-body.vhdl) you can see that the operator *,+ (as instance are ...
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2answers
2k views
Xilinx ISE Synthesis taking too long
I just finished to write a pretty complete design on ISE 14.7 targetting a Virtex7 device. The behavioural simulation (on Isim) takes a while but works perfectly.
Therefore, I tried to move to the ...
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2answers
190 views
Timing closure suggestions
I've a FPGA design ( I didn't write a single line of sources code) and I've to add a module ( in the design there is a Wishbone bus where it's possible to link others wishbone interface ). The modules ...
0
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1answer
120 views
solar panel tilt depending on latitude
I'm attempting to calculate optimum solar panel tilts, and the best way to do this seems to be by latitude. However all i can find is calculators, i wish to be able to calculate this myself, is there ...
2
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1answer
345 views
faster extend 8-bit mask to 16-bit for MCU
Using an 8-bit flag register, the goal is to generate a 16-bit mask for manipulating a 2-byte settings register where adjacent pairs of bits control a channel, e.g. writing ...
6
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1answer
3k views
How to deal with optimal power flow problem in MATLAB?
I am writing an optimal power flow (OPF) program. OPF is an optimization problem in which some decision variables like Generation, Load dispatch are adjusted in power flow program so as to minimize ...
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1answer
1k views
Most efficient generator for charging 12 V batteries
I have a Honda GX25 mini 4-stroke engine that I want to built a battery charging generator for 12 V lead acid batteries.
My first idea was to use an old car alternator as the generator part, but now ...
3
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1answer
2k views
Sequential Traffic Light Controller
Just for clarification: I'm just looking to see if I'm on the right path for this project and to figure out what the best plan of attack might be.
I'm trying to simulate a sequential traffic ...
2
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1answer
734 views
Question about logic gate optimization and CMOS implementations
I am struggling with a conceptual question surrounding logic gates and how they're efficiently implemented in CMOS circuits.
For example, let's say I want to implement a NAND gate. If I didn't know ...
2
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4answers
749 views
AVR GCC: How do I improve code optimization
I tried to compile the following C code:
period = TCNT0L;
period |= ((unsigned int)TCNT0H<<8);
The assembler code I'm getting is the following:
...
9
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4answers
2k views
Why GCC compiler omitting some code?
I can not understand why GCC compiler cutting out part of my code while it preserve absolutely the same one in the neighborhood?
The C code:
...
0
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1answer
69 views
Current division and power delivery to resistors
I am trying to get the resistor e in this circuit to consume the most power possible by changing its resistance. It seems 100 ohms is just about right, a little less or more and it's power consumption ...
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2answers
5k views
Under what conditions does an optocoupler work fastest?
I want to use the optocoupler FODM452R2 in my design. I want this optocoupler to run as fast as it can (i.e.; work with minimum propagation delay and least rise/fall times). What is the optimum R1, R2 ...
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1answer
1k views
Temperature stabilization with PWM , PID controller with delay system
I am doing a project to control the temperature with PWM. I use peltier, thermistor,mcu and h-bridge mosfet.
I want to reach a temperature with an error less than 0.05 and stay at that temperature ...
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2answers
1k views
Microchip XC8: multi-byte assignment with reverse endian
Most, if not all, chips targeted by XC8 process one byte at a time. To assign a value from one multi-byte variable to another, it has to load the first 8 bits from the source into WREG and store them ...
1
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1answer
255 views
Boolean Network Simplification using Satisfiability Don't care Conditions
I couldn't really understand how SDC conditions are applied to minimize the following Boolean Network from Giovanni De Micheli's slide I am studying.
Given:
$$x=a'+b$$
$$y=abx + a'cx$$
Minimize \$...
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1answer
1k views
Fixing 1 failing timing constraint in Xilinx
In the end of my project I have a timing constraint failure as follows :
clk_in is the 100 Mhz system clock on ML507 I don't know why it is not meeting the ...
0
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1answer
218 views
Xilinx Design Summary
My project is finished and Xilinx gives lots of statistics in the summary like :
How shall I evaluate these values, what can I say about them? What means what? Is this report good or bad? With what ...
3
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1answer
831 views
Using a variable as array index - Optimization Bug?
I discovered a bug in my code which only turns up if avr-gcc optimization is used.
Can somebody explain whats the problem here?
I'm aware that there are several smart ways to achieve some PWM, but ...
