Questions tagged [packages]

In electronics packages refer to the physical encapsulation of a device. Most package names are standardized, so for example a TO-92 package will have similar dimensions and pin spacing between manufacturers so the same PCB footprint may be used. Be aware however many packages have subtle variations, for example TO-206AA, TO-206AB and TO-206AC.

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How to open hermetic TO packages?

I would like to open a TO-18 can to look at die-bonding/heatsinking and do some electrical experiments with increased airflow. Is there a non-destructive way to do this? My only thought is to drill a ...
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Off-center parting line?

Older Micron TSOP packages advertise a feature, “off-center parting line.” What does this refer to? Is this a feature of the lead frame? I have heard that OCPL has some vague mechanical reliability or ...
Zane Kaminski's user avatar
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What kind of package is this? Expected a tsop flash but I don't know

I'm a beginner in the electronics world. I opened this Chinese bootleg Sega genesis cartridge and in the place I expected to find a tsop flash chip I found this kind of adapter board with a package ...
Miguel Ángel's user avatar
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Can I use LQFP on same TQFP footprint?

I need to order a 32 pin LQFP chip and replace it with another 32 pin TQFP chip so is it ok to replace it or it won't be compatible? The chip is an STM8S003K3 MCU
Hazardous Voltage's user avatar
6 votes
4 answers
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Choosing SMD size for passive components

The passive components like resistors, capacitors, inductors are made up of a multitude of materials and come in a very wide range of package sizes. We could get the same value of resistor, capacitor ...
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MOSFET SOA: Isn't the package current limit-line ambient temperature dependent?

Ref 1 says "The package limit-line will not change in case application conditions such as ambient temperature vary" As explained in Ref2, this limit is due to bond wire heating/melting. If ...
Divya K.S's user avatar
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How to calculate the creepage distance of a package through package outline?

How do I calculate the creepage distance of a package which is not specified by the manufacturer? By looking at the drawing of the package, could I calculate it? If yes then how?
Alison's user avatar
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Kicad - 0805 Hand soldered package

When I try to select a footprint for an 0805 resistor in Kicad, there are two options. What is the difference between them and which one do I choose?
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SOIC-8 package in KiCAD

I want to incorporate a chip in my design. This is the datasheet: https://datasheet.lcsc.com/lcsc/1809251831_Diodes-Incorporated-AZ34063UMTR-G1_C99659.pdf It is an 8 pin SOIC package. When I try to ...
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Package and footprint - Are they correct

In this device, on page 208, the page has the Package outline drawing. 8-pin package. SOIC. "8S2, 8-lead, 0.208” Body, Plastic Small Outline Package (EIAJ)" I want the footprint of this ...
Freshman's user avatar
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Op-amp packages for PCB

I recently started to PCB design my circuit. Since I am new to PCB design I have some difficulties. I want to know if I can use different op-amp packages for my design. I selected components but they ...
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Can a vertical multiwatt package be bent to lie horizontal after it is installed?

I am working on a project with a multiwatt package audio amplifier IC. Can this component be bent over to lie horizontal, flush with the PCB, after it is soldered into place?
Emmett Palaima's user avatar
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Question on "Parts should be used within 5 days after opening." statement on component shipping package

I've been given the task of verifying a batch of ICs from a chinese broker, to see that the chips the company has bought are what the broker claims they are. The package we've received looks like this,...
Lars Petersson's user avatar
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12 answers
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Why are there no single logic gates in through-hole packages?

If I'm not mistaken, single logic gates (i.e. a single NOT, OR, NOR, AND, NAND, XOR, etc.) do not exist (anymore?) in through-hole packages. At least, on Digikey, when searching for active in-stock ...
Sandro's user avatar
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Is the larger package better for SMD capacitors?

Is a capacitor with a greater package number better than a smaller package number capacitor with the same voltage and obviously same capacity? For example, is it true that a 50 V, 100 nF X7R ±10% 1812 ...
Simone's user avatar
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Does the electrical parameters of a packaged transistor change from bare die transistors?

When comparing the electrical parameters of the MOSFET/Transistors, do they change when the package type changes? Are the parasitic parameters of the packaged MOSFET and bare die MOSFET change. It is ...
Ishani Engineeŕ's user avatar
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What does the interface between lead(s) and the silicon chip look like inside a semiconductor package?

For a leaded semiconductor, like a diode or a transistor, one of the leads is usually the same piece of metal as the copper pad/heat spreader on the back, which is also shorted to one of the junctions ...
HYQ's user avatar
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What is the type of material used for the casing of semiconductors?

I am trying to build some thermal models for leaded and surface-mount diodes and transistors. Below is a picture of the TO-220 outline I got from the internet. What kind of material is the black part ...
HYQ's user avatar
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Identify high-voltage power board component by its packaging and internal structure

A component (perhaps a MOSFET) on a generator inverter board blew up. All that's left are the legs and the heat sink. Is it possible to make a good guess as to the model and the manufacturer, given ...
tavr's user avatar
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Socket or Surface Mount Adapter? (SOP16 to DIP16)

I'm looking to use a HX711 chip (which says it's a SOP-16L package,) and attach it to a circuit on a breadboard. I've found two ways to do so: a socket or just the adapter. Is there any difference ...
kenntnisse's user avatar
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Is difference in height between TSOT and SOT decreased over the years?

As specifics: SOT height is between 0.90mm to 1.45mm TSOT height is between 0.90mm to 1.00mm I've measured some of SOT package and found out that no one excess 1.10mm . This maximum height, specified ...
Singed's user avatar
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Clarification of 'case' in junction to case thermal resistance

Junction to case thermal resistance (Rjc) is a key parameter when characterizing a package. It can be expressed as the temperature difference between the two locations over the heat dissipation. I am ...
HYQ's user avatar
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What does the 'junction' of a silicon semiconductor look like in real-life?

The P-N junction is a small area within a package where heating is most prominent. Junction temperature is a key parameter we try to track when operating a diode or a transistor. I am wondering what ...
HYQ's user avatar
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What does "end stackable" package mean for a MOSFET?

What is the manufacturer trying to say when they say "end stackable" here? They don't seriously mean vertically stacking the DIPs on top of each other in a tower and soldering the leads do ...
DKNguyen's user avatar
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Space-grade flat package SMT

I wonder about space-grade ICs in flat packages. Space-grade flat package ICs have very long leads compared to the commercial versions. If I use a flat package IC on my CubeSAT board, can I modify the ...
mark-r6's user avatar
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2 votes
1 answer
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What are wettable flanks in semiconductor packages?

What are wettable flanks? Is there any difference between packages with wettable flanks and other leadless packages? Can we say the package given above has wettable flanks?
Karthick selva's user avatar
2 votes
4 answers
215 views

Why do some transistor packages have multiple leads for the emitter?

I want to use a BJT transistor (edit: BFU768F, https://www.nxp.com/docs/en/data-sheet/BFU768F.pdf) that looks like this: I think I get why lead 1 is bigger than the rest. It's because both collector ...
Max's user avatar
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I don't know what this dimension means for a diode package drawing

I came across this case number and dimension for a diode, a D1NK60, that I would like to use: AX057: 3.0 × φ 2.6(mm) The data sheet is here (document page 31, PDF page 18). I don't know what phi ...
Otto Hunt's user avatar
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Grid size for package creation in Eagle

I am creating a package for the first time, using Eagle for the first time. I took measurements of the component and these are the dimensions from the center: How exactly can I achieve these ...
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6 votes
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How is the CQFP64 package supposed to be soldered?

I am currently designing a PCB containing an ATmegaS128 with the CQFP64 package (see picture below and page 460 of its datasheet), but I do not know how it can be soldered. Can the golden frame and ...
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How to ship LQFP 48 chips?

I have a bunch of STM MCUs (LQFP48 package) in hard plastic trays. I need to mail small quantities of them but it is impractical to cut up the trays. Looking for any suggestions on how to properly ...
user3191192's user avatar
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1 answer
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What are the CRYSTAL package types?

Or, you can point me in the right direction :) I've found HC49 and variants, but no explanation of what the standard is or what the differences are between the different codes [ex. HC49/US, HC49/S, ...
MIMI-DISCONNECTOR's user avatar
3 votes
2 answers
496 views

Can a CPU heatsink be used to cool a TO-3P or a TO-220?

I want to know if my thermal design is appropriate for dissipating 72W of heat while keeping the junction temperature below 150 °C (I am trying to cool an SFH154 that comes in a TO-3P package). My ...
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Has any implementation succeeded to have shared key inside chipset and protect it from exploits?

Since there is a lot of demonstration like using SEM (Scanning Electron Microscope) to read bits from ROM through the scanned image of chipset, is there any implementation that has managed to succeed ...
hurryman2212's user avatar
3 votes
1 answer
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Missing row 'I' in package numbering convention: why?

So, I recently discovered a quite painful mistake in my PCB regarding the PGA socket numbering. I have used a row numbered I in my footprint, while the package has ...
mxt3's user avatar
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UDFN Package, exposed thermal pad - to ground?

So I've got a design in which I would like to use the AT25SF321B-MHB-T chip by Dialog Semiconductors, but its datasheet does not mention whether the exposed thermal pad should be connected to ground ...
Cyborgium's user avatar
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What's the purpose of these copper tracks on the bottom of BGA package?

These are STM32F746NGH6 microcontroller chips in .8 mm pitch BGA package. I noticed that there are copper tracks on the bottom of this chip, some of which lead to the edge of the chip and are left ...
crossroad's user avatar
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5 votes
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Why do some exposed pads have small tabs, and does my PCB footprint need them?

I've noticed a few component packages now that have small "tabs" on the sides of their exposed pad (thermal pad). One example is the Analog Devices ADM7154 LDO: Note the 0.356 x 0.457 mm ...
TypeIA's user avatar
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Why are some SMD components cylindrical?

Outside of fuses or similar socketed parts, why are there cylindrical SMD components - such as this Zener (package DO-213AA): I feel like this would be a pain in assembly in general, and a nightmare ...
Blair Fonville's user avatar
2 votes
1 answer
141 views

What are the known ambiguous SMD IC package names?

I just recently discovered (the hard way...) that VSSOP-8 is an ambiguous IC package name. Some manufacturers use this name to describe a 0.65mm pitch device, whereas others use VSSOP-8 to describe a ...
Chris's user avatar
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LM53603 capacitors package size

in my project Im using the LM53603 voltage regulator. In the datasheet's typical application I see 3 capacitors on both the VIN and ...
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SMT PCBA production

I am interested in setting up an SMT factory for producing PCBA. I have researched and know the whole assembly process such as solder paste application, reflow oven, etc. Regarding the packaging of ...
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15 votes
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Why do many old ceramic packages have a gold line?

I noticed a lot (but not all) of ceramic packages seem to have a gold line. What is the function of this line? (I'm not talking about the soldered cap that the die will be placed under, but the gold ...
Joren Vaes's user avatar
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What can I do about using incorrect P-FET package?

I just got a PCB in I designed from fab, and I quickly discovered I made a mistake in the design. I'm using a P-channel MOSFET, D2PAK, as a high-side switch. Its pinout is (1) gate, (2) drain, (3) ...
matth's user avatar
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TQFP socket for QFP package

I'm trying to get data off of this IC, and I'm having trouble finding a suitable package. In addition, I need to test ~5 of these on the same PCB, so I need to use a socket. The problem is, I need ...
Brian DeHority's user avatar
-1 votes
1 answer
48 views

Three different dimensions shown in package drawing, what do they mean?

I have an IC that uses this package from analog devices: https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/lfcspcp/cp_8_5.pdf. Most of the dimensions are shown in three numbers: I ...
AnB's user avatar
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please identify 5-Pin R1K SOT-23 Package

[![like this ][top mark ][R1K] in the topmark R1K
ali's user avatar
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How can I get a full guide to choosing the right IC package?

I often find a variety of IC packages options for one chip. I select among them randomly according to the availability, despite my concern about the vibration and shock reliability I googled ...
Haitham AlHazmy's user avatar
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1 answer
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How to identify pin 1 from mechanical design

Looking at 10142048 datasheet from TE I'm not sure how to identify pin 1 from top side. At page 9 there are the pin assignments from bottom side only. Now, I guess: ...
Mark's user avatar
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RF Amplifier GND/VCC Connector [duplicate]

Is there a standard connector used to connect the ground/supply pins on an RF amplifier to a power supply? For example, many RF amplifiers (also attenuators) I've seen use two pins like this: But I ...
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