Questions tagged [parasitic-capacitance]
Capacitance that arises from the physical layout of the circuit and the placement of components. Particularly notable when the addition of capacitance is undesirable.
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Need help with validation of the design of a capacitance sensor array for soil moisture measurement
Product Description
The device is a soil moisture sensing and analysis device that uses capacitance sensing technology to help manage soil moisture in your garden. One probe set at the bottom of the ...
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Does the electrical parameters of a packaged transistor change from bare die transistors?
When comparing the electrical parameters of the MOSFET/Transistors, do they change when the package type changes? Are the parasitic parameters of the packaged MOSFET and bare die MOSFET change.
It is ...
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How to extract parasitic capacitance of an oscilloscope?
Can someone please explain the procedure to extract the parasitic capacitance of an oscilloscope? I have seen that the contribution of probe capacitance is 3.9 pF. The scope is a Tektronix 3 series ...
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Parasitic capacitance of high-speed comparator
I simulated an LM119 high-speed comparator and built one on a breadboard.
May I ask how to increase the frequency of the square wave produced by adjusting the resistor's values instead of reducing the ...
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Crosstalk: How is the victim node voltage increasing through the leakage current?
Can someone explain how this circuit is working? How is the victim node voltage increasing through the leakage current?
Here is the image for more context:
(Source: Team VLSI - Crosstalk Noise and ...
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How do I stabilize the pulse widths of the 4029 Binary Counter?
I am working with a CD4029BE on a breadboard. The connections are as follows:
VDD to +12VDC
VSS to ground
The clock input receives a 3Hz 0 to +12V clock pulse
J1-J4 are shorted together, and then ...
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SPICE and Maxwell capacitance matrix
From this link I understand the definitions of a Maxwell matrix and a SPICE matrix
Maxwell and Spice Matrices - ANSYS
However, what is the meaning of a negative main-diagonal entry in a SPICE matrix? ...
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Parasitic capacitance in PCB high speed traces
I am learning high speed pcb designing and the parasitic capacitance is making few things difficult to comprehend. I understand how because of parasitic inductance cross talk emi and signal integrity ...
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Potential problems when using a high resistance voltage-divider
I want to design a circuit, that allows me to measure the voltage across a piezoelectric transducer.
The transducer itself has an impedance |Z| of 500 Ohms up to ~20 kOhms.
The voltage to measure ...
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PCB and breadboard parasitic capacitance
I am getting different bandwidth measurements from my breadboard and PCB (for the same circuit with exact same component values). The cut-off frequency I measure on the breadboard is slightly higher ...
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Where do these parasitic capacitances appear?
So here:
I assume each transistor has some sort of parasitic capacitance and that adds up into the non inverting terminal of the op amp? Why do those parasitic capacitances appear and how can i ...
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Unsure about the correct application of Miller's Theorem
Sorry for the long post but I figured it would be easier to include pictures and all relevant calculations so that there wouldn't be any confusion.
I have a circuit for which I'm trying to analyse and ...
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Typical parasitics values of thick film SMD resistor
I'm looking for values of parasitics for SMD thick thilm resistors (the cheap and readily available). Values of the following model
Closest I found is this application note from Vishay, but it is for ...
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What happens to parasitic capacitance and inductance in a superconductor?
Do the parasitics also become [more] ideal? Are all changes solely due to the perfect conduction?
If not, how are the parasitics affected?
Such basic information seems necessary to engineer any ...
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Transformer's capacitance
Our main purpose is create the transfer function of a transformer, and we want that for a resonance frequency higher than 1 MHz for our LLC transformer in an LED project.
https://www.omicron-lab.com/...
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Problem with parasitic capacitor in feedback path in inverting circuit
I want to meet following conditions:
Gain: 27.74 dB
Input source resistance: 6800 Ohm
Bandwidth: 15Khz (I actually need to have a flat response until 10khz and I do not care about the rest of it)
I ...
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What happens when you reverse bias a NMOS with separate body terminal?
I am trying to create a current limiting circuit with minimal output capacitance.
I'm trying to build a circuit that optimises low parasitic output capacitance over linearity.
I used a SST215 DMOS ...
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Mitigating parasitic turn-on of MOSFET
UPDATE
Thanks Aaron and jp314 for your comments.
We just probed some more and I think jp314 is right.
We found that the high side driver was skipping some pulses. The pink pulse train is from the ...
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Thin Film Resistors, Deposition On One Side, Parasitic Capacitance if Resistor is placed such that Deposition next to PCB Ground Plane
I have a question for all high frequency and RF electrical engineers.
Thin film resistors have a vapor deposition of resistive material on one face of the component. Let's presume that the resistor ...
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Wouldn't using two MOSFETs in push-pull configuration to drive a single MOSFET be counter-productive?
I'm trying to make a buck converter that uses a P-MOS for high-side switching using an STM32's PWM signal.
I can't figure out why it would be useful to drive the MOSFET using a push-pull MOSFET gate ...
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capacitance at inverting op-amp input of unity gain inverting amplifier
[This question is related to another question. That other question asks why a particular op-amp behaves the way it does. I think there are many reasons, many of which are outlined in the answers to ...
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How would parasitic capacitance changes happen in a crystal oscillator?
This article about crystal oscillators talks about the trade-offs of different crystal load capacitance values (crystal load capacitance parameter, not load capacitor values)
It says “a crystal with a ...
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Why are parasitic capacitances the main factor for limiting high frequency performance of active devices such as transistors? [closed]
According to the Wikipedia article, the reason for the limit of frequencies in which transistors operate is the parasitic capacitance. But I don't understand why this is so.
Wikipedia article:
...
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MOSFET diffusion to substrate capacitance
in order to eliminate body effect one way is to connect the substrate to source when the well is for a single device (PMOS with a well in a CMOS for example) , but i read that it increases the source ...
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Capacitances in a PMOS transistor: what about the n-well?
So I'm studying MOS transistors and came across the topic of capacitances between various terminals/contacts, including the bulk terminal. These capacitances are due to lateral diffusion as a ...
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TPS61090 LBI Pin-->frequency compensating capacitor for voltage divider?
I was reverse-engineering some PCB to gain knowledge how to apply a TPS61090 Boost Converter (see my schematics attached, sorry for the unusual "arrangement" of the components). Input VBAT ...
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I2C bus fails after a few sensor reads
I'm building a small home automation hobby project for which I try to connect 4 temperature/humidity sensors (AM2320) to an I2C bus on the Raspberry Pi. When initially connecting the sensors they work ...
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Modelling an STM Tip current
As part of a current-to-voltage preamplifier that I'm working on improving, I'm trying to model the current source of an scanning tunneling microscope (STM). The way it works is described below (based ...
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Resistor-Capacitor-Resistor configuration and layout differences
How you can explain the R-C-R configuration? Goertz zobel
link to the web-article
This looks to be used as a RF audio cable terminating, I suppose.
Which can be the electro-technical difference of ...
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Plannar Inductor Unacounted Parasitic Capacitance
I'm trying to determine the source of approximately 300pf worth of parasitic capacitance in a planar coil project I'm working on. I'm trying to find out how my numerical predictions line up with the ...
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Why does op-amp output impedance / parasitic input capacitance pole cause a noise peak?
I was simulating the above circuit in LTspice... I realize the main problem here is the 2MHz peak (which should be fixable with proper compensation), but I'm curious about the smaller 398kHz peak ...
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Understanding spef format
Please help me to understand below scenario which is there inside the spef file. I have written only the snapshot, not the full text.
...
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What effect does the internal re-arrangement of charges have on the existing current? [duplicate]
In the figure, the circuit is physically isolated from Earth (The black line at the bottom). The red capacitors are parasitic capacitors.
Under switching conditions the node voltages relative to the ...
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Is this internal rearrangement of charges in a circuit a current and is this current different from the “normal” current of the circuit?
In the figure, the circuit is physically isolated from Earth (The black line at the bottom). The red capacitors are parasitic capacitors.
Under switching conditions the node voltages relative to the ...
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How much is parasitic capacitance of soldering pads on PCB?
I mounted a Resistor (SMD, Size: 0603, Resistance 500MOhm) on a PCB.
What is the value of its parasitic capacitance?
How would it change if it were 0402 in size?
Does it depend a lot on the ...
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Speedup capacitor for compensating stray capacitance
I may be wrong here but I think C1 and C2 charge to different polarities, so when the output changes, C2 supplies the required charge(+ or -) to C1 quickly.
For example: If the output is \$+V_{...
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What's the best procedure to model a real world transformer which is not so simple
I have a transformer with a 110-1 turns ratio.
The output winding (1100 turns) is typically open circuit, with only its parasitic capacitances as a load.
The output winding has adjacent turn ...
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I am trying to understand the behavior of a pulse
I have this pulse
This is the observed data. I have a LTSPice model that needs to be matched as close as possible to the observed data I need to match the e area of from 350 to 500 ns, because the ...
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Input and Output capacitance
I have understood that there are both input and output parasitic capacitances in real op-amps, but I am trying to understand why they are there.
As for the input capacitance, there are two types:
...
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Parasitic capacitance of a chip
I know that the parasitic capacitance of a chip is pronounced Cdyn.
If I apply on some scenario one the chip which will toggle the all of its transistors with two different voltages, but the frequency ...
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Understanding capacitance in oscilloscope probe tip
I am trying to understand the capacitance and resistance in oscilloscope probe tip.
In the above attached image, that 9Mohm resistance is used for that 1x and 10x setting that divides the input ...
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Measurement of Resistor Parasitics Inductance and Capacitance
I have seen people doing some measurements of parasitic capacitance and inductance of some resistors, by using a vector analyzer and analyzing the graph of S11 with respect to frequency.
To get this ...
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Perf board parasitic capacitance fries microcontroller?
Recently one of my mirocontrollers fried in a project on a perf board. Eight of the outputs are PWM, and aside from the power lines, there are no other outputs from the MCU. The PWM frequency is 40 ...
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MOSFET input and output capacitances
I need some explanations about the MOSFET parasitic capacitances. Precisely, what I studied is that there are those parasitic capacitances:
But generally in digital electronics texts I see that they ...
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Measuring parasitic capacitance of coil using an LCR meter
Would it possible to use an LCR meter (DE 5000) to measure the parasitic capacitance of an multi-tapped torid inductor?
If this is possible how should i do this, to get the best results?
Help is much ...
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Doesn't building a circuit "Manhattan-style" introduce lot of parasitic capacitance?
I watch a lot of circuit building videos on Youtube and I can see that the "Manhattan" style of circuit building (placing small islands of copper clad board on a larger piece which acts as the ground ...
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Under what conditions can power MOSFET gate capacitances Cgs and Cgd be paralleled?
I would like to get some understanding about the gate charge of a power MOSFET. I am referred to this MOSFET gate drive circuit application note:
On page 5, subsection 1.2.3, Gate charging mechanism, ...
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how to isolate coupled noise source in parasitic capacitance in high voltage pcb design?
I'm new designing a high/medium voltage (V <=10kV) with low voltage and low current (10mA). There will be only a few HV relays. Their coils will be triggered by LV.
I have read some literature ...
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Relaxation Oscillator Issue, comparator self-oscillating at 25 MHz (40ns propagation delay)
I have a relaxation oscillator circuit, which is supposed to oscillate around 6 MHz, and mostly it oscillates in a very stable manner around it.
However sometimes it starts to oscillate at 25 MHz, ...
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MOSFET Controled Relay Problem
As a way to power-on/-off a circuit load, a MCU is used to drive a relay through two MOSFETs. The problem is, when the MCU GPIO output is measured 0-volt, the relay could stay connected.
Can anybody ...
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