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Cgs is ignored when computing load capacitance of CMOS inverter

I was reading the Microelectronic Circuits by Sedra and came across the content about computing equivalent load capacitence for CMOS inverter. Cgs is not shown on the image below and is not included ...
Yiyang Yan's user avatar
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2 answers
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How does moving an input signal node closer to the output node reduce parasitic capacitance

So I have been studying about logic gates designed using the CMOS family and in my professors notes it says "Move NMOSFET-B closer to output node, without changing the functionality , to reduce ...
zero_day's user avatar
2 votes
1 answer
202 views

MOSFET diffusion to substrate capacitance

in order to eliminate body effect one way is to connect the substrate to source when the well is for a single device (PMOS with a well in a CMOS for example) , but i read that it increases the source ...
Ahmed G Diab's user avatar
3 votes
1 answer
2k views

MOSFET input and output capacitances

I need some explanations about the MOSFET parasitic capacitances. Precisely, what I studied is that there are those parasitic capacitances: But generally in digital electronics texts I see that they ...
Kinka-Byo's user avatar
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1 answer
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Measurement of Cmos Parasitic capacitors

i've had a question which asks if we assume that capacitance of capacitors with w/l of 1u/0.5 are then what are capacitance of capacitors (with the actual w/l) now i know cgs in saturation for ...
Pooya Estakhri's user avatar