Skip to main content

Questions tagged [pcb-layers]

Printed Circuit Boards (PCBs) are composed of a sandwich of alternating layers of insulating substrate and conducting copper layers. The copper layers are etched to form connecting tracks between components as well as earth/ground or power planes. The simplest PCB has one substrate layer and one copper layer. Generally only the copper layers are counted. A complex PCB might have seven layers.

Filter by
Sorted by
Tagged with
1 vote
0 answers
38 views

Remove Unused Pad/ Via

I want to make remove unused pad/via at inner layer in order to increase area. But I wonder that does it cause problems in terms of IPC Class-III or PCB manufacturing?
123's user avatar
  • 11
0 votes
0 answers
33 views

PCB Power and Ground planes Setup [duplicate]

When designing a 2-layer PCB, I've read that ground planes are good to reduce noise and to provide a stable-ish ground reference when a board isn't connected to a chassis, ground etc. If I need to ...
Steam Ranger's user avatar
0 votes
0 answers
31 views

Current sense GND planes Power & Signal

I couldn't find a clear answer anywhere. I have a battery powered device which therefore has a VBAT+ and a VBAT-. The battery is used through some power stages (which contain MOSFETs which are driven ...
Clem's user avatar
  • 11
1 vote
3 answers
84 views

Different layer schemes for 4-layer PCBs

I've been working on a hobby project and I recently joined a Discord server of others doing similar projects. One of them mentioned they'd made a 4-layer PCB layered together as Signal Ground Ground ...
Anonymaton's user avatar
2 votes
2 answers
106 views

Is it possible to trace a via on a multilayer PCB board without the schematic diagram?

I have a copper trace on a PCB board, but it terminates in an annular ring. My question is, can I trace the path of the trace? I need to determine if it is connected to ground. Thank you in advance. ...
condor12's user avatar
  • 145
0 votes
2 answers
86 views

Is it possible to create new footprints and integrate additional components into an already manufactured PCB?

What is the most effective method to do so? I have enameled wire, which seems safer to me due to the insulation. My plan is to cover them with solder mask. However, I have a question: Would it be ...
condor12's user avatar
  • 145
0 votes
1 answer
37 views

Multilayer pads and track error

I'm working on a PCB and I struggle to understand why i get violation from this: I did not modify the rules and the only clearance ones are a <0.254 mm on pretty much anything. The thing is that ...
Shynord's user avatar
2 votes
1 answer
102 views

What should be the Prepreg thickness and dielectric constant of low frequency 4 layer board

I'm designing a 150mmx88mm 4 layer board which has two buck converters, two relays and an Arduino Pro Mini. Maximum current is 4 Amps to drive a LED strip. The rise and fall times of the switcher is ...
CaveScientist's user avatar
1 vote
2 answers
89 views

KiCAD: remove DNP components from paste layer

We have an adapter board that works as an interface between our own and third-party electronics. Depending on the third-party configuration about a third of somewhat expensive components may be unused....
Maple's user avatar
  • 12.8k
0 votes
0 answers
45 views

GND Copper pour on TOP/BOTTOM? [duplicate]

If I open the PCB of a Texas Instruments ControlCard I notice they did not add a copper pour plane on the top and the bottom. I know there is a GND plane below, but in my understanding, more ground is ...
nowox's user avatar
  • 847
0 votes
1 answer
160 views

ESP32 Schematic and PCB Design using Altium

Please review my schematic and PCB design. Purpose of the board is to reduce the current consumption of ESP32. I have used RT9080 voltage regulator. Board is powered either by USB or by battery (4.2V)....
Umar 's user avatar
0 votes
1 answer
33 views

LED PWM traces splitting reference power plane adjacent to bottom 5V DC supply ground zone on 4-layer PCB

I have almost finished my first 4-layer PCB design using Signal(Top)-Ground-Power-Signal(Bottom) stack-up and have some questions before sending it to production. Due to the very tight space on the ...
Semih's user avatar
  • 67
2 votes
0 answers
53 views

PCB ESD Ground Path analysis

We recently received this document from our battery pack supplier and it's intended to explain the ground path incase of ESD surge/spike. I'm a beginner and I would appreciate it if someone on here ...
Kabangu93 's user avatar
0 votes
1 answer
53 views

WiFi connectivity ceases on ESP32 when MAX3232 is powered on the same board

Since my issue could be lying anywhere, I will explain my design details a bit. I have a 4-layer PCB. The stackup is Top-GND-PWR-Bottom. ...
Sener's user avatar
  • 273
2 votes
6 answers
202 views

What is the best 4-layer stack-up for lowest EMI susceptivity?

I plan to design a 4-layer board that will work on an industrial machine. This machine has AC motors driven by commercial AC drives on it. Since the earth ground is very weak at the place, they ...
Semih's user avatar
  • 67
0 votes
0 answers
49 views

Frequency limit for routing <32MHz digital signals adjacent to one another on different layers, 4 layer PCB

I'm running an 3.3V SPI device with an SPI clock frequency rated up to 10 MHz, with some additional digital outputs/inputs to/from a microcontroller that is clocked at 32 MHz. Due to some space ...
plu's user avatar
  • 713
0 votes
4 answers
175 views

PCB design: How small can vias be made?

Working with very limited space (In Altium) and need to place vias to make routes between the red solder castellation plates on the top layer to the respective connector pins on the bottom layer, both ...
eutectic_codswallop's user avatar
0 votes
0 answers
25 views

Gerber X1 to Gerber X2 [duplicate]

I have gerber files from a client. Their extensions are: .fph, .fpl, .pho, .rep, .drl, .lst, .dxf. Of these, I know .drl are the drill files and .dxf is the mechanical drawing. Also, there is a .fph ...
Rohit Kulkarni's user avatar
0 votes
0 answers
81 views

What is the optimal layering strategy of top layer and bottom layer for low-density board design?

I'm designing a board tasked with reading power meter information via SPI and displaying it on-screen. I aim to adhere to the layering principles advocated by Fedol Academy, which involve four layers. ...
Alirezaagha30's user avatar
0 votes
2 answers
70 views

How to link GND vias to the GND plane

I know that it's possible for the GND vias to connect to the GND signal layer in a 4 layer stack. How do I achieve this?
9_daytona's user avatar
0 votes
0 answers
32 views

Clearances issues during routing

I am designing a 4-layer PCB in Altium, and I have defined my clearance rules for my high-voltage board (100 V) in the rules section, but the Altium software has a default clearance rule of minimum 0....
Andr7's user avatar
  • 275
0 votes
1 answer
166 views

PCB design - Routing without a schematic

I am using Altium CircuitMaker to design a PCB. I'm wondering if there's a way to make my PCB design without a schematic. My idea is to simply make a PCB with just pads and populate it myself with the ...
Vagabond4761's user avatar
0 votes
0 answers
196 views

Keysight ADS layout error "port pin not connected to conductive part of design"

I just designed a distributed element BPF using ADS and now I'm trying to put it into the layout to do an EM simulation. I created my distributed circuit using the dimensions of my components, then ...
TheBelgianWaffl _ Gaming's user avatar
1 vote
1 answer
79 views

Ghost line/barrier showing in Altium deginer

I am having a problem where there's an area (line) that appears only while running traces and on the draftsman document. the ghost line/region does not show up on any of the layers, I toggled all the ...
queTak's user avatar
  • 11
0 votes
0 answers
44 views

How to place light guide film cuts as part of layer PCB

How can I go about doing something like this in fusion/ eagle? https://www.pannam.com/wp-content/uploads/2017/08/Implementing-LGF.pdf and https://www.snaptron.com/2021/03/how-to-place-metal-dome-...
Wes Ellgass's user avatar
0 votes
2 answers
296 views

Altium: Exclude entire layer from Clearance Rule

I'm designing a PCB in Altium Designer. I've defined Clearance Rules for certain nets. When I run the DRC (Design Rule Check) I get errors that the Clearance between the Keepout and the Pad doesn't ...
puncher's user avatar
  • 111
1 vote
1 answer
115 views

Return current via

I have a 4 layer board. Layer 1 (Top): SIGNAL + GND plane Layer 2: whole GND plane (no tracks) Layer 3: whole power plane (no tracks) Layer 4: (Bottom): SIGNAL + GND plane After putting vias ...
Alatriste's user avatar
  • 160
1 vote
3 answers
428 views

How to decide number of layers?

I am new to PCB design and I want to understand to understand how many layers to choose. I just know more layers helps to make the routing easy but I don't understand what is power plane, ground plane ...
Andr7's user avatar
  • 275
2 votes
0 answers
81 views

Review of PCB RF Design

I designed a 4 layer RF board with the NRF24L01+. When I got the boards in to test I was not able to establish a radio link with some other NRF24L01+ modules. I have attached my schematic and board ...
M.Schindler's user avatar
2 votes
1 answer
171 views

4 Layer PCB Stackup - Ground and Power on the inner layers or outer layers?

I am designing a 4 layer board (2 signal, ground, and power), and is there any reason not to have top layer power plane, middle layers signals, and bottom layer a ground plane? I am concerned about ...
user1045680's user avatar
1 vote
2 answers
685 views

PCB Design Question - Power Plane or Fat Traces for High Current

I have designed my first pcb (4 layer) and I have a question about power planes versus power traces. I am using KiCad 7. I have tested the circuitry on a proto-board. I have a high current section (12-...
user1045680's user avatar
1 vote
0 answers
60 views

Power plane vs polygon pours

This question is being asked from perspective of Altium but applies to other PCB CAD programs as well. So we can have two type of dedicated copper areas for power on a PCB plane. One is a polygon pour....
quantum231's user avatar
4 votes
1 answer
251 views

For a 6 layer PCB, what difference does it make if we use a CPCPC vs a PCPCP? (C is for core and P for prepeg)

I am working on a 6 layer PCB for motor control applicatin using Altium and the stackup being used is as follows: Sig GND1 PWR Sig GND2 Sig I am little confused regarding the correct order of core and ...
Umair Ali's user avatar
0 votes
0 answers
61 views

Power layer filled with many different voltages

I have a board with 4 layrs: signal, GND, power, signal. I have a couple different voltages starting from a USB charger input until the very end to a BLE module: Input before current measurement ...
Gambanishu Habbeba's user avatar
4 votes
5 answers
2k views

Is there any disadvantage in making a ground plane and a power plane in a 4 layer PCB?

I have read a lot of posts, forums, and application notes about why it's a bad idea to separate ground or power in mixed analog and digital circuits, so I've made a 4 layer PCB with full GND and VCC ...
santiago deliotte's user avatar
0 votes
0 answers
36 views

Altium Layer Stackup - Not Loading Sierra Circuits Layer Stackup Export

First post. I am trying to load an exported XML file from Sierra Circuits: When I go to my Layer Stackup page in my project, then I go to File>Load Stackup From File... And it does not show any ...
Lin Crawford's user avatar
0 votes
1 answer
233 views

route on inner or outer layers for SPI clocks signals etc?

What is better for (for example) an SPI clock signal: to be routed on the inner layers (more ground, avoid EMC issue) or on the outer layer? (Avoid changing layers and impedance mismatch and any ...
mr dude's user avatar
  • 41
8 votes
1 answer
631 views

PCB stencil layer for cutout

I ordered a multiple PCBs which all arrived fine. I never included a stencil because of the high cost for it compared to the PCBs. Now I combined a few board designs to fit on a single stencil, so I ...
RektByMemes's user avatar
0 votes
2 answers
610 views

How does a copper pour work in Kicad?

In my project, I have a label in the schematic as Vcc. When I created my backside copper pour in PCBnew, I gave it the Vcc net. Thus, when joining a Vcc pad on the frontside layer, via a via to the ...
user1584421's user avatar
  • 1,369
0 votes
3 answers
159 views

Kicad PCB Layout: Nets not visible in different layers

I am trying to do a copper pour on one of the layers on my PCB and for some reason, the nets are not visible to any other layer except the top layer. I have tried to do a copper pour on the top layer ...
Bilal Afzal's user avatar
0 votes
1 answer
47 views

Logic of splitting planes in Altium of different "voltage areas"

If I understand correctly there is a concept of whole areas on a single plane for different voltages (as shown below). They made an area on another layer an area for 12 V nets and on the same layer. ...
lub2354's user avatar
  • 373
3 votes
4 answers
1k views

Putting caps, resistors, etc on back side of board

Assuming I am ok with the extra cost of having parts assembled on the backside of my PCB, does it make sense to basically place all the main parts on the top side and then strategically place all the ...
Kevin McQuown's user avatar
2 votes
0 answers
215 views

Adding a Chassis Ground at the Midpoint of a PCB

The PCB I designed is 6-layer. I will create a chassis ground in the form of a frame surrounding the mounting holes and add a Y capacitor between and to the signal GND. And I will surround this ...
Electronx's user avatar
  • 756
1 vote
1 answer
333 views

Using vias with power and ground planes in altium designer 20.2.4 cross error

I'm making a pcb with a 4 layer stackup. The top layer and the bottom layer are used for signal and component routing. The 2 layer is GND (analog and digital planes) and the 3rd layer is Power (analog ...
santiago deliotte's user avatar
1 vote
1 answer
72 views

6-layer stack up: Optimal core/prepreg thinkness and coupling to GND

I'm designing my first 6-layer board using a SIG|GND|SIG+PWR|SIG+PWR|GND|SIG stack up. This is often claimed to be the best stack up online and in literature ...
Tim's user avatar
  • 133
0 votes
4 answers
339 views

How to correctly design ground planes simple circuit PCB's?

I'm a little new to PCB design and could use some help figuring out the best way to make this very simply PCB that I plan to connect to the back of a custom led light sign that I'm making. The circuit ...
KidWithComputer's user avatar
0 votes
0 answers
133 views

Altium aluminium base layer stackup

I need to design the aluminium base pcb , i dont know how to set the layer stack for aluminum layer in altium , attahed the sample image of layer stack of single layer I set the top copper layer , ...
Marimuthu C 's user avatar
1 vote
2 answers
281 views

Modifying Gerber file

I am using the X-NUCLEO-NFC02A1 development board for one of my projects. But I want to make a few modifications to that board design. So I tried to download the Gerber file from the manufacturer's ...
Isuru Bhathiya's user avatar
1 vote
0 answers
83 views

PCB Review (ATmega32U4 + Bosch BNO055 IMU sensor)

So I'm very new to PCB design and would like to get feedback on the layout I've done. I've attached the layers for the board which is a 4-layer stack-up. I'm working with some space constraints too so ...
Yeo's user avatar
  • 23
1 vote
1 answer
382 views

4 Layer PCB layout with microcontroller and IMU

I'm trying to design a 4-layer PCB board and would like to check if the following layout will perform well. By well, I mean if it will perform optimally. Factors such as Low EMI and noise coupling etc....
Yeo's user avatar
  • 23

1
2 3 4 5
10