Questions tagged [phy]

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Ethernet PHY - colliding with itself?

I have an embedded system, that whenever the PHY transmits on the twisted pair, the connected hub indicates a collision, and I see nothing on Wireshark. I am 100% confident it is not a software ...
Shaken_U's user avatar
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1 answer
33 views

Connecting two ethernet PHY's (KSZ8051RNLU) in RMII back toback configuration

I would like to to connect the KSZ8051RNLU in a loopback configuration with itself, I have read that this is possible with other PHY's. Does the KSZ8051RNLU have this capability? Will it auto-...
Voltage Spike's user avatar
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1 answer
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Inductor without inductance

I am trying to find the right component for this inductor. It doesn't show inductance which is bit confusing for me. Which part should I pick for this if I wanted to use it on my PCB? it's from NUCLEO-...
Arkadiusz Rycyk's user avatar
0 votes
0 answers
35 views

Connection between MCUs with PHY peripherals

I plan to use a MAC TO MAC communication. RMII is decided to be used. One processor is SAMA5D27 and the other is S32K148. The signal connections seems to be OK. But would this configuration work? Also ...
Freshman's user avatar
  • 787
1 vote
1 answer
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PHY 100MBit Link Problem (LAN8814)

We integrated a LAN switch into our design to be able to daisy chain devices and to use PTP. The switch (a LAN9668) has 2 internal CuPhy that we use. It is controlled using an SPI interface and does ...
Gunther's user avatar
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0 answers
55 views

LAN8742a autonegotiation gives a half-duplex mode result when it's espected to be full-duplex mode result

I was testing an ethernet based project PCB that uses LAN8742a xip (lan xip seller link) and a stm32f207zg microcontroller (mcu seller link). We are having some issues when we increase the stress ...
Suvi_Eu's user avatar
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28 views

ping with lwIP library Xilinx GTR with dp83867 TI PHY

I am working with Xilinx Zynq ultrascale+ , that is built around custom board. In this board I have 3 gems -gem0..gem2 that are connected to DP83867IS PHY. in addition, my system is working in SGMII , ...
Yonatan Elizarov's user avatar
0 votes
2 answers
152 views

PHY address for SPI interface

I'm currently working on a project of a testing module that requires three Ethernet ports: one for network connection two for external hardware (one of which is a device being tested) The testing ...
Johan Larsson's user avatar
2 votes
0 answers
102 views

ESD problem and how to solve

We have a problem with contact discharge of 3kV on a housing part. The PCB with the PHY are installed in an aluminum lower part with plastic upper part (dimensions approx. 80x80x80mm). The contact ...
user avatar
0 votes
1 answer
66 views

High frequency sinks to MOSFET's drain?

I have the following setup on a custom PCB. The WT32-ETH01 module can be normally booted into download/flash mode by holding the IO0 to the GND during the start. The IO0 is also used as a clock ...
Marek's user avatar
  • 143
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1 answer
48 views

Merging of Ethernet copper ports into 1

I have configured the copper ports of Ethernet switch as shown below. (i.e merged all the ports and made it has a single port). My understanding is there will be a signal overlap during the Auto-neg ...
user avatar
1 vote
1 answer
181 views

MAC to MAC connection TX to RX [duplicate]

I'm connecting two MACs back to back. One is the IMX6 processor. The other device is this Microchip LAN9370 "5-Port AVB/TSN Gigabit Ethernet Switch with Integrated 100BASE-T1 PHYs". In that ...
user avatar
15 votes
2 answers
2k views

Why are Ethernet MAC and PHY separate?

I’ve been looking for a MCU/MPU with built-in Ethernet connectivity, and I’ve noticed that most only contain a built-in Ethernet MAC interface and require an external PHY. Why is this the case, as in ...
cdubs's user avatar
  • 413
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1 answer
131 views

How to build multiport Ethernet switch? [closed]

I have been researching how to build managed/multiport Ethernet switch. There are things that I do not understand and would like to know more. Some Ethernet switches have built in MACs and if I use ...
OnurTR's user avatar
  • 177
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1 answer
63 views

How to generate an interrupt on this pin?

In this device, I'm using an internal PHY mode and this pin nPHY_INT is an active-low interrupt output (wrongly mentioned in the datasheet as active-high). I just want to understand how to generate an ...
user avatar
4 votes
2 answers
294 views

Adding an extra magnetics transformer for 100Base-T Ethernet

For variuous reasons I need to add an extra transformer between external ethernet connection and an ethernet device that has magnetics built in. The reason being, among others, to elimnate possible ...
tarmogr's user avatar
  • 171
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1 answer
32 views

Configuration of the Interrupt Signal

I'm using this IC- LAN9500A and want to know how to use pin 1, nPHY_INT. I'm using internal PHY and want to generate output on this pin 1 (interrupt output) Can someone tell me how to configure it? Is ...
user avatar
1 vote
1 answer
66 views

Meaning of Phase Angle

In this Application Note, section 3.1, Can someone help me to understand the meaning of "magnitude of phase angle of the load" in simple terms? Phase angle between Rx and Tx or what does ...
user avatar
2 votes
1 answer
208 views

Can SGMII MAC communicate with 100BASE PHY at 1 Gb/s?

In the DP83TC811S-Q1 SGMII's datasheet it says Because the DP83TC811S-Q1 operates at 100 Mbps, the 1.25 Gbps rate of the SGMII is excessive. The SGMII specification allows for 100 Mbps operation by ...
qand's user avatar
  • 57
1 vote
2 answers
50 views

Router: MPU and PHY separate or together?

I'm designing a router and have noticed that some designs use a 'MPU with built in PHY' package on a single chip, whereas others use a PHY IC communicating to a separate CPU/MPU IC over PCIe. What's ...
cdubs's user avatar
  • 413
2 votes
2 answers
449 views

Using an Ethernet gigabit PHY for only 100 and 10 Mbps speeds

I am designing a custom board. I have a USB to Ethernet converter which has 10/100 PHY and I want to connect that PHY to the gigabit Ethernet PHY. I have researched about that problem and found a ...
vision34's user avatar
1 vote
1 answer
96 views

Linking WiFi MCU to Ethernet PHY via PCIe

I'm trying to link this Ethernet PHY to this WiFi 6 MCU via PCIe to make a single port router. Can I directly connect these two, or do I need some kind of host CPU with two PCIe slots to link them? ...
cdubs's user avatar
  • 413
0 votes
2 answers
1k views

How to use Gigabit Ethernet with MCU?

I am new at ethernet and it comes complex. Trying to use STM32's RMII interface with switch. I just want to see at IT's switch gigabit port. I don't want to transfer data gigabit, it doesn't matter. ...
hasanyucelcogal's user avatar
0 votes
1 answer
37 views

Using ethernet PHY building blocks PAM/PCS

This is a more theoretical question. Is it possible to use internal building blocks of an Ethernet PHY directly and without typical Ethernet framing? I am looking for a way to have access to the ...
ARi's user avatar
  • 1
2 votes
2 answers
285 views

Ethernet devices polarity reversal support

Does all Ethernet PHY devices support polarity reversal even if its not mentioned in the datasheet? [I mean polarity reversal by swapping TX+ with TX- (Like connecting TX+ to RX- or TX- to RX+). Is ...
user avatar
1 vote
1 answer
1k views

Ethernet with STM32

I designed an ethernet microchip with reference (LAN8742A-LAN8742) with MCU STM32F767ZGT6, so I followed some document routing ethernet in PCB I respect all rules. when I put the ethernet there is a ...
PCB-ABBS's user avatar
  • 176
5 votes
1 answer
441 views

Connecting a PHY to another PHY on a same board

I would like to connect voltage-mode PHYs with internal terminations back-to-back. After doing some research, it looks like simple AC coupling caps can work, but it's better to use a transformer, ...
jp28212821's user avatar
0 votes
0 answers
50 views

Additional processor needed for WiFi-MCU module?

I'm reading up on the design of WiFi-to-Ethernet converters, and came across the Ubiquiti U6-LR Teardown. I noticed that both this device and its competitors have not just a WiFi-enabled MCU and PHY, ...
cdubs's user avatar
  • 413
2 votes
2 answers
334 views

What is the voltage at this pin when it is internally pulled high?

I am using a PHY that has internal pull-ups and pull-downs on certain pins. On this particular pin, there is a pullup that the datasheet says can range from 33 kΩ to 93 kΩ. For the entire range, I ...
Matty's user avatar
  • 189
1 vote
1 answer
74 views

EEPROM size & Managed Mode vs Unmanaged Mode Ethernet Switch

I want to understand 2 points in Ethernet Switch ICs. In this IC - LAN9353, on page 34, the description in the table is mentioned. "A low selects 1K bits (128 x 8) through 16K bits (2K x 8). A ...
user avatar
0 votes
0 answers
47 views

Ethernet PHY MAC Controller - DHCP Request not responding

I am working with this Ethernet PHY. This is the - MAC Controller IC. I'm using the RMII interface. When Renesas send the DHCP request, I have the feeling (not 100% sure, I will try to find it out) ...
user avatar
1 vote
1 answer
122 views

Ethernet PHY RMII waveform without LAN Cable connected

Is the below waveform that I am getting in TX- line of Ethernet (PHY Used - LAN8700) correct? (Waveform obtained without connecting the LAN cable). Using RMII mode in the PHY. R801 & R803 (pin 1) ...
user avatar
2 votes
2 answers
150 views

Ethernet differential signals

I've 2 questions on Ethernet design: Suppose I am using a current mode Ethernet PHY which requires termination resistor of 49.9 ohms to VDD on the Ethernet differential lines. Can I increase the ...
user avatar
0 votes
1 answer
76 views

Question on Resistor and Capacitor Arrangement & Power Supply

I'm using this PHY My questions: Is it OK, if I connect 1uF and 1000pF capacitor on the VDDCR pin instead of the recommendation of "1uF & 470pF"? Higher capacitance on the power rail ...
user avatar
0 votes
0 answers
39 views

PHY core voltage not proper

I'm using this Ethernet PHY where I'm using an internal regulator for 1V2 by pulling down the LED1/REGOFF Pin. But few boards are generating 0v9 or 0v8 and few boards are not generating VDDCR Supply ...
user avatar
3 votes
3 answers
1k views

Ethernet transformer

Can someone tell me what is the meaning of Open circuit inductance and why we need to take care while choosing magnetics? Also I have seen that, the turns ratio for selecting magnetics is 1:1 and must ...
user avatar
1 vote
1 answer
2k views

Voltage mode Ethernet PHY and Current mode Ethernet PHY

In the Ethernet PHY, we have two types. Voltage mode PHY and current mode PHY. Can anyone tell me the reason why the center taps of magnetics are shorted in case of connection to a current mode PHY ...
user avatar
1 vote
1 answer
96 views

What is the impact of different values on the internal capacitor in the magnetics

I am using this connector which has the internal magnetics. I am connecting it to an Ethernet PHY device. In the datasheet, we can see, that it has internal capacitors of 100nF. I went through this ...
user avatar
0 votes
0 answers
29 views

What does "No receivers detected" mean for Configuration Link Status?

I'm trying to bringup PCIe, and stuck when trying to link up. Configuration Link Status is 00, which means "No receivers detected", as this document says ...
Chen Li's user avatar
  • 115
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0 answers
61 views

Ethernet Controller - Signals

I was going through the datasheet of this Ethernet controller IC. I see that the pins are different than that of a Normal Ethernet PHY. Usually PHY has Ethernet Tx and Rx signals and has the MII/RMII ...
user avatar
0 votes
1 answer
43 views

Meaning of Speed and Duplex pin in the IC

In this - Link of the datasheet, can someone tell me what is the meaning/purpose of the DUPLEX Pin and the SPEED pin. Unable to understand what it actually does and what does it indicate?
user avatar
0 votes
1 answer
53 views

What is support for an end-to-end and peer-to-peer transparent clock?

In the datasheet of LAN9353, the description states that it supports "supports end-to-end and peer-to-peer transparent clocks" Can someone tell me what is the meaning of this?
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0 votes
0 answers
136 views

What is the standard common mode voltage of Media Dependent Interface MDI[0:3]± signals?

I am working on the selection RJ45 connector for MDI interface between PHY and the link-partner. I am planning to use this PHY for my SGMII interface application. From various online readings, I ...
student7's user avatar
  • 319
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0 answers
49 views

Normal Switch and LAN9353

I am reading about the different types of LAN Switches. And I came across the LAN9353 device - Link I want to understand the difference between a normal Gigabit Ethernet 3 port switch and this LAN9353 ...
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-1 votes
1 answer
69 views

Ethernet Switch and QoS Support

I'm going through the Ethernet Switch IC - Link In the first page, under highlights section, it is mentioned as switch is QoS support. When I tried to research on what QoS means on this Link, I found ...
user avatar
0 votes
3 answers
432 views

Splitting of a differential signal

Can the Ethernet Tx and Rx signals (Using all 4 pairs; RGMII interface) be split into 2 so as to connect to 2 RJ-45 connectors, but only 1 will be used at a time. In general, can we split any ...
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0 votes
1 answer
255 views

KSZ8081 PHY address configuration

I'm using this KSZ8081 PHY transceiver. I'm unable to understand how to configure the PHYAD[0:2] pin and the B-CAST_OFF pin. As far as I read, the PHY Broadcast address will always be "0" ...
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0 votes
1 answer
179 views

Ethernet Switch configuration mode

I'm trying to understand the Ethernet Switch product. On page 54,55, we can see that, the MAC signals, Like for MII and RMII interface, we can understand that the digital MAC port 3, can be configured ...
user avatar
0 votes
1 answer
324 views

RX_ER peripheral not used in RMII

I'm using this PHY and MAC in this Controller The Controller does not have the ENET_RX_ER peripherals in the 100 pin package. In that case, can we handle the RX_ER in RMII interface using a GPIO port ...
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0 votes
1 answer
259 views

Media Independent Interface

I'm reading about the PHY, MAC and the MII interface. I understand that the MDI interface from the RJ-45 to PHY will be 10Mbps, 100Mbps or even higher to 1Gbps. But when this data signals move to the ...
user avatar