Questions tagged [pll]

PLL is short for "Phase Locked Loop". A PLL is a circuit that is able to keep a local (voltage controlled) oscillator synchronized with an independent given signal frequency.

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25
votes
3answers
21k views

What is the difference between a PLL and a DLL?

Phase Locked Loops (PLL's) and Delay Locked Loops (DLL) are used in various applications but there isn't yet a salient discussion of the key aspects of these circuits, how they operate, in what ...
15
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3answers
4k views

How can over 24 GHz communication be possible?

I read the article Google wants the US' wireless spectrum for balloon-based Internet. It says to use over 24 GHz frequency spectrum for communication. Is it ever possible to generate that high ...
9
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5answers
9k views

What is the difference between first order, second order and third order phase locked loops?

What does PLL order represent? What are the disadvantages in order 1 & 2 PLL comprared to order 3? How to choose the pll type for an application like QPSK demodulator?
6
votes
3answers
5k views

Can I input a square wave LO into a mixer?

I would like to downconvert a signal at 169.55MHz (10khz bandwidth) into an IF of 20.4MHz. For that purpose, I need a local oscillator of 149.15MHz or 189.95MHz. But... of course, I cannot find a ...
3
votes
2answers
128 views

How do I differentiate two distinct frequencies? 24Mhz and 40Mhz

I have these two frequencies fed to the input of the PLL and need to vary the B.W according to the frequency. But before that, how do I differentiate between these two frequencies?
1
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1answer
8k views

Whats the principle of a PLL used as demodulator of a FM signal?

I didnt quite understand te following: A basic PLL consists of the following parts: phase detector low pass filter VCO If you input a 1MHz sine the PLL will try to lock on it by controlling the VCO....
0
votes
1answer
302 views

Confusion: Lock range of PLL

Suppose we have a type-I PLL whose block diagram is shown below: Here \$k_{pd}\$ is the average gain of the phase detector producing the control voltage \$V_c\$ which is input to the Voltage ...
2
votes
1answer
414 views

orthogonal singal generator

I am working on a single phase PLL (phase locked loop) and I would like to make a phase shift by using orthogonal signal generator non frequency dependent. I have found many method like transport ...
1
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1answer
504 views

PIC24 PLL module is always out of lock

I have been working on a PIC24FJ128GA310 development board for for some time now and recently got a PCB made. If I try to move my code into the new board all timing related math and functions are ...
0
votes
1answer
63 views

Driving high impedance load with Crystek Sine Wave Oscillator- CCSS-945X-25-100.000

I am planning to use Crystek CCSS-945X-25-100.000 sine wave oscillator to drive the reference CLKin pins of TI PLL IC LMK04832 . Now in datasheet of oscillator, output power mentioned is 5dBm into 50 ...
0
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3answers
828 views

Add a Tunable delay to a TTL pulse?

How can you add a tunable delay to a TTL pulse? My understanding is that this is the job of a PPL. I am not sure if a digital PLL delays a square wave or if it can also delay a single rising edge (...