Questions tagged [pmos]

A p-channel metal-oxide semiconductor (pMOS) transistor which has has p-type carriers used in the channel. The channel is established by a negative voltage on the gate which inverts the substrate (NWell) under the gate which turns the device on. The term may also be used to describe logic circuits built around pMOS transistors.

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42 views

Thevenin Equivalent of Common-Gate Amplifier

I'm having some difficulty understanding how Razavi determined \$V_{\text{in, eq}}\$. My understanding was that the small-signal model allows us to model the PMOS device as a constant current source (\...
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29 views

MOSFET diffusion to substrate capacitance

in order to eliminate body effect one way is to connect the substrate to source when the well is for a single device (PMOS with a well in a CMOS for example) , but i read that it increases the source ...
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Zero Gate-Voltage Drain Current (IDss) vs Drain Source Voltage (Vds) relation for PMOS

The Drain to Source leakage current Idss at Zero Gate voltage (Vgs= 0) is normally 1uA(max). However the relationship (or Graph) with Vds (Drain-source voltage) is not mentioned in Datasheet. Que: ...
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38 views

Vds meaning in characteristic curve of a MOSFET

As I was wrapping up my design (which didn't include MOSFETs as switches tho, yet), I've realized I wanted to make it crystal clear for myself if I understand the thing correctly. Feels weird, but ...
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301 views

Why are the voltages the way they are in this transistor circuit?

This question is about what my book calls "transmission voltage" when an nmos is conncted to the power source, or a pmos is connected to ground. It has a hypothetical diagram ass shown: It ...
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56 views

Limit inrush current after emergency stop relay

I have a power board with an emergency stop (using a mechanical relay). The input voltage is 24V and on the power board I have multiple DCDC converters, some before the emergency stop and some after. ...
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71 views

Which voltage is lower, 0V or -1V for connecting a MOSFET's source terminal?

In an NMOS transistor the source should always be connected to the lowest voltage. Does this mean that if the source was originally grounded, but then the drain was connected to -1V that the source ...
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27 views

Capacitances in a PMOS transistor: what about the n-well?

So I'm studying MOS transistors and came across the topic of capacitances between various terminals/contacts, including the bulk terminal. These capacitances are due to lateral diffusion as a ...
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Connecting terminals in layout Cadence

So I'm using CADENCE and I'm trying to learn layout.I'm using the AMS 0.35 um technology. The question asks us to connect vdd (in layer MET2) to the bulk of a PMOS transistor. However I'm not sure if ...
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40 views

How to analyze this MOSFET H-bridge circuit?

In my university electronics course project, I am asked to analyze an H-bridge circuit. It is a simple H-bridge in which the motor is represented with a 37 ohm resistor and thus has no diodes. The ...
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27 views

PMOS Cascode (Virtuoso)

I have been given an assignment in which I have to implement a common source PMOS cascode (2 PMOS's above Vout, with upper one having the input voltage, and 2 NMOS's below Vout) using Cadence Virtuoso....
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49 views

Help with P channel FET not turning off

The circuit consists of an NRF52840 MCU controlling the power to a CO2 sensor. The output from the sensor goes to a buffer which then feeds it back to an analog input. The MCU operates at 3.3V while ...
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50 views

Making a PMOS act as a low voltage drop diode

I would hope to replace my Schottky diode that is acting as a as or diode. I do not like how high voltage drop the Schottky diode is making thus I would like to switch to a MOSFET. And the simplest ...
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47 views

I want to regulate 52 volt to 44 volt with applying different pwm signal

I just want to regulate 52 volt to 44 volt with different pwm signal from arduino through a optocoupler 4n35.I just use this circuit in which i used 6 pmos and 6 optocoupler...i applied 52 volt and 45 ...
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39 views

Small signal gain

I'm struggling to find the small signal gain of the circuit shown below. I am trying to find the gain from Vout to Va. Note that Vout corresponds to the output of an amplifier. Any help is much ...
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38 views

Help to select MOSFET gate driver

I am implementing a system where I need to use 2 switches, 1 NMOS and another PMOS. The switches are controlled by a PWM wave that operates at a frequency of 1MHz. You can see in the attached figure ...
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32 views

2 trnsistor mosfet in line

i tried to calculate the cuurent that flow into 2 trnsistor that conect in line. the drain of the first is conect to the source of the other. and they conect to the same Vd. one of them is l1=1010^-4 ...
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MOS device sizes

Hello guys! I just want to ask what's the difference between the actual W/L and the W/L shown at the image below? I'm kind of confused. Thank you!
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Simulating PMOS differential amplifier in Cadence

I am studying about rail-to-rail opamp design and I am trying to recreate the Itail vs Vgs (in this case input common voltage) curve from the link bellow (pages 5 and 6): https://mixsignal.files....
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94 views

ALD1106/1107 transmission gate “off” state behaviour in LTSpice

I am making a transmission gate using ALD1106 NMOS and ALD1107 PMOS model files. For -5V (to NMOS and +5V to PMOS), with input 5V, the output should come 0 as the transistors would be in off state. ...
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31 views

Value of R in reverse voltage protection circuit based on PMOS

How do I choose the value of R2 in this circuit? (V = 12V, I = 2A) For the PMOS I am using SI2323DDS-T1-GE3 (Datasheet), is it to ok to use this PMOS (Maximum Power Dissipation=1.7W)? For the Zener ...
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58 views

reverse voltage polarity protection

I'm thinking about making a reverse polarity protection for a buck converter AOZ1284, and I've found this article design-guide-pmos-mosfet-for-reverse-voltage-polarity-protection I didn't find the ...
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49 views

pmos latch switch

We have a power distribution board for our robot that is responsible for switching power to various modules (controlled via stm32 gpio). The first implementation was pretty simple. we used a high side ...
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209 views

Why are two transistors or one transistor and a resistor used for a NOT gate?

We use one n-type and one p-type MOS transistor for a NOT gate or one transistor and one resistor. Why can't we use one transistor only without a resistor?
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54 views

back gate effect in low volatge circuits

1- In some circuits (Low voltage ones) the body of the pmos is connected to the gnd and nmos to the vdd. i wanted to know the reason behind this technique or in others words what's the idea behind ...
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Details regarding PMOS and NMOS transistors used as gates

My lab instructor explained very briefly what transistors are and started by naming them NPN and PNP then switched to PMOS and NMOS and I (as well as my classmates) am very confused, I need someone to ...
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How to write Boolean Algebra of a CMOS circuit?

How to write the boolean algebra of this circuit? I am confused with the inverter in the middle . Any help will be greatly appreciated!
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336 views

Why is the PMOS in NAND gate in Parallel and NMOS Series?

Why is the PMOS in Parallel, and the NMOS is in series?
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Voltage drop across PMOS (power mux circuit with two load switches)

I'm trying to build a power multiplexer (with two load switches made with pmos transistors). When 3V3 not present, it will use 1V8. I built this circuit but it drops the voltage to 2.6V (when 3V3 is ...
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84 views

High Voltage Switching with Mosfets

I am currently working on a prototype that is going to generate a burst of pulse of high voltages (e.g. 1KV). To do this, I first made a voltage multiplier and feed the mains voltage (230Vrms) ...
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49 views

Problem with closing high side P mosfet using B type amplifier

I am using this high side P mosfet dirving circuity: My problem is the main P mosfet doesn´t deactivate entirely. More specificly its gate is at 8,4V (with 15V vbat voltage it makes 6,6V gate - ...
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62 views

P ch MOSFET datasheet confusion

I have a faulty PMOS that I have to replace, but the part seems to be out of stock. STL6P3LLH6 I have found a very similar device spec-wise, but there is some difference between the two. The original ...
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54 views

PMOS circuit, issues with Vgs

I'm currently trying to make a simple circuit to shutdown an IC (GPS SIM28ML). So I ended up with this: In green are the voltages measured when activating the NPN transistor, in blue the voltages ...
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31 views

H-bridge PMOS VGS value

I'm trying to figure out how to determine the VGS of the H-bridge (M5) in theory. D1 is a 3.3V zener diode. Since the PNP is off in this case, shouldn't the gate voltage of the PMOS be 20.7V and VGS ...
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P-MOS Selection for 12v application

First off, let me state that I am pretty new to FETs, so I'm still wrapping my head around the different characteristics. The circuit below is a switch that will trigger a 12v (...
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4answers
246 views

High-Side P-Channel MOSFET Won't Turn Off!

I'm using the attached circuit to control the power supply of my battery-powered product. This is the 8th version; the newest addition is Q1 which I'm using for reverse supply protection. All previous ...
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261 views

Why in a PMOS transistor VDS has to be negative?

I can't understand why it is required that VDS is negative in a PMOS transistor while it must be positive in an NMOS. Thanks
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P channel MOSFET unexpected current leakage

I am using a P-channel MOSFET to drive a load. My load is an bluetooth module consuming 6 uA (according to datasheet) in sleep mode. I am controlling the gate with the main MCU which is stm32l4. The ...
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251 views

Why it is preferred to use PNP and PMOS for pull-up, and use NPN and NMOS for pull-down

I have noticed that when I was designing universal logic gates like CMOS NOR gate that uses PMOS for pull-up and NMOS for pull-down. Then I faced it for second time with the H-bridge circuit, but ...
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301 views

Deriving the NOT logic gate using PMOS logic

I recently started learning about Field Effect Transistors (FET's) and about the MOS circuit family. From my understanding NMOS is made from a p-type substrate and n-type source/drain, whereas the ...
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71 views

How do I design a RC phase shift oscillator using opamp with the help of cmos (pmos and nmos)?

Designing the opamp using cmos (pmos and nmos) to construct RC phase shift oscillator using opamp with the help of opamp (constructed using cmos.)
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59 views

P-MOS Gate-Source Threshold Voltage drop (Along with inrush current limiter)

I am having a circuit which I have tried to simulate and understand the working. Circuit parameters : Zener Breakdown voltage = 6.2V P-MOSFET Vgs threshold voltage = 1.5V Inrush current limiter = 3....
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53 views

P-channel MOSFET switch - very high Rdson

I am trying test my p-channel mosfet (IRF9Z34) high side switch on load. On circuit simulator I get the result I expect, Rdson (VM1) is low and load current is 1.4A. (In the target system the gate ...
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576 views

Why PMOS act like “close switch” when zero voltage

in PMOS that Vtp less than 0 , from what I understand if We give Vg less than Vtp it has current flow from source to drain ,on the other hand if we give Vg more than Vtp it cut-off. but in digital ...
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384 views

Do I really need the N-MOS driver here?

In this circuit I am wondering if I really need the n-channel mosfet to control my dual p-channel MOSFET. I think I can drive this straight from the micro. Just want to second opinion before I modify ...
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106 views

Setting Rds(Ron) for PMOS for LDO

I am modeling LDO using ZXCL280 Datasheet. By understanding datasheet dropout voltage of the PMOS is seen as 1.46Ω(From page 5 ...
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p-channel mosfet ltspice simulation

Below circuits are created in LTspice to confirm my understanding. Digital input(Vg) would be controlled by the user(High or Low). 'On' condition: Vg < Vs+Vt for P-channel mosfet 1) For Vg = 0, ...
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38 views

MOS circuit for RC circuit power

I am currently working on a circuit where we read the time it takes for a capacitor to charge depending on the load. I would like to know what is the purpose of the first stage with Q1 and Q2. I also ...
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566 views

Simulating Power PMOS using LTSpice

I have a power P-channel MOSFET that can produce a max of -34 A and whose datasheet does not include parameters W or L. How can I model this PMOS without W or L if I only have \$R_{DS_{on}} \$ and \$...
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63 views

What is the resulting Voltage Transfer characteristics of the modified CMOS-inverter circuit if NMOS and PMOS are interchanged?

What is the resulting Voltage Transfer characteristics of the modified CMOS-inverter circuit, if the positions of \$NMOS\$ and \$PMOS\$ are interchanged?

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