Questions tagged [pmos]
A p-channel metal-oxide semiconductor (pMOS) transistor which has has p-type carriers used in the channel. The channel is established by a negative voltage on the gate which inverts the substrate (NWell) under the gate which turns the device on. The term may also be used to describe logic circuits built around pMOS transistors.
351
questions
0
votes
2
answers
66
views
How to calculate the voltage gain of a circuit with P-MOS and N-MOS transistors?
I was asked to calculate the voltage gain of a circuit containing 2 P-MOS and one N-MOS transistors:
I calculated the operating point and got: gm1 = gm2 = gm3 = 2 [ms]
The circuit that I built for ...
1
vote
2
answers
63
views
PMOS switch for protection
I have theoretical doubts about the operation of PMOS. Let's look at these two identical circuits in which only the polarity of 12V changes:
The circuit on the left where 12V are connected "...
2
votes
1
answer
61
views
How to choose the right PMOS for inrush limiting application
I have a DCDC Buck-Boost converter circuit that needs inrush protection. I have looked around the internet and the resources for a viable solution and decided to use the following circuit from this ...
6
votes
1
answer
577
views
Will this over-voltage protection circuit work?
I am designing a PCBA that is powered from an AC adapter supplying + 19 VDC to the circuit. I want to add a protection against over-voltage, let's say up until + 24 VDC. I came up with the following ...
3
votes
4
answers
216
views
How to make this high side current limiter more predictable [closed]
I started out experimenting with a very basic current limiter that begins to pinch off a pmos when about 0.7 V drops across a shunt
I then decided I wanted to be able to trim the current with a pot ...
1
vote
0
answers
195
views
P-MOSFET not turning OFF
I am using an IRF9640N P-channel MOSFET to switch a 100 Ω load. Gate is controlled via 2N5551 NPN transistor using a series of resistances. The circuit works perfectly fine up to 40 V of supply ...
0
votes
1
answer
66
views
Diode Connected PMOS Doesn't Fully Activate
I'm very new to electrical and am trying to understand a diode connected PMOS. I am supplying 3.3V to the source and have tried varying loads after the drain of 220, 10k, 100k, 650k, 1.2M ohms. What I ...
0
votes
1
answer
53
views
High side PMOS FET for pre-charge circuit
I'm trying to charge a large capacitor bank (C1) with a resistor (R1) and when it's mostly charged, activate a p-FET (M1) using an op-amp comparator. I built a PCB but the p-FET isn't turning on.
I ...
0
votes
0
answers
46
views
When a typical fixed output voltage LDO is unpowered, is the output pulled to ground or is it floating/high impedance?
I am wondering since in a design the gate of a PMOS is pulled up by the output of a voltage regulator.
Since the source of the PMOS still sees voltage on its source in that condition, I don't know if ...
1
vote
2
answers
144
views
Why simulation of single NMOS/PMOS on LTspice has big difference with manual calculation using Level 1 Standard Parameters?
I am researching the mode of operation on PMOS and NMOS using Level 1 standard parameters.
This is the information of the NMOS circuit to be designed.
Using transistor model level 1 parameters, ...
0
votes
1
answer
56
views
How to interpret MOSFET connections and voltages
I have a few simple question about MOSFETs on how to interpret their symbols and how the pins and gate voltage are defined.
• I see symbols with the Source shown on the top and Drain on the bottom, ...
0
votes
4
answers
127
views
Why does powering an ESP32 directly from a power supply work, but when powering through a pMOS it doesn't?
I have this circuit which is used to switch on an ESP32 from another MCU. The GPIO goes on, the nMOS circuit becomes closed and the pMOS gate voltage drops to 0 which then also closes to allow the 3V3 ...
0
votes
1
answer
63
views
Clarification on the Application of a p-Channel MOSFET in a Circuit Diagram
I am seeking clarification on the application of a p-channel MOSFET as illustrated in the diagram below. Could someone please provide an explanation?
In the diagram, legs 1, 2, 6, and 5 serve as ...
1
vote
1
answer
165
views
CMOS (Energy Supply of voltage) [closed]
Can someone please explain why, when \$ln\$ is transitioning from low to high, the energy supplied is \$C_{vdd}\cdot V_{dd}^2\$?
0
votes
1
answer
240
views
PMOS configured in common gate
This is an NMOS configured in common gate:
I am trying to understand what a PMOS configured in common gate would look like. Would Vin and Vout be reversed in this case? So, would VDD be connected to ...
0
votes
1
answer
147
views
How is the total gate charge of a MOSFET affected by the temperature?
For P- and N-MOSFETs, Vgsth will decrease (in absolute value) when the temperature rises.
What is the impact of the temperature on the total gate charge for P- and N-MOSFETs?
What is the order of ...
0
votes
0
answers
41
views
PMOS circuit Voltages doubt in LTSPICE
I am trying to understand basics about PMOS transistor such as understand Vth value when the transistor goes to saturation and permits the drain to flow completely.
My circuit is this and the voltages ...
0
votes
0
answers
50
views
Microcontroller mosfet switch
There are three different processors in my circuit. These are STM32F401RCT6, ATmega328P and ESP32. I want to turn these processors on and off with the switch whenever I want. The circuit I created for ...
2
votes
1
answer
53
views
9T SRAM Circuit Supporting 1-bit Multiplication
I was reading a paper that added a 3T NAND gate, consisting of two NMOS and one PMOS, to the regular 6T SRAM, achieving 1-bit multiplication. However, I'm struggling to understand how the NAND part of ...
5
votes
2
answers
441
views
Load Selector/Load Switch
Following the provided schematic, my goal is to design a circuit that can determine the direction of a Pulse signal based on a control signal (CTL). To achieve this, I am utilizing two pmos ...
1
vote
4
answers
221
views
Output level of common-source amplifier with PMOS load
Let's consider the common-source amplifier circuit above (left). This circuit does
not have a well-defined output level. This part is easy to understand. In the
book by Razavi, he says this "...
0
votes
2
answers
94
views
5V 2 Rail ORing Power Switch Issue
I'm trying to create a power switch that toggles between two DC power sources. I have two 5V DC sources: one from an adapter and the other from a Type C VBUS port. The adapter takes priority, meaning ...
0
votes
0
answers
50
views
PMOS + resistor \$I_{DS} - V_{DS}\$ curve
I'm trying to plot the \$I_{DS} - V_{DS}\$ graph for a PMOS and a resistor.
I'm getting this so far:
Weird thing is, what I should get (based on my course) should be something like :
How come the ...
6
votes
1
answer
502
views
Why is the gate resistance of this PMOS so low? It should be very high
I'm looking for PMOS with BJT
to drive a load (motor,) that is controlled by a microcontroller (IO_FET):
The motor needs three amperes of current.
I looked at the manufacturer's pages of the PMOS (...
1
vote
2
answers
544
views
How to make a PMOS work as a constant current source?
I have a circuit in which, the PMOS is biased to a voltage source, the gate voltage, V1, of the NMOS below varies based on the functioning of the analog circuitry before. Because of this, the current ...
1
vote
0
answers
91
views
Electric-lock control via NMOS matrix
Currently I am working on the design that allows to control 8x8 electric lock matrix via PIC16F877A.
As in comments for somebody it was not obvious (btw it was mentioned) I am using 64 electric locks ...
0
votes
1
answer
67
views
High Side P-MOSFET Load Voltage
I ran into a problem during a circuit simulation. The circuit is rather simple: one P-MOSFET with a load. The MOSFET is acting like a high-side switch. My load is around 4-5 ohms.
I noticed that the ...
2
votes
4
answers
750
views
Need an explanation of how the circuit works
I came across this bidirectional switch circuit by Texas Instruments.
I know how two MOSFETs configuration works but when I apply the pulse to turn it on and off the NMOS but it does not change its ...
0
votes
1
answer
210
views
Effect of multiplier on MOSFET region of operation
I am designing a wide swing cascode current mirror using PMOS. In the fig attached below, M4 goes into triode when I change the multiplier value. I need to output a current that equals 50*Iref. The ...
0
votes
1
answer
266
views
the inverter switching point
As we know the mobility of the "nmos" device is 3x greater than "pmos", and when we want to correct the switching point of an inverter for vdd/2 we usually change the W of the &...
1
vote
0
answers
55
views
Unicorn Mode PMOS For Hurricane Flooded Golf Cart Controllers
We have saltwater flooded golf carts after hurricane Ian. Their old 0-5k Ohm throttle pots are shot, and replacing them is very expensive. The new throttle systems can be fitted more cheaply, but ...
1
vote
4
answers
378
views
Don't really know, why P-channel mosfet does not switch
I am currently working on creating a switch to control 24 V for BLDC. I am using esp32 to turn on and off the switch (3.3V logic). I intend to use P-channel mosfet, because I want to connect 24 V on ...
2
votes
1
answer
190
views
Protection for PMOS VGS rating
I am using PMOS as a switch to control 24V to deliver to load. When MCU drives the NMOS it is suppose to pull the PMOS gate to GND and turn-on so that load can get the 24V. This is what expected as ...
0
votes
1
answer
49
views
R5613L understandig what MOSFET to use
I want to add a battery-protection to my circuit including a switch to disconnect the battery from the rest. I found the R5613L from Nisshinbo (Manufacturer product site with datasheet).
On page 26, ...
3
votes
2
answers
730
views
What happens when Vdrain is greater than Vsource in PMOS Transistor?
So as I understand, if Vsd = 0 in a pmos transistor, then the current flow should be zero, and the same goes for if Vs<Vd, now my question is, in what state will be the transistor i.e. cut-off, ...
2
votes
2
answers
187
views
Voltage drop of a p-channel mosfet
I am adding reverse polarity protection to my circuit. I can simply use a diode/schottky diode to do that; however, my main concern with a diode is its voltage drop. Therefore, I am considering the P-...
0
votes
1
answer
73
views
Battery isolation circuit with inverted logic
I asked a question some time ago in regards to preventing back charging my back-up battery question. I was just using a diode, but a circuit was suggested for more protection. It doesn't lend itself ...
2
votes
0
answers
99
views
Wide Swing PMOS Cascode Biasing
I would like to know if someone has designed a wide swing PMOS cascode biasing circuit (as attached in the picture) in 16nm FinFET, especially for IO devices having 1.8V supply. I see that ...
0
votes
1
answer
147
views
Wider width or more fingers for CMOS transistor to reduce conduction loss in syncrhonous buck converter?
For a project, I am trying to optimize my buck converter to obtain a power efficiency of 87 %. The non-optimized buck converter gives a power efficiency of 86 %.
I try to size my PMOS 'power' ...
1
vote
3
answers
566
views
Why do I need a pullup resistor at the gate when using a pmos as a high side switch
Very quick question:
Assuming I am using a pmos as a high side switch and my supply voltage and the voltage at the gate I want to switch the transistor with (V_logic) are the same. I usually find ...
1
vote
1
answer
74
views
PMOS misleads immediately upon power on
I have encountered some problems. When I turn off S2, my PMOS will briefly turn on. Can anyone give me any advice related to this?
1
vote
1
answer
122
views
Current flow in PMOS when not active
how can it be that Q2 is active when VA and VB are HIGH?
If I understand correctly, a current (shown in yellow) should flow...
But that is in my understanding not possible because both NMOS are ...
0
votes
1
answer
105
views
P-MOS high side switch problem
I have designed a PCB that utilizes a P-MOS as a high-side switch to control a 48 V battery using the following circuit. The P3 connector is connected to a momentary switch and a 5 V LED. The intended ...
0
votes
1
answer
280
views
High-side H-bridge, where low side is connected to a constant current source
I would like to couple a constant-current source with a high-side H-bridge and it seems to be way more difficult than expected.
In the end, it is a constant current source from 0-10 mA with a voltage ...
0
votes
0
answers
35
views
li1220 (chargered, 4.2v) battery power control with esp32 (2.7v gpio) using pmos
My project has two esp32 modules, one of which is the master and the other controls relays and other "peripherals". Please don't ask "why you need to turn the second esp32 on and off&...
2
votes
1
answer
357
views
Benefits/downside of discrete high-/low-side NMOS/PMOS and high-side bootstrap NMOS switching circuit
What are the key features or rather benefits/downsides of these discrete switching circuits in comparison:
Low-side NMOS
High-side NMOS
Low-side PMOS
High-side PMOS
Boot-strap NMOS circuit
The basic ...
9
votes
2
answers
511
views
P-channel MOSFET gating circuit that passes voltages above 17 V
I'm designing a desktop PC motherboard with AMD Ryzen™ 9 7940HS.
We have an extension board similar to this one that performs negotiations with USB-PD charger and provides 20 V constant voltage to the ...
3
votes
1
answer
371
views
P-channel MOSFET is always on (LTspice)
I've modelled an undervoltage lockout circuit that should trip when the voltage is around 7 V. Attached is an image of the circuit.
At 12 V, the positive end of the comparator is less than the ...
0
votes
3
answers
218
views
What current flows through a Zener diode that is in parallel with the gate of a MOSFET?
I was reviewing this circuit and I can't figure out how much current goes through the Zener diode. I understand that it is there to protect the MOSFET gate against high voltages but how much current ...
4
votes
1
answer
280
views
Low quiescent current, 50V high-side PMOS driver
First, I never used Zener and BJT before, so if I made something stupid please explain, I'm eager to learn.
The project is battery-operated and has 8 to 16 outputs with an individually selectable ...