Questions tagged [pmos]

A p-channel metal-oxide semiconductor (pMOS) transistor which has has p-type carriers used in the channel. The channel is established by a negative voltage on the gate which inverts the substrate (NWell) under the gate which turns the device on. The term may also be used to describe logic circuits built around pMOS transistors.

Filter by
Sorted by
Tagged with
0 votes
0 answers
51 views

Why is that the nmos and pmos in parallel "compensate each other"?

Why is that the nmos and pmos in parallel "compensate each other"? I use the simulation and found both current through nmos and pmos goes up if voltage across drain and source goes up.
user avatar
  • 31
7 votes
1 answer
710 views

Why do we need transmission gate for XOR (transistor level design)?

The following image shows a 6-transistor XOR circuit. But I don't know why the last 2 gates are needed at all, the circuit can be simplified to: Is there anything that prevents us from using the ...
user avatar
-1 votes
0 answers
12 views

Parasitic capacitance values in PMOS

Are these values good for Cgs, Cgd and Cds in a PMOS Active Inductor Cds0 = 6.566E-20 f/m^2 Cgd0 = -1.775E-15 f/m^2 Cgs0 = -4.676E-15 f/m^2 Cds1 = -7.956E-16 f/m^2 Cgd1 = -2.143E-15 f/m^2 Cgs1 = -4....
user avatar
0 votes
1 answer
40 views

P-MOSFET - voltage on a drain pin when fully off

I'm trying to implement high side switch using P-MOSFET with NPN driver. I will drive the whole switch with AVR GPIO running at 3.3V (3.3V GPIO label). KT231B9 (it'...
user avatar
0 votes
3 answers
77 views

Water level indicator using CMOS inverter

I want to build the below circuit. The circuit has three levels to indicate water. low->o/p LED. Medium->O/P LED. High->O/P LED + Buzzer. Each level has two types of MOSFET; they work as CMOS ...
user avatar
0 votes
0 answers
35 views

Failing to design a mosfet switch to control a Softstarter

I am trying to design a pmos switch to control a softstarter from a microcontroller. The soft starter work however there is something I am missing with the MOSFET. Right now the voltage to the soft ...
user avatar
-1 votes
1 answer
106 views

Unknown MOSFET symbol

I came across the schematic symbol shown, and I am unsure of what the symbol in the green box is. It looks like a PMOS (yellow box), but it has the line before the gate. Has anyone seen this before?
user avatar
1 vote
0 answers
70 views

Why choose pmos over nmos

In the attached schematic, there are two branches. The branch on the left has a pmos + nmos transistor. The branch on the right has two nmos transistors. The sizes of the devices were selected such ...
user avatar
0 votes
1 answer
41 views

PMOS/NMOS current direction and digital logic

What happens when the PMOS source is connected to negative Vcc (-Vcc). What I understand is that when the gate voltage is <=0 then the drain-source is connected. Normally I would expect current to ...
user avatar
  • 7
0 votes
2 answers
99 views

Operating of FET in linear region

I have some data and would need some help to design a schematic. My target is to deal with the inrush current. I have a supply voltage range of 25-42V. A capacitive load of 1500uf. So I would like to ...
user avatar
  • 77
2 votes
0 answers
126 views

Small signal analysis of MOSFET circuit

The other day I got the following exercise on one of my exams: For those who don't speak German, for transistor 1 lambda is 0, but not for the others. The backgate-effekt should be neglected ...
user avatar
1 vote
1 answer
68 views

What are the limitations of AC coupling a MOSFET gate?

I came up with this AC coupled half bridge for high positive and negative voltage output with logic level control that I cannot find in any resources about (probably due to wrong search terms): It ...
user avatar
0 votes
0 answers
50 views

Reverse Voltage Protection using PMOS: Bias Resistor selection

1.How to calculate the bias resistor value (100R in snip attached) ?. 2.Is the resistor value depend on Zener clamping value?
user avatar
1 vote
2 answers
140 views

How to determine which terminal of a MOSFET is source, drain or gate [duplicate]

I am a student and for my next exam, as part of the tasks, I need to identify which terminals (pins) of P and N type mosfet are gate, source and drain. I have an example photo here, but if possible, I ...
user avatar
  • 31
0 votes
0 answers
34 views

How to drive high side Pmos buck converter at 40+ voltages

I'm working on a buck converter that will have an input of 42V to 80V, switched at 200kHz with a max load of 5A. My load will require a duty cycle range of 75% to 100% I know the componenet selection ...
user avatar
  • 1
0 votes
0 answers
49 views

To turn a ratioed circuit into non-ratioed circuit, what should be the transistor sizes for proper operation of this circuit?

The circuit is at the bottom. I know it is a ratioed circuit however, how can I convert it to a non-ratioed circuit without adding two more PMOS transistors between Vdd and the other PMOSs. Also, what ...
user avatar
  • 173
0 votes
1 answer
43 views

High Voltage PMOS devices availability

Generic question for experts well versed in semiconductor device physics. Most of the high voltage power switching devices seen are N-Channel (Silicon and Silicon Carbide) with varying ratings. Is ...
user avatar
0 votes
1 answer
72 views

Power switch PMOS controlled by button or Microcontroller (or both, with an OR circuit)

I´m trying to design an analog circuit to use a push button to turn on an MCU and then use it the same push button to change modes. A "one push button circuit". To achieve that, I used a ...
user avatar
  • 143
0 votes
1 answer
61 views

Will this work for power path?

My goal is to disconnect the battery while the device is connected to USB Input. However when the device is disconnected from USB power, the battery will be connected to the system load. I am using ...
user avatar
2 votes
1 answer
58 views

PMOS reverse supply

I'm a little confused, can someone explain to me why this circuit conducts? I thought that the body diode of the PMOS was in reverse polarity and the source node of PMOS should be at 0V, but ...
user avatar
  • 37
7 votes
6 answers
2k views

Can you drive a P-MOSFET as a high side switch directly from a microcontroller?

I have an engineering background, but close-to-zero practical experience with discrete electronic circuit design. simulate this circuit – Schematic created using CircuitLab Regarding the above ...
user avatar
1 vote
1 answer
60 views

finding inverting vs non inverting functions

So Im learning cmos systems and Im struggling with the pmos and nmos part of it. So for example given F=minterms(m0,m1,m2...) I can do the kmap and get the function no problem but how do I know if ...
user avatar
0 votes
1 answer
45 views

VTC curve of cmos when Id does not saturate [closed]

For transistors, if the Id does not saturate at the saturation region (nmos: Vds>Vsg-Vt, pmos: Vsd>Vgs-|Vt|), but follow a linear relationship. How will the inverter VTC curve change? I am ...
user avatar
0 votes
1 answer
76 views

How can a pFET act as a current source?

I was just watching an online lecture from my professor, and I am confused with a rather silly question. It says here that the pFET can act as a current source because the current flows towards VDD. ...
user avatar
0 votes
1 answer
72 views

P-Channel Switching Circuit

I want to use an IRF9530 MOSFET and a variable resistor to be able to switch an LED on or off depending on the value of the variable resistor. Eventually I also want to incorporate a MOSFET inverter ...
user avatar
0 votes
0 answers
74 views

MOSFET diode configuration expression for dynamic bias

I'm trying to think of an elegant way of analytically expressing the gate voltage as a function of time \$V_g(t)\$ (= \$V_d(t)\$) for the diode configured MOSFET below. The sources VDD and V1 are ...
user avatar
  • 1
0 votes
2 answers
51 views

Would an enhancement MOSFET work if there were no minority charge carriers in the substrate?

In an enhancement MOSFET, the channel is created from the minority charge carriers in the subtrate, attracted by the gate polarisation. Consider for example an NMOS. The substrate is P. If the P ...
user avatar
0 votes
2 answers
96 views

P-MOSFET drain to source voltage reverse polarity protection

I have a question regarding the maximum drain to source voltage of a P-MOSFET used in reverse polarity protection circuit. What would the Vds be if I applied 60V to the drain of the P-MOSFET? As the ...
user avatar
  • 21
0 votes
2 answers
86 views

Is my summary of transistor behaviour (on or off) in saturation mode correct?

In the following Table, I made a summary of my understanding of the configurations in which the various sorts of field-effect transistors are on or off, in saturation mode. Is my summary of transistor ...
user avatar
1 vote
3 answers
129 views

MOSFET symbol - direction of source terminal

There are two possible illustrations of MOSFETs : with an arrow, and without an arrow. example for NMOS with arrow : example for NMOS without arrow : example for PMOS with arrow : example for PMOS ...
user avatar
0 votes
1 answer
68 views

Are NMOS and PMOS semantically meaning *enhancement* NMOS and PMOS?

Are NMOS and PMOS semantically meaning enhancement NMOS and PMOS? If so, how are depleted NMOS and PMOS called?
user avatar
1 vote
3 answers
117 views

PMOSFET driver not pulling gate voltage up to supply

I just started learning about MOSFETs and gate drivers and the like. I wanted to make an H-bridge operating at 320kHz that can later be modified through the use of faster FETs to get up to ~10MHz. I ...
user avatar
0 votes
1 answer
65 views

Choosing an appropriated P-MOSFET

I'm implementing this circuit with IC BQ24308 so I need to pick a PMOS for the circuit shown: This is the block diagram of the IC: Design guide picks Si2343DS PMOS as the Qext but I don't ...
user avatar
  • 55
0 votes
1 answer
46 views

PMOS current mirror acting wonky in Simscape

I am trying to model a current mirror, seen below, solely built upon PMOS. This should not be a hard task because the theory and implementation are straightforward. What I do get when I model it in ...
user avatar
0 votes
1 answer
638 views

PMOS Saturation Condition

we know for nmos works in active region, we must have Vgs-Vth>0 and Vds>Vgs-Vth. For PMOS can I write like this | Vgs|-|Vth|>0 , |Vds|>|Vgs|-|Vth|. Please correct me if I am wrong
user avatar
  • 241
0 votes
1 answer
99 views

Reverse Battery Protection using P-Channel MOSFET

I read the TI document on page 5, according to this figure, when the GS of MOSFET from negative to positive the P MOSFET turned off, but why the Vout voltage will drop to minus.
user avatar
  • 349
0 votes
1 answer
68 views

Switch on/off connection between variable voltage source and load

I am trying to switch on/off the connection between a load and a variable power supply (going from -10 to 10 V) using a combination of NMOSFETs and PMOSFETs. I want to use MOSFETs because of limited ...
user avatar
0 votes
1 answer
77 views

MOSFET FDN337N faulty (shorted)

We have a circuit like the attached. If the "+18V" was connected and the "power_on" was left(forgot, since they are from two different connectors) unconnected. FDN337N will became ...
user avatar
2 votes
1 answer
494 views

Why is the current flowing into the power supply?

I tried to make a latch , and observed that there was current flowing through the PMOS into Vdd for some time duration. But then during that time the voltage across the drain is less than Vdd. Can ...
user avatar
0 votes
0 answers
60 views

PMOS turn on and turn off condition

I am planning to use the FDC6312P (PMOS) in my circuit and want to know the turn on and turn off condition for the PMOS. I looked at the datasheet to find the turn on and turn off condition but too ...
user avatar
  • 101
0 votes
1 answer
60 views

Switch capacitive load with a PMOS

I want to switch a capacitive load with a PMOS once while running, then the continous current is maximum 13mA. The capcitive load is 2x10uF X5R, 1x1uF X5R and 1x100nF X5R, so pretty low series ...
user avatar
1 vote
2 answers
2k views

Short in MOSFET between Gate and Drain

I try to understand a circuit, where this is a part of: To me this looks like a short between the Drain and Gate in the pmos at the top and nmos at the bottom. The line from the top pmos to the right ...
user avatar
  • 113
0 votes
1 answer
67 views

Slight confusion about PMOS

So ive really only learned about the opration of the NMOS. In woudlnt to check my understanding of the PMOS, i believe thy are very similiar. I want to know, exactly how are the voltage applied? I ...
user avatar
2 votes
1 answer
303 views

Why did this MOSFET blow up?

I have a DC drill with adjustable speed. I would like to add a battery protection circuit which shut-downs the motor if the battery voltage is too low. I would like to use the built-in slide switch ...
user avatar
  • 23
0 votes
1 answer
75 views

Are PMOS still ideal for Reverse voltage protection of 75 A

I am creating a power management circuit for a 20m RGBW led strip, these leds operate on 5v and would require a current consumption of about 60A. I will actually split it into 8 channels of 2or3 ...
user avatar
  • 1,522
1 vote
0 answers
35 views

USB Power Selection Circuit review

I have a device that can take power in from two USB ports. I want to make sure that when the USB2 is plugged in, the USB1 Power gets disconnected. I have come up with the following schematic design ...
user avatar
  • 101
0 votes
2 answers
69 views

P-MOS controlled by N-MOS via MCU, resistor values

This is the schematic: For this switch setup to work, time delays even up to 50 ms is acceptable. How do I calculate/estimate resistor values? R1: Gate pull-up for P-MOSFET. (defaults to P-MOS being ...
user avatar
3 votes
6 answers
684 views

What affirms channel current direction in nMOS and pMOS?

In circuit designing, it is a common phenomenon to presume that in case of nMOS the channel current flows from drain to source (also seen in schematics), while in the case of pMOS, channel current ...
user avatar
3 votes
1 answer
96 views

Intuition for stability differences between PMOS and NMOS linear power supplies

Reading this question and the linked TI's LDO document led me to a more direct comparison between the two approaches: Notes: I'm using a separate V+ for the general purpose opamp to provide more ...
user avatar
  • 6,103
2 votes
2 answers
431 views

How does a PMOS LDO work?

The circuit diagram is taken from TI's LDO Basics. I don't understand how this circuit regulates the voltage, and neither do I know where I should start. But here's my attempt (with some values ...
user avatar
  • 1,188

1
2 3 4 5 6