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Questions tagged [pmos]

A p-channel metal-oxide semiconductor (pMOS) transistor which has has p-type carriers used in the channel. The channel is established by a negative voltage on the gate which inverts the substrate (NWell) under the gate which turns the device on. The term may also be used to describe logic circuits built around pMOS transistors.

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Why is vo = 0 when VI(gate voltage) = 0. Also why is are both mosfets operating in the saturation region . Could someone explain why this is so?

According to the book Vo =0 when VI(gate-voltage) = 0. Why is that so? Why does the book also assume that both mosfets are operating in the saturation region? when VI = 0. I appreciate the help. ...
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Getting brownouts when using MCU controlled P-FET to switch power to another board

I have an MCU connected to a logic level P-FET(part no AO3401A). The source is wired to a 3.3V regulator that also feeds the MCU. The drain is wired to an LED and a header that connects to a second ...
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How to redesign the circuit such that the switching threshold is VDD/2.

he switching threshold is the input voltage where the output crosses VDD/2. I want to redesign the circuit such that the witching threshold is VDD/2.
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Having trouble understanding CMOS and PMOS circuits [closed]

I'm in a digital logic class and I've got a solid grasp on Boolean algebra, SOP, POS, NAND, NOR gates, etc. Now I'm having trouble in understanding what NMOS, PMOS and CMOS transistors are and how ...
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733 views

Problems with DC analysis of a PMOS circuit

I'm beginning with electronics and I've picked up the book from Donald. A. Neamen - Microelectronics. I'm stuck at a simple example of DC analysis for this PMOS circuit. simulate this circuit – ...
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1k views

Pull up resistor on P-MOSFET gate. Not working

I am building a battery-powered datalogger that will communicate using cellular signal, based on the ATSAMD21 microcontroller and the SIM5320 cellular modem. To save power, an outside timer ...
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1answer
167 views

Li-ion power supply with a charger, a booster, and a pMOS high side switch

I am designing a circuit board for a small mobile robot and there is a problem with the power supply. The circuit is powered by a 1-cell Li-ion battery (VBAT) and includes a charger (MCP73831/2), a ...
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94 views

Soft latch on/off button simulation

I am trying to simulated in pspice a soft latch on/off circuit but it is not working as expected, even if I double check the implementation. Can someone explain to me why the voltage on the probe is 0....
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231 views

Level shifted PMOS driver operation

simulate this circuit – Schematic created using CircuitLab Having some confusion this gate driver. It can be found in Design and Application Guide For High Speed MOSFET Gate Drive Circuits. ...
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449 views

Increasing gain of PMOS two-stage op-amp

I am trying to increase the gain of a two-stage PMOS op-amp I have designed below shown in this schematics: The gain currently hovers slightly below 71dB, but I have to increase it to above 75dB. I ...
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69 views

Filtering Voltage Spikes on Split Power Cable

I have a test set up that can more or less be broken down like below: simulate this circuit – Schematic created using CircuitLab The splitter shown is custom made for testing, here is a drawing:...
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378 views

current value of two serial transistors

How can i prove that the current value (Ids) of two serial transistors (nmos) with equivalent W/L values is equal to the current value of one transistor with W/2L (In linear region)? (Ids1 = Ids2 in ...
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292 views

P channel mosfet as a switch different setups for USB and battery switching

Recently I came across the below 2 examples of using a p-mosfet as a switch. Running a simulation leads to the following observations. Circuit 1 Reference 1 OUTPUT is 4.951 Circuit 2 Used this ...
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852 views

Switching High-voltages with p-channel MOSFET

I want to use a MOSFET to switch 400V to a circuit. I can switch low-side using an n-channel MOSFET, but it's more convenient to have the circuit with its ground fixed. So I want to switch high-side, ...
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44 views

Looking for the logical equation from this PMOS circuit

I am looking for the logical equation that describes the given circuit below. Unfortunately I don't have information whether \$U_b\$ is positive or negative - would that make a difference? I derived ...
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1answer
388 views

What is the best between a transistor and a pmos and which resistances

I need to create a switch to power on or off a moisture sensor. PIN 10 is HIGH or LOW to trigger either the transistor or the PMOS My sensor consume about 0.6mA Moisture sensor information My ...
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45 views

PMOS Falling Time

I have established a circuit which has a -7V,+7V 16kHz square wave and my aim is obtaining 0V,+1V 16kHz square wave output signal. To do this, i have used a TI SN75189ADR and DMP4051LK3-13 pmos as i ...
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715 views

Determination of region of operation for pmos

Given the value of Vgs, Vds and Id for a pmos, how to determine the mode of operation and its Vt
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3answers
553 views

Control inrush current

A basic question, how does the P-Mosfet reduce the inrush current. simulate this circuit – Schematic created using CircuitLab Old image link Can the P-Mosfet's drain and source orientation be ...
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226 views

PMOS Circuit Problem

The problem statement, all variables and given/known data Relevant equations •Id=K*(Vsg-Vth)2 •KVL The attempt at a solution On part A, Haven't had much experience with PMOS. Used large signal model, ...
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1k views

Cascode Current Mirror, Minimum output voltage

I can say that I understand simple current mirrors fairly well, but what i do not understant is the minimum output voltage requierd for the circuit to work properly...for the transistors to be in ...
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325 views

Why two N-channel MOSET instead of one P-channel?

Today I saw the schematic of a lenovo G480-la-7981p (download or download). On page 23 you can see this part: I mean this part/configuration: They've used two N-channel MOSETs instead of one P-...
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203 views

Is it possible for (W/L) of 0.18nm PMOS to become 989100?

Is it possible for (W/L) of 0.18nm PMOS to become 989100 ? If not,i wonder what the range is for (W/L) of TSMC 0.18nm PMOS and NMOS.Thanks a lot.
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667 views

Using Transistors as Logic Gates

I am curious if this could work. I have 3 inputs (A,B,C) and I know that Input A takes the longest to calculate. Is it possible to use single Transistors in place of normal AND Gates so that a signal ...
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1answer
569 views

Understanding Mosfet simulation and initial conditions in Spice

Here is a simple circuit with a P mosfet. I got a strange behavior when powering a circuit, so I isolated this part to understand it. Circuit is powered at t = 3s (I've used a pulse input voltage ...
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274 views

short circuit response P-MOSFET

i plan on doing a SC test on a power supply that the output is switched on with a p-mosfet i was just wondering if there is defined recovery time for the pmos to cool down before you can do another ...
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214 views

what is the ideal number of contacts to be placed in NMOS and PMOS when drawing layout in Cadence virtuoso

I am trying to draw a layout for inverter and i am not sure about how many contacts to be placed in the diffussion region of NMOS and PMOS and what is the reason behind selecting that particular ...
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97 views

Dual Power Management with MOS

I am working on a design with 2 12V power supply, one external and one from a battery. The current needed is about 7-8A. I could have use schottky or simple diode to protect one supply from another ...
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133 views

PMOS reverse polarized - 12v light

I've this circuit: simulate this circuit – Schematic created using CircuitLab I have a doubt, when I press the SW1 the LAMP1 turns on, when I press the SW2 the light turns on but the P channel ...
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3answers
495 views

High Side P Mosfet Circuit

I'm designing a circuit to use a P mosfet as a high side switch. The supply will be either 12v or 24v. The circuit is being designed for 8 amps max current draw. Does this circuit look exceptable? ...
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8k views

P-Channel MOSFET Inrush Current Limiting

I have been searching EESE and Google for several weeks now for a solution to this problem, and while I found some proposals that seemed promising, the real-world implementation fell short of ...
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1answer
232 views

Controlling NMOS gate switch with PMOS

The goal of the circuit below is to use a PMOS to turn an NMOS on and off which will blink the LED. A microcontroller is providing the square signal. Both MOSFETs are logic level and when I use them ...
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411 views

Current sensing with Rdson?

I'm fooling around with a PMOS, a Fairchild FDD6637, and pondering whether it would be possible to use Rdson as a sort of shunt-resistance for measuring the voltage drop, to get the amount of current ...
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640 views

What happens to a MOSFET if i apply voltage between Drain and Source leaving the Gate floating?

lately i was analyzing a simple circuit with 2 MOSFET, 1 Nmos and 1 Pmos, where the Nmos was acting as a switch and its drain was connected through a resistance to the Pmos' gate. The pmos had it's ...
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1k views

Switch Using PMOS transistor

People, I have very basic question on 'How to make a switch using a PMOS' transistor. Following are the specifications: Drain - Output Pin Source - 4.2V (From Lithium-ion Battery) Gate - 3.3V / OV (...
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1answer
2k views

slew rate of a mosfet

Is there way to calculate slew rate of following circuit? simulate this circuit – Schematic created using CircuitLab Datasheet for Transistor Datasheet for Diode I chose the PMOS and Diode ...
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254 views

P-MOSFET Gate Directly to Ground

I have this dual pmosfet that we were going to use one element of to implement a low-voltage cutoff for a battery input (battery comes in from the left), yanking on the base of the darlington to cut ...
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393 views

How to prevent high side PMOS from glitching?

I want to use a PMOS-Transistor as a high side switch like so: simulate this circuit – Schematic created using CircuitLab But when I tested this circuit on a breadboard, there was always a ...
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1answer
563 views

High frequency small signal model of PMOS vs NMOS

Here's the high frequency SS for NMOS https://ocw.mit.edu/courses/electrical-engineering-and-computer-science/6-012-microelectronic-devices-and-circuits-fall-2005/lecture-notes/lec11.pdf http://imgur....
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296 views

How does a “bulk connected to input voltage” mos work?

This is the circuit I am supposed to analyze, but I don't understand at transistor level, what does a MOS do when its gate is grounded and its bulk is the input terminal! I mean bulk is tied to Vdd or ...
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1answer
99 views

Logic function of cmos circuit with feedback

What is the best way to find the logic equation for f1 and f2 in the static CMOS circuit below. This circuit has partial pull up network made up of just one PMOS and full pull down network with NMOS ...
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1answer
72 views

Inside a multiplexer, can it work if i use a Pmos instaed of Nmos to reduce number of inverter?

To works well, inside a multiplexer we need the input signals inverted, but can we use a pmos instaed of a nmos with a inverted signal to delete the inverter? Is there any thouble? PSpice give me some ...
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228 views

changing the threshold voltage by controlling the oxide thickness in a p-mos [closed]

Can we change the threshold voltage by controlling the gate oxide thickness in a p-mos?
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928 views

Channel doping change to control the threshold voltage in an NMOS

By increasing the P-doping in an NMOS, threshold voltage is increased. How does it happen? And why? And what elements do they use for this? can anyone give me a reference or explain?
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774 views

Set the threshold voltage of CMOS inverter to VDD/2 for both rising and falling edge: possible?

Using 0.35u technology (VDD= 3.3v, Vt=0.7, Tox = 0.7 nm), I am trying to set the threshold voltage of an inverter to VDD/2. If I set the width ratio of PMOS/NMOS to 5 (means the Width of PMOS would ...
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499 views

PMOS soft turn on slower current ramp up to capacitive load

I'm trying to understand MOSFET soft switch and I know the more common off-the-shelf configuration is to put the capacitor between gate and Vo. However, I'm trying to understand why I can't do it in ...
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1answer
1k views

Driving Inductive Load with MOSFET: N-Channel vs. P-Channel

Problem I am driving an inductive load from a microcontroller using a MOSFET. I have a current sense resistor in series with the load. I don't have much experience with transistors (should have paid ...
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79 views

How do you choose the exact width for PMOS/NMOS in your design?

I'm designing the following function: $$F = ((A'+B) \times (A+B'))'$$ This is the schematic: Now I know that in general PMOS width has to be 2-3 times that of NMOS width. But how do you decide ...
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206 views

Effect of increased leakage of PMOS in reversed inverter configuration

I have built the standard CMOS inverter in reversed configuration by putting NMOS on pull up side and PMOS on pull down side. This will work like a buffer but the the upper and lower bound of the ...
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1answer
483 views

How are PMOS equations different than NMOS's?

I have been googling about it and I see lots of different ways such as only flipping the signs (< becomes >) and switching variables (VGS becomes VSG). Some people even say just put absolute value ...