Questions tagged [power-sequencing]

Power sequencing involves circuits with multiple power rails to analog or digital electronics. Upon powering a circuit the rails must be sequenced with time to reach their designed voltages to ensure proper device operation. This is most common with digital devices such as FPGA's or Processors with multiple voltage rails and high current loads. If the rails are sequenced wrong the device might power on in an undetermined state and may not function properly

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38 views

How to use the LM3880DBV circuit in a multi rail power supply?

I'm struggling a little bit here with the LM3880DBV circuit usage in a multi rail power supply circuit So, here is my power supply circuit block schematic: And this is how I sequenced my circuit: ...
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97 views

LTM8073 integrated DC-DC buck converter issues

I have a board with two LTM8073 "silent switcher µModule regulators" by Analog Devices/Linear Technology being used to provide two separate power supplies. This is a 10-layer dual-sided board that was ...
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45 views

The relay controller circuit in a pre-amp stopped working properly

I have a pre-amp with a controller circuit which controls input signal micro-relays and a power supply relay. While the input signal micro-relays work normally, all of a sudden the 30 second delay for ...
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57 views

Power-down sequencing with a “hard” power switch (stepper driver)

I'm designing a stepper motor controller and would like to have some advice on sequencing the shutdown process with a "hard" power switch. The Toshiba TB6560 driver that I'm using requires a specific ...
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52 views

Voltage sequencing on power up

I'm pretty new to PCB design, so my question may be obvious for some of you. I am wiring the layout of an LCD screen on a PCB using KiCad. When I came to powering up, the datasheet of the AT070TN92 ...
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95 views

LDO in split supply behaving incorrectly when power supply sequence is “wrong”

I'm powering an op-amp (OPA657) in transimpedance configuration. I externally supply ±15V, with LDOs to drop to ±5V; here I omit the feedback loop for simplicity: When I turn on the negative rail (-...
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154 views

The circuit-level “why” of the loudspeaker / amplifier “POPP” sound

in the other question about the "popp" sound I asked if the "popp" is harmful to a loudspeaker. Since I am also interested in the "why" on the circuit level, here is my next question. I put this ...
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112 views

Why do ICs need a specific power down sequence?

When powering down a board, for ICs that have multiple supply voltage rails, why do they need a specific power down sequence? Typically in complex motherboards, there is a CPLD doing the job of this ...
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79 views

Exceeded absolute maximum voltage of FPGA

I am using cyclone V FPGA. During my testing process, somehow I gave 12V to the IO bank instead of 3.3V. The board is shorted and I found FPGA has gone bad. Now to prevent such accidents in the ...
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78 views

Power sequencing with LDO without enable pin

What is the right way to provide a power sequence using LDO (or any other power source) without the enable pin? I'm using DAC7718 from Texas Instruments and it require a quit complex power sequencing:...
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Power up sequence for AD5724

The datasheet says: POWER-UP SEQUENCE Because the DAC output voltage is controlled by the voltage monitor and control block (see Figure 42), it is important to power the DVCC pin before ...
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164 views

Using Power Good pins for sequencing

I'm trying to figure out a way to use the Power Good outputs of several stages of voltage regulators to sequence and monitor a board powering several FPGAs. I've done this easily before with a ...
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171 views

Power sequence solution with limited board real estate

I am designing a power supply using the LTM4639 part. VIN (3.3. V) needs to be sequenced before the bias input (5 V) in order for soft start to work. However there is no fixed timing relationship ...
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75 views

Are RC circuits suitable for use as power sequencers?

Are RC circuits suitable for use as power sequencers with EN pins on LDOs? I know that there may be a problem with reverse sequence on power off, but some devices allow that on power down all power ...
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147 views

Power sequencing of simple peripheral ICs for ADC/GPIO with an MCU

Imagine I have the following scenario: Having a +5V rail powering an MCU and several other peripheral ICs, let's assume in this case a voltage reference (for example 4096mV). The output of this ...
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208 views

What's the reason for power down sequencing in an SOC can you damage it in some way?

Power on sequencing I understand. But why do power off sequencing? I could understand if you had to do something before power died, or maybe you just wanted to shutdown I/O before core so that no ...
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164 views

Would a reset IC be enough for this many power supplies?

Could you please let me know how many reset ICs I'd need for my board? I'm designing a camera using the IMX225LQR Image Sensor. This sensor requires 3 different input voltages: 1.2v, 1.8v and 3.3v ...
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233 views

Power supply sequencing for low power camera module

Could you please suggest a simple method how to make power on/off sequence of three different input voltages? I'm making a board camera using this image sensor. The sensor requires three different ...
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211 views

Can I ignore the Power up Sequence

I am designing a board where the datasheet suggests a power up sequence. Basically, the VDD_PLL should be turned on first, after 100us, the VAA should be turned on, followed by the internal supply and ...
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1answer
1k views

Power sequencing requirement for LCD

I am using LCD with below power interface. But as per below note in LCD datasheet, VCC and VGL need to apply first and then VGH. My query is why such power sequencing is needed ? If I use below ...
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377 views

Power supply for FPGA

I have a Spartan 6 FPGA (XC6SLX9-2TQG144) and I'm designing a power supply for it. Let's assume that I will utilize all of its logic (very possible) and I want to clock it as fast as possible (around ...
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96 views

Question about particular powerup seq

I have a particular powerup sequence from a datasheet that require this: At power-up, VDDIO needs to reach 0.6 V before VDDIN reaches 1.0 V. VDDIO voltage needs to be equal to or below (VDDIN ...
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115 views

Power sequencing in FPGAs and MCUs

I have a question about power sequencing requested by FPGA/MCU datasheets. I always see in datasheets that a particular power supply input must reach a voltage level before another power supply input (...
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196 views

What is the name of a circuit that delays powering of another circuit?

I'm having trouble figuring out the name of this circuit. It needs to delay turning "on" a 12V circuit and a 120VAC circuit, after a 5V circuit has been turned on. Example: Turn on 1x power switch, ...
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127 views

Power up sequence circuitry

I need to power up an IC and I have two or three power supplies. The datasheet says: Vdd1 and Vdd2 are turned on at the same time; make sure Vdd1 becomes stable before Vdd2. My power supplies have ...
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Any good method for the power down sequence?

In my circuit, +12V would be supplied by an external power source. After two regulators, two more voltage sources (+5V and +3.3V) would be produced and supply power to the AD7682 ADC. Because of the ...
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116 views

Would having no power supply but a large input signal damage the amplifier?

I am now learning about the power sequence of the circuit. And wonder that as every amplifier has its own limited input voltage (for example: ADA4004's input limit is V− < VIN < V+), would the ...
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895 views

Power up sequence

I am designing hardware where a specific power up sequence is needed. The Vdd_33 should come 10 µs after vdd_18. I have LDOs for these supplies. One option is to control the power distribution with ...