Questions tagged [processor]
The processor tag has no usage guidance.
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Finding speedup in instruction pipeline with branch prediction
I was solving below exercise problem from book Computer Architecture and Design by Patterson at al. This could be more mathematical / logical doubt than electronics related doubt.
Breakdown of ...
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1answer
36 views
Understanding branch delay slot and branch prediction prefetch in instruction pipelining
Let me define:
Branch delay slot: Typically assemblers reorder instructions to move some instructions immediately after branch instruction, such that the moved instruction will always be executed, ...
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0answers
28 views
Finding speedup when branch prediction is done in instruction decode phase of processor pipeline instead of execute stage
I was solving problems from the exercise of the book "Computer Organization and Design" by Patterson. The problem reads like this:
Assume instructions:
...
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0answers
17 views
Finding percentage memory utilization in pipelining architecture
I was solving problems from the exercise of the book "Computer Organization and Design" by Patterson. The problem reads like this:
Consider stage latencies:
...
0
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1answer
120 views
Why cant we increase chip area?
According to Moore's law, transistors are getting double every 24 months. But now, we have reached the transistor size limit which results in leakage current. Then why can't we increase chip area size,...
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0answers
290 views
How many stall cycles resulted by incorrectly predicted branch in instruction pipelining
I have been solving following exercise problem from book Computer Organization by Patterson and Hennessy:
The importance of having a good branch predictor depends on how often conditional branches ...
0
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2answers
40 views
Have separate instructions for each register or pass register as argument?
I am trying to design a (very) simple processor architecture. I am in the process of creating a basic instruction set for it, however I am not sure of the best ("best" meaning what most people use - ...
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1answer
57 views
Analog Blackfin Processor Silicon Revision issue [closed]
Recently we got a large batch of ADSP-BF5346s that say they are Silicon Rev 3 but internally read as Rev 2. Is there a way for me to determine the Silicon Revision number on the rest of the shipment ...
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1answer
407 views
Verilog) Multi-source in Unit <> on signal <>; this signal is connected to multiple drivers
Hi I'm trying to design a multiprocessor in Verilog.
...
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0answers
49 views
Atmel Image Sensor interface
I'm working on Microchip SAMA5D27SOM Evaluation kit platform. I'm trying to interface TVP5150AM1 Video decoder to image sensor controller(Atmel-ISC) interface of the processor. I have configured the ...
4
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1answer
155 views
Inside a CPU, what happens in a single clock cycle?
In grossly simplified terms, a processor calculates 1 instruction in a single clock cycle. But what does that even mean? If a processor is a bunch of transistors, is 1 clock cycle simply 1 state ...
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5answers
3k views
In a CPU, does the speed of a calculation affect the heat generated?
Take as an example a CPU that is capable of changing its clock speed, like a modern computer CPU (Intel, AMD, whatever). When it does a certain calculation at a particular clock speed, does it ...
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2answers
227 views
Computer architecture why is MemRead used?
Why is a control signal MemRead needed for the Data Memory element if whenever the output Read Data is not desired it will be multiplexed out via MemtoReg?
Wouldn't having MemRead always enabled ...
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1answer
111 views
What is the best way to implement spi using 8085? [closed]
I have to make a compass using 8085. I have to take serial data from magnetometer of mpu9250. Should i prefer bit banging to implement spi or make parallel out and parallel in hardware using shift ...
3
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1answer
114 views
Finding specifications for digital signal processors (DSPs) for given audio application [closed]
I'm finding difficulties choosing an adequate processor solution for my application from my null experience with DSP:
8ch 24-bit @11025Hz I2S TDM Input
Beamforming + ASNR
MSS Multi-source selection
...
0
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1answer
45 views
Lpc 43s50FET256 processor and its connections
ı want to buy a nxp LPC43S50FET256 processor and ı made some research but I dont know whether lpc43s50 has already got bridge connections, ı also dont know for example whether ethernet is already ...
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1answer
84 views
Finding percentage accuracy of instruction pipeline branch predictor
I need help in understanding the solution from solution manual. The question is from the exercise 4.24.4 and 4.24.5 of chapter 4 in the book Computer Organization and Design by Patterson and Hannessey ...
1
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1answer
183 views
Understanding execution of sequence of pipeline instructions
I need help in understanding the solution from solution manual. The question is from the exercise 4.22.2 of chapter 4 in the book Computer Organization and Design by Patterson and Hannessey (4th ...
0
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1answer
104 views
Understanding instruction branching
I need help in understanding the solution from solution manual. The question is from the exercise 4.22.1 of chapter 4 in the book Computer Organization and Design by Patterson and Hannessey (4th ...
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2answers
90 views
Methods to detect errors in cache
Are there methods apart from ECC, to detect and possibly correct cache errors?
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0answers
179 views
Understanding instruction pipelining speedup calculation
I was solving the exercise problem 4.17.6 of chapter 4 in the book Computer Organization and Design by Patterson and Hannessey (4th edition):
Percentage occurrences of the instructions are as ...
0
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1answer
159 views
Understanding processor instruction pipeline problem solution
I need help in understanding the solution from solution manual.
The question is from the exercise 4.13.5 of chapter 4 in the book Computer Organization and Design by Patterson and Hannessey (4th ...
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1answer
68 views
USB RF Videotransmission, is it possible? [closed]
I am thinking about building my next rc plane complete from scratch. I wanted to do the programming by myself, so I have the problem, that I can't use any 5.8Ghz video transmitter because I can't ...
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4answers
1k views
How does VCO in PLL in computer processor work?
In todays personal computers and notebooks, what is usually used as a Voltage-Controlled Oscillator for generating clock signal for processor?
Is that a crystal rather than RC circuit?
Is it tuned by ...
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4answers
212 views
How calculator's processor works in a base manner? [closed]
For example, when we click the "3" number button or "+" button, what it sends to processor ? I want an answer something like = " It come first MAR, then goes to Memory, then comes ALU " in this manner ...
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2answers
1k views
Do multi-core processors reduce power consumption?
I have been reading some tutorials about power consumption on parallelized system. I have been following this tutorial.
Tim Mattson (Intel): Introduction to OpenMP: 02 part 1 Module 1, YouTube
At ...
1
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2answers
159 views
Multi-core processor and Real Time [closed]
Is it a good idea to design a real time system on a multicore processor? Task's execution time isn't determinist in these kind of processor because of core management. This makes scheduler's ...
0
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2answers
310 views
Where can I find the definition of SMI, SCI pins on a CPU?
I am trying to understand the SMI (System Management Interrupt) and SCI (System Control Interrupt) in IA32 architecture.
According to this thread, it seems a CPU should have dedicated pins for SMI ...
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2answers
1k views
Are there 8 bit ARM processors?
Is there anything below 32-bits for an ARM processor? I was wondering if there is or ever was an 8-bit ARM processor. I've searched but not seen any and so it seems that ARM processors are either 32 ...
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2answers
1k views
Arm mode and Thumb mode makes the PC's bit 0
The ARM and Thumb modes are word-aligned and halfword-aligned. I understand this means that if it's in ARM mode, the start of addresses must be divisible by 32, and if it's in Thumb mode it has to be ...
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1answer
186 views
Why is register file latency, during write-back stage, not included in computing for minimum clock cycle time
I was looking at the solution for a homework posted here:
https://cseweb.ucsd.edu/classes/sp13/cse141-a/solutions/assignment4_solutions.pdf
and noticed that for 1.1, it didn't include the Register ...
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1answer
2k views
Micro processor logic gates
Where to get a logic level diagram for a processor , preferably intel 4004.
i have block diagrams but want it to know more at logic level then transistor level.
1
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1answer
288 views
Using a high frequency LPDDR3 RAM with a lower RAM frequency supported Processor
I'm designing a board with Allwinner A64 processor and i'm confused in choosing the proper RAM. the SDRAM controller characteristics of the processor is listed as follows:
Compatible with JEDEC ...
0
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2answers
122 views
Is it 'ok' to use a switched power supply to power a processor core?
I'm currently working on a project which features an Analog Devices Blackfin DSP Digikey link. This DSP requires 1.3V to power the core. I plan on having my project be battery powered, thus I'm ...
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1answer
755 views
What is the exact type of oil used in immersion cooling of electronic devices such as processors?
I am looking for cooling solutions for a data center with low PUE. I can see that there is an immersion cooling option which uses a very specific oil based liquid that is non conductive but can ...
1
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1answer
252 views
Multiple Cores vs Single Core Power Efficiency Equations
I was searching for OpenMP tutorials and I came up a video that showed some simple equations that promotes multiple core hierarchies against single core ones.
The equations used are
Capacitance = ...
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1answer
85 views
How much embedded program memory in this NXP (aka freescale) KL03 processor?
Is there a way to find out how much programming memory is in an NXP (aka freescale) KL03 ARM processor? The markings on the chip say "P03T5V" and "PSABA".
There is this NXP package number lookup web ...
2
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1answer
238 views
Need a device to calculate the FFT more than 100 times per second (my scope is maxed out at 10hz)
I'm writing some Python code which retrieves the FFT data that is generated in my Rigol DS1102E oscilloscope via its USB connection.
My trouble is that no matter what time scale I set, I get no more ...
0
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1answer
273 views
Use 3-8 MUX instead of Case statement [closed]
I've been thinking about implementing a very simple ALU, and came across this link Verilog 8 Bit ALU. This seems to be a very naive and abstract but intuitive implementation. I'm thinking about ...
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4answers
686 views
How does a computer deal with subtraction of 2 values that are in two's complement?
I'm confused how the computer calculates if there are two values A and B, both are in two's complement. Now we want do the ...
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2answers
87 views
Trying to understand this table - comparator with carry
Create a circuit-table which compares two (signless) 4-bit binary numbers. The result is output signal c_i which is 1 if we have A≥B.
Given is A=0100 and B=0010. Fill the table whereby you choose c_-...
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1answer
145 views
How do you fill this circuit-table correctly (digital comparator)?
The following task is from an old exam and because the new exam will be similar to this one, I'm trying to understand it. Unfortunately there are no solutions or hints given and I got nothing to ...
0
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1answer
40 views
Writing all zeros in latch
I am trying to implement a instruction pipeline but getting one issue. Please help me :
How can we write all zeros in a latch using hardware?
I am not that much into Electrical Engineering so please ...
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2answers
224 views
Microcontroller and processor same thing or not? [duplicate]
Is it correct to refer to a microcontroller as processor?
I know microcontroller is different than microprocessor. But is it the same as processor?
The whole point of this question is to verify if ...
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1answer
61 views
Effective Capacitance of an FPGA board
I am currently designing a processor on an Altera DE0 Nano and found out that the power consumption of my design may be computed by this equation:
P = C * V^2 * (a * f)
where P is the power ...
0
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1answer
171 views
Could an FPGA be connected via DMI to a processor, if so how would this be done? [closed]
Can an FPGA be connected to a processor via Direct Media Interface (DMI), without a dedicated Platform Controller Hub (PCH)? The FPGA would serve as the south bridge/ PCH. Along the lines of ...
23
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4answers
5k views
Why do CPU's typically connect to only one bus?
I found a motherboard architecture here:
This looks to be the typical layout of motherboards. EDIT: Well, apparently it's not so typical anymore.
Why does the CPU connect to only 1 bus? That front-...
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4answers
320 views
Embedded processors gate length
New Intel and AMD processor feature processors with 14-22nm gate lengths, and this information is widely available. However, when it comes to microprocessors (PIC, ATMEGA) I have not been able to find ...
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2answers
6k views
Does it help to replace the battery if phone is slow? [closed]
Some people I know say that replacing the battery helped their smart phone improve its decreased speed resulting of two years of use.
My initial guess is that this would not have any influence ...
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1answer
582 views
What is maximum supported RAM for Snapdragon 410?
Qualcomm Snapdragon 410 datasheet says:
Memory
+ LPDDR2/LPDDR3@533MHz
+ eMMC 4.5
+ SD 3.0 (UHS-I)
It does not talk about maximum amount of RAM supported. What is the maximum amoount of ...
