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Tagged with programmable-logic verilog
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Verilog Code Optimisation
I have recently become involved in FPGA design and I am just testing out some new Zync SoC hardware. I have followed a tutorial online to blink some LED's however I have modified it to blink all the ...
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problem with CPLD and 24C16 EEPROM interface
Can any one say if it is possible to implement this code in ATMEL 24C16 EEPROM device for write the data. While I am implementing this with CPLD xc9572 I/O Pin declared as sda, scl there won't have ...