Questions tagged [programmable-logic]

Programmable digital logic devices include FPGAs, CPLDs, and older devices such as GALs and PALs. Programmable logic enables flexibly implementing complex digital functions in a single chip, from a few gates of glue logic to entire microprocessors or complex signal processing systems.

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25
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7answers
17k views

Are there any Analog FPGAs?

As I understand it FPGAs are flexible "digital" circuits, that let you design and build and rebuild a digital circuit. It might sound naive or silly but I was wondering if there are FPGAs or other "...
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5answers
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What would make me choose Verilog or VHDL over schematic design on CPLDs or FPGAs?

I have absolutely no background in programmable logic, I use mostly microcontrollers in my projects but recently I needed to work with video and the microcontroller is just too slow for what I needed ...
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6answers
3k views

Discrete logic design

I have been tasked with building a simple alarm device. It just needs to measure a few inputs and the outputs will respond accordingly (to put it very simply!). To me, it seemed that using a few ...
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4answers
1k views

Is there an inexpensive way to get started with GAL (Generic Array Logic) chips?

GAL chips seem expensive to get started with, since programmers cost hundreds of dollars and even ISP cables aren't cheap. Is there a cheaper way?
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2answers
6k views

What's the difference between CPLD and an FPGA? [closed]

What's the difference between a CPLD and an FPGA?
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4answers
3k views

What are programmable logic ICs of different complexity used for?

Programmable logic can be implemented in your widget in many different spectrums, from burning a few gates or using a MUX to the latest FPGA with built-in microcontroller and IO peripherals, not to ...
10
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3answers
5k views

What happens when an FPGA is powered on and left unconfigured?

I am trying to get a general understanding on what happens if you leave an FPGA unprogrammed for a long duration of time. Suppose you have an FPGA and you leave it unprogrammed for a long period of ...
10
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2answers
4k views

What are my less expensive options for getting started with CPLDs [closed]

I would like to goof around with some CPLD stuff and I see I have a couple options out there. I don't have a particular application in mind; it just seems like there a lot of possibilities, some of ...
9
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1answer
3k views

Should I use a resistor between an input pin of MCU/CPLD and VCC/GND?

Some times, I want my MCU or CPLD to input a static logic. So, I choose to tie it to VCC or GND. The problem is that should I put a resistor in series to limit the current? I just think by myself for ...
9
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2answers
590 views

MITM on I2C Bus

I've been trying to design a module that will allow me to modify selected slave responses on an I2C bus. Here is the original bus configuration (the pull-ups and power connections are not shown for ...
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2answers
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Why does this Verilog hog down 30 macrocells and hundreds of product terms?

I have a project that's consuming 34 of a Xilinx Coolrunner II's macrocells. I noticed I had an error and tracked it down to this: ...
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5answers
6k views

Counter for 20 GHz clock

I am designing time critical application where I need time resolution in order of 100 picoseconds. I am considering to make an ring oscillator of 20 GHz and clock from ring oscillator. Is there IC'...
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4answers
45k views

What is the difference between PLA and ROM?

I'm finding it hard to understand. What is the difference between PLA and ROM? Can somebody please provide a link or explanation?
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3answers
3k views

When is a FPGA preferred instead of a CPLD, and vice versa?

I am starting out with programmable logic, and I am mostly using schematic entry. (Hey, I like to see the schematic instead of VHDL/VERILOG :P) I have been using a Xilinx CPLD originally that had 128 ...
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2answers
306 views

Export restrictions on programming equipment

I have a friend that works for an overseas manufacturer. He sells programming equipment to companies that have products with multiple Programmable Controllers embedded. I raised the subject of "export ...
6
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1answer
541 views

Can a CPLD be reprogrammed just like a Microcontroller?

Given that microcontrollers can be reprogrammed multiple times, does this apply to CPLDs as well? In particular, I am interested in Xilinx's CoolRunner-II. Until now, I was positive about the re-...
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3answers
2k views

Getting Started with Altera CPLDs

I'm looking for recommendations regarding development kits for Altera CPLD prototyping but I'm afraid I'm not sure what to look for. The budget isn't too much - around $200. While I'm leaning towards ...
6
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2answers
924 views

Trouble with VGA Controller on CPLD

What I am attempting to do is create a VGA controller from a Lattice MachXO CPLD in Verilog. The Problem I am attempting to display the color red with a resolution of 640x480 @ 60Hz using a 25.175 ...
6
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1answer
9k views

What is the difference between a GAL and a PAL?

I was reading this article (unfortunately a lengthy Dutch discussion) talking about a GAL. I have come across the GAL device before, but never really understood what a Generic Array Logic is. I know ...
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9answers
1k views

Any programmable devices available for more modern languages?

Pardon my naïveté, but it seems like most programmable devices (FPGAs, PLCs, PICs, etc.) are programmable using the C or C++ languages, or a variant of one of these. Are there any devices out there ...
5
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3answers
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Can I use C language to program a CPLD/FPGA?

I wanted to know if I can program CPLDs /FPGAs using C language? If so, is it commonly practiced? What are the steps and the required & tools for the same?
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3answers
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How can I increase the number of hardware UARTs in a design with a single UART MCU?

I am using a TI CC430 MCU because it contains an embedded CC1101 radio frontend. I would really like to stick with this MCU. However, I need to simultaneously interact with a separate serial radio, a ...
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2answers
437 views

Please explain this price difference

When I paid a visit to my component supplier I spotted a few GAL22V10 available there. Asked the price - CNY24 (about US$4) a pop, NOS. Then I asked about ...
5
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3answers
2k views

How do you cast an integer as a time in VHDL?

For the purposes of simplifying a test bench, I would like to set various delays by changing numerical values at the top of the file. I'd like to do something like: ...
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1answer
4k views

Free linting tool for Verilog

Is there an opensource linting tool for Verilog. I've seen HDL companion and other but they all come with a price tag.
5
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2answers
227 views

How does programming FPGAs and CPLDs differ? [closed]

I am learning to program programmable devices using a XC9572XL CPLD. I would like to know how much knowledge from programming CPLDs (in Verilog, VHDL) will be transferable to programming FPGAs (not ...
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3answers
852 views

CPLD is (sometimes) not incrementing counter

I have this simple program running on the Altera EPM240 that’s sometimes not doing the counter increment. ...
4
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4answers
4k views

Wrong outputs in VHDL entity

I have lessons about VHDL in one of my university class and I have to write simple entity which will generate clock from 1MHz source. I'm using CoolRunner-II CPLD ...
4
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4answers
456 views

uC platforms to consider for faster CPU and 30+ GPIO pins

I am building a Persistence of Vision project with 120 RGB leds (=360 total lines to be controlled). We have settled on the TLC5940 for driving the LEDs (and could be open to changing this), however, ...
4
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3answers
1k views

FPGAs or CPLDs for “Glue Logic” and Video/LCD Capabilities

Some of you may remember I posted a question in which it was suggested that I use CPLDs instead of a large number of multiplexers. Here is the question, for reference. However, as I read and learn ...
4
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1answer
305 views

Verilog - A line stays high, I need it to go low after a while

I'm working on a circuit in Verilog to be implemented on a CPLD. The output of the circuit will drive a stepper motor. The input is a stream of pulses from a machine. I generate a stepper pulse ...
4
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2answers
159 views

Are there FPGA chips that permit to update the programmable logic from the logic itself?

For the research purpose I am interested are there FPGA chips that are capable to update the bytestream (the programmable logic) from the bytestream itself?
4
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1answer
898 views

CAN controller in a CPLD

As I cannot manage to find it done on internet, I wonder if it is possible to program a CAN controller in a CPLD ? It's look like it is going to require a least an FPGA.
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3answers
3k views

Is this a good use of a CPLD?

I am trying to generate some waveforms which are phase shifted from an input signal. The input signal is around 4.4 MHz and is a square wave at 50% duty. I need a 0 degree and 90 degree phase shift ...
4
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1answer
417 views

Custom-CPU builder/simulator

I googled deeply but couldn't find any cpu constructor simulator. I'm specifically hoping to learn about the operation of the northbridge, but When I googled "bridge simulator" or "bridge (the ...
4
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1answer
1k views

Is this the correct way putting multiple chips into one JTAG chain?

I am thinking about a hobby project that have a microcontroller and a CPLD connected together. Is this the correct way doing it? simulate this circuit – Schematic created using CircuitLab ...
4
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1answer
2k views

What was the protocol for programming GAL devices?

What actually has to happen, at a pins and signals level, to program a GAL device? Let's say I have a GAL 22V10, and a .JED file with the desired fuse pattern. The usual way to proceed is to drop the ...
4
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1answer
181 views

Is it standard for a VSD to pull its power from the controlling PLC? Is this the better solution?

We have an industrial floor that is opened and closed by a variable speed drive motor. This is controlled by a PLC device. Recently we had to do maintenance on the VSD. The serviceman incorrectly ...
3
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4answers
749 views

True 5V CPLD other than PIC/Altera ATF150*?

Are there any True 5V CPLD's families still in manufacturing other than PIC/Atmel ATF150*? I am talking not just "5V tolerant IO", but rather ones with 5V VCCIO, able to drive 5V loads without ...
3
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2answers
1k views

Arduino to CPLD to toggle an LEDs using I2C

I have a a CPLD (Lattice MachXO2) that echos a signal from an Arduino to turn on an LED. Arduino: ...
3
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2answers
1k views

How many transistors/logic gates are used in the signal path between a TV studio and the restitution of the image on my HD-TV?

How many transistors/logic gates are used in the signal path between a TV studio and the restitution of the image on my HD-TV ? You see what I mean ? I need a rough estimation...:-) I especially ...
3
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3answers
252 views

What is the modern way to do small scale programmable logic?

I am designing a circuit for an electronic coil winder. It has a few binary counters, equality detectors, 7 segment decoders and flip flops. How it is possible to get all of this logic onto 1 ...
3
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3answers
768 views

Bus Contention - Output Pin driving another Output Pin

I've run into an unusual problem. I'll start off by describing my goal: I'm designing a circuit that can test for short circuits and open circuits in a wiring harness. The wiring harness does not have ...
3
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2answers
1k views

Dividing numbers on an FPGA

I wrote a program for a Cyclone II FPGA that divides 2 64 bit numbers and returns if the remainder is 0 using the modulus (%) operation. When I compiled the program with 64 bit numbers for the ...
3
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2answers
764 views

what to do with JTAG pins when idle?

So I have this design here where I talk via JTAG from a microprocessor to a CPLD. The JTAG protocol is done via bit-banging of four GPIO pins. This connection is just very infrequently. It's just ...
3
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1answer
2k views

Strange bug when Interfacing with Shift Register (CPLD) via SPI

I've implemented a 8-bit Parallel in Serial Out (PISO) Shift register in VHDL on my Max V CPLD. I'm using SPI to interface with the CPLD using my AVR. The circuit works but only partially. Suppose I ...
3
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4answers
851 views

Can an EPROM be “refreshed” without UV erasing?

I have lots of AM27C512 65k x 8b EPROMS (with the UV window) which are quite old (1980's.) Using a Xeltek SuperPro 3000U, most can still be read and verified. A few have failed outright and were ...
3
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2answers
333 views

Creating a Programmable ROM Logic / Schematic

I would like to know if it is possible to create a programmable ROM from transistors and logic gates? Or, is it possible to create a type of persistent storage similar to Flip Flops?
3
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4answers
3k views

What software I can use for CPLD programming?

I would like to learn more about CPLD circuits (because they are cheaper than FPGA), but I am facing a major problem. I cannot find any simple and userfriendly software for programing and debugging ...
3
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3answers
2k views

Why does CPLD has four clock sources?

Altera CPLD EPM570 series have four global clocks(GCLK0-GCLK3),I want to assign two clock sources to CPLD: one from oscillator and one from a MCU. From "GLOBAL SIGNAL" part of "MAX II Architecture"MAX ...