Questions tagged [qspi]

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Can I implement QSPI (quad SPI) communication using an MCU that only supports ordinary SPI

This question is most probably about pin-configurations registers. I mean since QSPI is the same as SPI with more data bus-width (correct me if I'm wrong on this first assumption), then doesn't it ...
Bikay's user avatar
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Considerations in board layout for different interface speeds

Currently, I'm working on a design that includes four data buses operating at different datarates. The signals connect various parts of the system to the central FPGA. I have experience in designing ...
ElectronicsStudent's user avatar
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So, I am trying to access an APS6404 IC (PSRAM) with QSPI on STM32H7 (currently in single-line mode). When I am writing to it, everything seems fine, but as soon as I read - the FIFO is empty and the ...
sx107's user avatar
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QSPI/QuadSPI: alternate bytes purpose?

I'm getting familiar with QSPI on my STM32F746-Discovery (not really relevant for the question, just some context). While reading reference manual, it lays out in details how the peripheral functions (...
Ilya's user avatar
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Boot Raspberry Pi Pico from XIP QSPI Flash

I am trying to boot a Pico from an external NOR flash module (Diligent Pmod SF3), but I can't find any information on how to configure the bootloader to do it. I looked at the documentation, but I'm ...
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Why does the "write enable" in QSPI with Macronix MX25L51245G always return WEL = 0?

I come to you to ask for help with Macronix MX25L51245G interfaced with STM32L476RG. My QSPI is set to 32MHz. Here what I do: QSPI Reset (0x66 - 0x99) SPI Reset (0x66 - 0x99) Wait for WIP = 0 (SPI) ...
axoul's user avatar
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Testing QSPI Setup time and Hold time

I am having a QSPI Interface (operated in SDR mode) from this QSPI chip to MCU chip. QSPI lines : QSPI CLK QSPI CS QSPI_IO0 QSPI_IO1 QSPI_IO2 QSPI_1O3 VSS VDD I am trying to validate the QSPI Setup ...
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What QSPI chip is on ItsyBitsy M4 Express?

I'm trying to find out the name of the QSPI chip that is used on ItsyBitsy M4 Express boards. On the image below is very faded:
Andy Andy's user avatar
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QSPI for shared XiP and file system

Is it possible for a single-die QSPI NOR flash module be simultaneously used for both XiP and a file system? By simultaneous I mean that a function running from XiP accesses data elsewhere on XiP. ...
Potion's user avatar
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2 votes
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Quad-SPI (QSPI) net length mismatch

I am trying to make a good layout for the LAN9252 mac and STM32F7 controller, running at 80 MHz and I had to route data tracks with different lengths. The question is should I use nets lengths ...
kvazibog's user avatar
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How to increase QSPI flash clock frequncy in Zynq ZC702

I am working on Zynq ZC702 board. The board has a QSPI flash. I want to increase the clock frequency of QSPI, so that I can read/write at a much faster rate. The closest I found is this : EDK-14....
gpuguy's user avatar
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