Questions tagged [rise-time]

Anything related to the rise time of a signal. The rise time is a parameter used to characterize abrupt transitions in a signal waveform. It is usually defined as the time needed by the signal to go from the 10% to the 90% of the level it attains at the end of the transition.

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Long rise time on UART RX line

I'm attempting to replace a controller unit (based on an STM32F1) with my own design (based on ESP32), but I'm stuck at the UART RX (seen from the controller side). The rise time of the signal is too ...
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Slew Rate/Rise time conversion

I just wanted to confirm that my oscillator will drive my circuit correctly. I am focused on rise time vs slew rate in this calculation. The receiver which runs off 1.8V has a slew rate of 1V/ns which ...
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Unexpected voltage spikes at output of PFET on falling edge

I have the circuit shown below: I want this circuit to switch between 2.5V and 3.6V at the drain of the PFET when I input a square wave into the gate of the PFET. I would expect that this circuit ...
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LVDS rise/fall time measurements - confused

In a document I found they mention that the rise/fall times are measured over 20-80% of the signal. They mention that the common mode is 1.2V with a output voltage swing of 350mV. This all makes sense,...
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Root Sum Square

Can anyone in a simple way explain why this formula works. It is the Root Sum of Squares where you square your values then add together then take the square root. It seems to be used quite a lot in ...
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Limiting PWM rise and fall time

We're generating a PWM signal at about 2000 Hz whose rise and fall times we need to limit to about 40 us, so it can pass through ordinary audio stages without distortion / ringing. The PWM signal is 0-...
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Rise time vs Slew Rate

I am using this device which is a LS1046. It list slew rate as 1V/ns to 4V/ns. It is measured over a region of .35XOVDD to .65XOVDD where OVDD is 1.8V So over the range of .63V to 1.17V which is .54V ...
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What determines the rise time of a digital signal?

What are the factors that determine or affect the rise time of a digital signal?
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Using a pull-up resistor and considering rise time for IC input

I have a FPGA based design in which the FPGA is interfaced with several ICs. The I/Os of the FPGA and most of the ICs are 3.3V, except from one where the I/Os are 1.8V. While there is no problem for ...
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Alternative to optocoupler in circuit design

I have designed a circuit that drives a +/- 20 to 30 peak to peak external signal received as an input to 16 different outputs. Another requirement is that I have to be able to switch the state of ...
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1 answer
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Problem with the fall time of op-amp

I am designing a "simple" current source using an op-amplifier. My question is why is my fall time looking like that: What do I need to reduce the fall time? Here is the schematic:
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What rise time should pulse have to have desired pulse width [closed]

I have a question regarding my high speed laser driver. I want to have 10ns width pulse. What rise/fall time I would need to have that I can say I still have 10ns pulse. Is there any percentage that ...
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Minimizing pulled open collector output rise time on 74LS09

I have a circuit that calls for one open collector buffer for driving a shared line (/WAIT via Zilog Z80) and one typical AND gate. I've consolidated these into a single 74LS09 open collector quad 2-...
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Understanding photodiode modes and practical effect on noise vs response time tradeoffs for audio applications

I am an experimental musician with admittedly very little electronics experience (but I do have a mathematics degree) trying to find a decent photodiode for a project where I send audio signals via ...
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Very short rise and fall time with relay

My question is related to the question here. I need very fast rise and fall time (below 2ns) and pulse width of 50ns. Load is 50ohm and voltage is 250V. I have achieved the rise time with a mercury ...
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Clock line of SDIO bus has worse rise/fall time than rest of bus

I have an ATWILC3000 wifi module connected to a Raspberry Pi Compute Module 3+ over 4-bit SDIO. It's throwing a lot of bus errors at higher frequencies (currently running at 1 MHz for stability when ...
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Fast rise time reed relay

I am currently working on a project related that I asked before here. The purpose is to have 2ns rise time 30ns pulse width at 250V (with 50ohm load). Repetition is 30hz. I tried avalanche transistor ...
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Fast switch rise time techniques

This question is continuation of this question: High Frequency Square Wave Generator I am trying to drive a 400V supply and 50ohm load with an RF MOSFET which has a rise time of 3-4 ns and fall time ...
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How to calculate the rise time?

The figure shows a modification, from state A to state B, carried out on the cell at the output of circuit (X). In both cases, the voltage at point A is the same. The transistors M1 and M2 keep the ...
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Can I calculate minimum rise time of a transmission line if I know the length and the loss tangent?

Overview: I am trying to work out if it's possible to transmit my 1.2Gbps MIPI data down a 600mm long flexible PCB strip. Assuming I have the impedance correct, will the signal still be degraded by ...
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Timing specifications in a communication protocol

I am having this I2C EEPROM Chip from Onsemi - CAT24C In table 6, AC Characteristics of the datasheet, only the Minimum time is provided for the SCL clock low and high period. My questions : Not ...
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RC Time Constant simulator

I am trying to write a simple simulation of a Resistor / Capacitor network. I need to calculate the voltage across the capacitor as the input moves up and down. The problem is that there is two ...
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CMOS inverter in series

I have the circuit below. Now my question is: why the rise time and fall time measured on Vout are the same as in a circuit using only one inverter gate? I know the propagation delay is the sum of ...
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220 views

Relationship between harmonic's amplitude and square wave's Tr and Pw

I started reading this TI guide on high speed layout guidelines and had some question on the theory of clock signals (pages 2 and 3). From the image below it's clear that the amplitude of the first ...
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Pullup Rise Time On AVR External Interrupt

Background I am designing a simple lamp dimmer using the Atmel ATTiny441 microcontroller. To this end, I have designed a very basic zero-cross detector which feeds the external interrupt pin (INT0) ...
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Op-Amp Unity Gain Frequency

I'm tasked with finding the unity gain frequency of an op-amp using the datasheet specs provided to me (just a homework exercise, not a real op-amp). There is no direct spec given for "Unity Gain ...
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What does fall and rise of clock mean?

Im new to electronics. In fact, I'm a computer scientist looking into embedded systems. I am going through Vol. 1 of Jonathan Valvano's book on embedded systems and got stuck when i read on Gated D ...
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Finding Rise time and Fall time with Slew Rate Specification

I am using this QSPI Flash Memory IC I'm operating the QSPI clock at 48MHz. I am probing the Clock and Data signals in my scope. On Table 54 which is on Page 128, we have Rise time and fall time ...
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8 votes
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How do I calculate rise times for a push pull GPIO with load with hand calculations?

simulate this circuit – Schematic created using CircuitLab This is a simplified example of a push pull GPIO found in most microprocessors, with a load attached. Using the capacitance and ...
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3 votes
1 answer
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How to correctly set logical high level on a PS/2 port?

I'm trying to make a keyboard emulator on ATmega16A. I'm currently implementing logical low as output-zero, and, since the host(?) is supposed to pull up the line, I send logical high state as input ...
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FRR Measurement

When I try to measure the FRR (time delay in the rising edge of two pulses) between two channels of a GES-2074A GW-Instek digital oscilloscope, it varies depending on the time resolution. First, I ...
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How does risetime affect transmissionline effects?

How do rise and fall times affect reflection in a transmission line? Reflection will occur with shorter lengths as rise times becomes shorter, does this mean risetime effects the wavelength of a ...
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Rise time for 2 MHz SPI clock signal driven by an Arduino Micro

Could someone tell me what a typical rise time would be for a 2 MHz SPI clock signal driven by an Arduino Micro (ATmega32U4), off the SCK pin? An actual measurement would be preferable, but I do not ...
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Is there a difference between rise and fall time and modulation frequency

I was wondering if there was a difference between modulation frequency and rise and fall times of a laser diode or LED? If a laser had a modulation frequency of 100MHz would that be the same as a rise ...
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TLC5926IPWPR Clock width

I'm using the TLC5926IPWPR in a design. It uses an SPI interface. The TLC5926IPWPR chip is on a separate PCB than the MCU that is controlling it. The Clock and SDO pin must go through a cable about a ...
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2 answers
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How to increase voltage rise time for micro controller?

I am working with a micro controller which has this written in its data sheet: "A step increase in supply voltage of 300 mV or more, with rise time of 300 ms or less, within the valid supply range, ...
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2 votes
1 answer
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High voltage nanosecond pulse generator

I am trying to build a PCB based pulse generator that can produce a pulse with a width of about 100 ns and 500V-1000V peak amplitude to a 50 ohm resistive load. I will use the circuit for burst pulse ...
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How much slower does a photodiode become in photovoltaic mode?

Take for example this photodiode, the main differences between using it in photovoltaic and photoconductive mode is the rise time and the Dark Current, aren't they?. I know exactly how the Dark ...
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Lossless Transmission Line Length vs Rise Time

I am trying to answer the question - Does a signal's rise time increase with the length of a lossless transmission line? - using LTspice simulation. Some references say that lossless transmission line ...
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Generate ultrashort rise times with photoconductive switch or photodiode

I am trying to produce voltage pulses with very short rise time (<15 ps), medium width (20 ns) and amplitudes up to 15 V. As a promising candidate I selected photoconductive switches and ultrafast ...
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Constant DC Load Stability and Bandwidth slewrate

For this circuit, how do I know if the rise edge was limited by slew rate or bandwidth? What's the effect of R2 and C2 on bandwidth? -3db of this circuit in simulation is 649 kHz, I know in ...
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What does t2-t1 represents in the expression t2-t1 = RC*ln|9|?

And how do I find t2-t1 with an oscilloscope? I was given the following problem, I derived the expression in the title of the question and I need to use the oscilloscope to find t2-t1... Resistors ...
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How is rise/fall time defined?

I understand that rise/fall time are related to RC charging/discharging waveforms. What I don't understand is how is the 0% and 100% points chosen? Do they have to be defined beforehand for a signal?...
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minimum readable rise/fall times in an oscilloscope

How can I calculate minimum readable rise/fall times of a signal in an oscilloscope (from practical point of view)? Does it depend just to bandwidth and sampling rate of oscilloscope? regards
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Why is BJT NAND rise time so high?

I'm testing a few different circuits for basic gates, made in DTL (Diode-Transistor Logic). One of the more popular layouts for NAND seems to be: simulate this circuit – Schematic created using ...
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How to calculate the rise time and fall time of a flip-flop?

This is an effort to find the rise and fall time of the following circuit. I have calculated the rise time and requesting confirmation from expert’s end. There are some assumed values like trace ...
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Rising edge of a pulse or one complete pulse needed for 1 step in Stepper motor?

I'm trying to make a step counter using Hall effect sensor implanted near the rotor of a common hybrid-synchronous(1.8° in full step) stepper motor, and I'm confused as I'm not able to figure out when ...
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Is the rise time of the output of a logic IC or optocoupler independent of the rise time of the input?

Is the rise time of the output of a logic IC (e.g. flip-flop or inverter) or optocoupler independent or dependent on the rise time of the input? If the answer is dependent, are there any other ...
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No Feasible Entries for Subprogram "rising_edge"

It's my first time coding in VHDL and I ran to some problem I have absolutely no idea how to solve. When I try to compile my code in modelsim it gives me "No Feasible Entries for Subprogram ...
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long stub length rs485

TI recommends their low-data rate transceivers to cope with long stub lengths for RS485 networks -- eg Page 3 of http://www.ti.com/lit/an/slla272c/slla272c.pdf I want to use an isolated interface, so ...
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