Questions tagged [routing]
Questions relating to the routing of printed circuit boards (PCBs) which involves the placement of tracks on the board. It may be performed manually however many PCB CAD programs provide an autorouter to assist in the process.
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Room lines stills on my pcb and the top layers tracks are not displayed in 3D view, Altium
The fact is that I have routed. I would like to know how to proceed when this kind of thing happens when using altium.
The routed tracks can be seen perfectly in 2D view. But when click 3D view I can ...
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1answer
16 views
shortcut to change layer/add via while routing in Altium doesn' t work
I'm trying to change my tracks during routing to pass from bottom to the top, or from top to bottom using +/- buttons, but neither numerical buttons neither +/- buttons from keyboard buttons are doing ...
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1answer
382 views
Acute angle on a pad or a via
It is better to avoid acute angle to join two routes (depending on current direction and waveform). I often see on board acute angle with a pad or a via. Is it bad? Should it be avoided as well?
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2answers
39 views
Eagle routing (manual routing) [closed]
I am new to eagle and I need to practice routing. I've read many general tips (about using jumpers for example) to use while routing, however I want a precise step by step procedure I can follow to ...
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1answer
43 views
Differential Pair Reference Plane Coupling
I am routing LVDS pair on a flex board. The signal is 264MHz. I used Saturn PCB design to calculate width and spacing between conductors. The targeted impedance for diff pair is 100 ohms, which is ...
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0answers
56 views
4 Layer board with high current return path inner layer
So I am doing a layout for a 4 layer PCB 1 ounce/layer. The Chip supports up to 20A (motor controller driver). The application needs about 12 amps max ( I plan it let it go up to 17A in the event of ...
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0answers
26 views
Can 8051's ALE pin be equivalent to ground?
I want to add another port to the 8051 and I plan to do so by connecting port 2 (pins 21 - 28 of the 8051) to the Q inputs (pins 2 - 9) of an edge-triggered latch (74HC574).
I will also connect the ...
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2answers
103 views
Can a via be placed in between the pads of a resistor?
Can I place a via in between the pads of a resistor as shown in the image?
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3answers
1k views
Why are ground pours isolated from each other on the top layer?
I am reading the application note from TI about the LM3409 evaluation board.
In the board layout (Figure 3) the bottom layer is a single GND pour.
But top layer has also some copper pours which end ...
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2answers
43 views
How does one duplicate tracks on both sides in KiCad?
I have a problem: I'm making an Arduino shield that has tracks which are supposed to handle up to 10A (maximum, instantaneous) current (usually it's around 2A, but we want to be on the safe side.
...
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3answers
67 views
Electrical isolation problems when routing between pads of SMT resistors/caps
According to answers to this previous question, routing traces between the pads of SMD caps/resistors, as shown in the picture, is not dangerous as long as trace to pad clearances are obeyed and the ...
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1answer
586 views
Does this PCIe routing look ok?
It is the first time for me to design a PCB with a PCIe bus. My first design failed, the bus is not working!
Tom helped me in this question and instructed me how to correctly route a high speed bus - ...
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1answer
98 views
GND connections and ground plane routing?
When I let Altium do autorouting and then I define a ground plane using a polygon connected to my ground pin, I often get layouts where a GND line is flanked on both sides by the GND polygon, and then ...
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1answer
85 views
VLSI channel routing: Why only route through channels?
I know that after placement you have your blocks and channels between the blocks. Now, the routing only takes place in the channels.
My question is: Why can't we just route 'over' the blocks by ...
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1answer
82 views
Why is the Image Sensor Board routing different?
The below posted is a open source camera project Elphel PCB layout images
I have took their 353 model camera, which is mounted with an Onsemi sensor
I only know that for high speed signals we go ...
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1answer
127 views
Open-source layout routing tool [closed]
I am looking for an open-source circuit layout routing tool (with scripting option) for custom layout design. For example: I design a NAND schematic and convert it into layout and place components (...
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1answer
96 views
How do I redirect/regenerate an input clock to an output pin in my FPGA design (Verilog)
I've got an ADC that requires me to send it 20 clock pulses when requesting to read data out of its internal register (after I've triggered it to read data from my sensor).
I was able to simulate ...
2
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1answer
82 views
differential routing without GND
I have task that I need to make adapter board which transforms gigabit ethernet connector RJ45 to another connector (not RJ45). I also have power connector to carry power one side to other.
I need ...
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3answers
111 views
How to fix incorrect routing to SMD transistor terminals
I've got a doozy of a situation:
On this circuit I had made, I routed an IRL530N D2Pak transistor with Source and Gate switched....the large heat pad should be the gate input, but instead I routed it ...
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1answer
384 views
Electrolytics and PCB Routing
In researching whether or not it's common practice to run traces/place vias underneath electrolytic capacitors (specifically SMD electrolytics, didn't seem like it would be an issue to me), I came ...
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0answers
48 views
SD card SD mode resistor array pull up
I'm routing an SD card socket to a microcontroller and I wanted to use a resistor array to cleanly pull up the lines without having 6 discrete resistors.
So far I've managed to identify and select a ...
2
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1answer
118 views
Route crossovers on PCB routing
Given the design of a PCB with some 16 pin connectors, the routing became so messy to the point that every route must crossover other routes, like in the attached screenshot
So, is there any known ...
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1answer
143 views
PCB Layout. The path between pads [closed]
Is it correct to have a path between the two pads. The width of the path is 8mil
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0answers
27 views
How should I begin implementing these multicasting techniques in MATLAB?
I would appreciate if someone could brief me about what is happening in these flowcharts.
I also want to know what kind of data (which coding scheme) they take in as input and output.
Real-Time ...
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3answers
282 views
mc34063 boost converter - low performance and noise on avr interrupt
I have some problem with my nixie project.
1 - my mc34063 boost converter have poor performance. While i use active pull down D3 and Q2 for driving my mosfet then its enough for only one nixie tube (...
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3answers
945 views
Via in between differential traces - how bad is it?
I'm working on a board that has some LVDS 2.5 signals. All the guides I've read about board layout say not to put vias in between the differential traces, eg this guide
In a few cases it would be a ...
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3answers
188 views
Using Extra-Wide Traces
I am currently laying out the board for an audio amplifier I am working on. The power requirements aren't very high - there won't be much more than 500mA flowing through any given trace. However, I ...
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0answers
31 views
Why are my traces in eagle highlighted after I moved a component?
Good day, I am currently working on a PCB in Autodesk Eagle and was almost done routing when I had to move a component and now I have all these traces that are highlighted with lines and I don't know ...
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1answer
102 views
Routing of multiple impedance controlled tracks
I am designing a board with 50 and 75 ohm tracks on the same layer.My board receives SDI video via RG179 coax. The board has an SMA connector that receives the said input. The track is 75Ω track.
...
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2answers
262 views
USB 2.0 data lines swap suggestion
I need your advice regarding the USB 2.0 signals routing. When I reach the USB connectors, the data lines (D+ and D-) have to be swapped. I have two options there: 1) swap the lines using vias and go ...
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0answers
41 views
Can memory timings be adjusted on SoC instead of having to match DDR trace lengths?
I made a little board with a AM3358 and some ram but i didn't pay attention that all traces had to be around the same length and i now have memory errors because of this.
Would it be possible to ...
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1answer
165 views
Connecting two USB 2.0 devices to a single USB port on an MCU
I'm designing a PCB where I need to have two possible USB 2.0 connectors (and hence 2 sets of diff pairs) connect to a single USB 2.0 port on an MCU. Only a single connector would be used at any given ...
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5answers
1k views
In this schematic how are the caps such as C5, C6, and C9 connected? They are just going between my power source and ground?
I was told C6 is a bypass for the oscillator(X1). Now I have been building this circuit and I understand that in Eagle grounds are connected automatically and so are voltage sources without having to ...
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3answers
124 views
Influence routing on power consumption in FPGA
What does influence of routing in static/dynamic power consumption in FPGA design?
I want to know that, different routing results different power consumption?
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2answers
62 views
shift whole design in Xillinx FPGA
How can I shift whole my design using ISE(FPGAditor,plan ahead,..) to new placement?
I want to no change in routing but change only in placement.
Thanks.
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0answers
64 views
Lab power supply board review
I'm building "lab" (read: regulated) power supply. I've routed the board and I'm thinking if it has any chance to work. Here are schematics. The board:
My main concerns:
IC3 is ST1S14 - used here ...
5
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1answer
431 views
Purpose of serpentine routing on battery balance circuit PCB
I need a battery balance circuit, that I will either buy or design. I have seen serpentine routing between the load resistor and switching component in these photos (from china). In addition, it is ...
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0answers
65 views
routing to USB3 connector with split ground
Having read through a heap of design recommendations there is one dichotomy I cannot unravel:
It is recommended not to route SSRX/SSTX over a split plane.
On the other hand, it is recommended to ...
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1answer
289 views
Duplicate manual routes in EAGLE
I am designing a PCB with many pairs each consisting of an IC and a pin header. The autorouter does a lousy job, but I found good manual routes for one pair. How can I route all the other pairs the ...
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1answer
245 views
IC Decoupling caps placement/routing [duplicate]
I've been looking around the web about placement and proper net routing of decoupling capacitors for ICs. In this example I have a pic micro-controller using internal clock at 80MHZ, with the ...
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3answers
1k views
Is Ground in a circuit nothing more than a return path?
So I work on motherboards and understand ground is both a reference point (acts as 0 when testing against) and its "where electrons carrying charge want to go." but why?
Since a battery separates ...
5
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2answers
527 views
Routing USB, DVI and Ethernet signals on a large PCB vs using long cables
Properly routing USB, DVI and Ethernet signals over long distances (30 to 40 cm) on a PCB seems to be relatively challenging (skew, characteristic impedance, cross-talk, etc.). Yet using the standard ...
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1answer
264 views
I2C layout considerations
I have a board in which there's two chips connected to I2C bus. I have tried to keep a distance and a ground plane between scl and sda lines. The routing topology is: mcu in the center and the two ...
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1answer
674 views
LVDS: length matching within a pair and between pairs
I'm interested in the LVDS communication between a Zynq (Xilinx, xc7z020-1C) and a camera (ON semiconductor Python 1300 NOIP1SE1300A−QDI).
I have read some articles about USB2.0 where the maximum ...
4
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1answer
392 views
Analog switch with a fixed state when not powered?
I am looking for a chip that could handle DPDT (or SPDT, or ultimately SPST) analog switch for audio routing (in the mOhm range resistance) and can guarantee one state when there is no power supply.
...
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1answer
217 views
What to place first: termination or pullup/pulldown?
simulate this circuit – Schematic created using CircuitLab
I am routing some ethernet signals that have termination resistors as well as pulldown resistors, my question is that as the signal ...
4
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3answers
316 views
SPI Bus Routing: Signal Integrity Issue?
I am routing a two-layer PCB with a 10MHz SPI bus. (See picture below.) The device on the left is the 5V master, the device on the right is the 3.3V slave, and the IC in the middle is a 74XX08 quad ...
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1answer
197 views
Missing pads allowed on BGA?
I'd like to use a 0.35mm BGA in a new design. If possible, I'd like to do this without resorting to an expensive manufacturing process with microvias. This is possible for my particular application, ...
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0answers
278 views
PCB grounds either side of common mode choke
I'm modding an old PCB that was put together long before I arrived here and I'd like some thoughts on what I think is a completely useless set-up where a separate comms ground has been routed ...
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1answer
41 views
How can I control the route to analyse with HyperLynx in a switch?
Good day to everyone.
I recently started using HyperLynx from Mentor and I'm having difficulties in analyzing the signal-integrity of the signals due to having switches in the circuit.
When I load ...
