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Questions tagged [routing]

Questions about the routing of printed circuit boards (PCBs) which involves the placement of tracks on the board. It may be performed manually, but many PCB CAD programs provide an autorouter to assist in the process.

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SDRAM Clock routing. Top Layer vs Sandwiched between GND/Power Planes. What's is better for EMC?

Planning a new design, were I finally removing a termination resistor on SDRAM_CLK line. Planning to increase the clock speed to 200MHz as well. Previously it looked like a straight forward decision ...
MMG's user avatar
  • 41
1 vote
1 answer
51 views

How to deal with routing of distributed signals

How to connect some signals that have many branches, such as SPI & I2C, such as clock? Does it have any special principles and methods? I have read some things, but my information is incomplete.
hossein hamzekhani's user avatar
1 vote
3 answers
77 views

Do I have to place a gap in the GND plane to reduce noise from DCDC?

In the past I made few designs with switching power supplies and I'm aware about the needs to keep traces short and with low impedance (i.e. where possible use filled zone instead of tracks) and to ...
Mark's user avatar
  • 1,235
0 votes
2 answers
65 views

How to route USB signals to CP2102

For some reasons I don't understand, the CP2102's USB signals are reversed from most common USB connectors: Of course I can place a couple of vias in order to jump on the other side and reach the pad....
Mark's user avatar
  • 1,235
1 vote
1 answer
43 views

TDM signals crossing

I'm working on a 2-layer PCB design and trying to do the best I can for signal integrity. I have 2 TDM lines and at a certain point they cross between each other. See image below. Is this likely to ...
Emerson's user avatar
  • 423
0 votes
1 answer
43 views

Question about differential signal routing [closed]

Would it be possible to know how we can calculate the distance that we must leave between two the two signals of a differential pair And from what speed can we have crosstalk between the differential ...
MisterElec94's user avatar
0 votes
2 answers
61 views

Is it possible to match impedance "with lower parasitic capacitance", or is parasitic capacitance itself a part of impedance

Parasitic capacitance makes the signal rise and fall slower, so I want it be as small as possible, but when I try to adjust parameters in Altium Designer (e.g. trace gap of a differential pair) for a ...
0x1a551e2's user avatar
  • 105
0 votes
1 answer
81 views

Excessive use of vias

I am designing a four-layer board, with the layers as follows: Signal - Ground - Power - Signal. The microcontroller I will be using is an ESP32-S3, which I believe delivers an SPI-frequency of 80 MHz....
Timothy Nguyen's user avatar
1 vote
1 answer
79 views

Raspberry PI CM4 carrier board with Altium : multiple footprint?

I'm currently designing a carrier board for the Raspberry Pi CM4 that physically includes: 1 Compute Module 2 DF40HC connectors 4 Steel standoffs I've encountered a dilemma in generating assembly ...
nowox's user avatar
  • 847
0 votes
1 answer
169 views

ESP32 Schematic and PCB Design using Altium

Please review my schematic and PCB design. Purpose of the board is to reduce the current consumption of ESP32. I have used RT9080 voltage regulator. Board is powered either by USB or by battery (4.2V)....
Umar 's user avatar
0 votes
0 answers
34 views

Routing power return path between battery holders on opposite edges of the PCB

What is the best way to route the current path between two battery holders on opposite edges of the board where the shortest, most direct path would cross clock generator or would be near a sensitive ...
try-catch-finally's user avatar
0 votes
2 answers
79 views

Pulling 100W from USB-C PD through SMD connector

I'm designing a compact addressable LED strip driver circuit. Since USB Type-C chargers with PD should be able to provide up to 100W @ 20V, I want to use a USB cable as my main power source to power ...
Tadej Gašparovič's user avatar
2 votes
1 answer
56 views

Where do I stop the thick traces?

I am working on making a speed variator which also lets you invert the rotation of a motor. I have run into a few issues however. I don't know where to end the thick traces in my PCB design. This is ...
Abdelkerim El Bani's user avatar
0 votes
0 answers
46 views

How to improve wifi reception on LR1110 Chip?

I am building a custom PCB with the LR1110 LoRa chip, which uses a WiFi chip antenna for obtaining MAC address of the wifi networks. For the WiFi Chip antenna, I am using a W3006 Ceramic Chip Antenna....
Kaustubh Murudkar's user avatar
1 vote
1 answer
70 views

Angled vs. curved routing in PCB design specifically for SPI communication

In PCB design, it's common to observe angled routings, yet curved routings are believed to offer better performance. Would using exclusively curved routings pose any issues in the PCB layout? Can ...
Alirezaagha30's user avatar
3 votes
2 answers
789 views

Why can't I connect my ground

This is my first time using Altium and my first time designing a PCB. I'm following a Phil's Lab tutorial where he's building an STM32 PCB but I'm having trouble connecting the grounds on my STM32 ...
Matthew Nguyen's user avatar
0 votes
0 answers
55 views

Pins in standard part supporting multiple packages not connected

I have two parts on my board that each support multiple packakes so that it easier to find a fitting part. Both are taken from the libraries that came with eagle a potentiometer: TRIM_1234-S64YW (...
dre's user avatar
  • 21
0 votes
0 answers
43 views

Routing Power vs. Power plane (high frequency)

As a beginner, I'm curious about handling fast analog signals with nanosecond rise times. Do the decoupling capacitors of ICs need to recharge rapidly to supply charge effectively? Would employing a ...
Tim Buktu's user avatar
1 vote
2 answers
74 views

Altium Designer 24 DRC error symbols meaning

I was wondering if anyone could help me understanding the DRC Net Antennae: via errors that look like lollipops. I've read that the double lines are related to un-routed net constraints.
9_daytona's user avatar
0 votes
0 answers
47 views

Issue in understanding routing in VLSI CAD

I have chosen to undertake VLSI CAD as a part of my electronics degree and I came across this statement (Source : Naveed Sherwani, Algorithms for VLSI Physical Design Automation, 3rd edition , Chapter ...
zero_day's user avatar
4 votes
2 answers
379 views

Custom made NetTie in KiCAD7 can't be routed

I have created a footprint for NetTie of custom size (I wanted 0.2mm pad/connection), as the library-provided one has the size of 0.5mm and is too big. I have tried two ways of routing: from other ...
smajli's user avatar
  • 940
-1 votes
1 answer
205 views

Is there any problem (EMC/EMI) with routing in parallel on several layer for better performance?

I have a high-current 220-volt AC power trace on my PCB. for this inrush power of want to use this trace parallel to each other. I want to know this way have positive effect? Do this parallel trace ...
user avatar
2 votes
0 answers
39 views

Channel-style routing on Altera FPGAs

A Tutorial on FPGA Routing claims that there are two different FPGA routing styles; channel-style ASIC routing and island style routing: Academic research has adopted as FPGA architecture a ...
Gaslight Deceive Subvert's user avatar
3 votes
1 answer
274 views

Arduino Nano in PCB for a controlled heating rig - Can't get it to work

Background I'm making a heat sealing machine. The mechanical side is all OK but the electronics is challenging me. Here's the gist of the setup. I've put it all in the image below. Apologies for the ...
H. M's user avatar
  • 33
0 votes
2 answers
123 views

STM32G031Y8Y6TR BGA issue

I want to use STM32G031Y8Y6TR WLCSP(1.86x2.14) package, but I have a problem with routing and I'm looking for your advice. First, I can not use track width less than 0.09mm, also I can not use via ...
Alatriste's user avatar
  • 160
3 votes
2 answers
316 views

PCB Build-Up and Stack-Up alternative for 8-layer PCB

I am looking at an open-source design for an NVIDIA Jetson Nano carrier board made by a company called AntMicro. See here The design is an 8-layer design with the following Stack-Up and Build-Up ...
Fadi EID's user avatar
1 vote
1 answer
79 views

Ghost line/barrier showing in Altium deginer

I am having a problem where there's an area (line) that appears only while running traces and on the draftsman document. the ghost line/region does not show up on any of the layers, I toggled all the ...
queTak's user avatar
  • 11
0 votes
2 answers
176 views

What is the best way to use 0 ohm resistors for a large number of signals?

I'm fairly new to PCB design, so maybe I start with a basic 0 ohm resistor like this: I have both output pins (SLEEP & RESET) on the DAC chip. I want to have two options on my PCB, one with 3-pin ...
johnny_1010's user avatar
0 votes
1 answer
91 views

Checking PCB Layout, Routing Tips and Improvements?

I've made some significant revisions to my old PCB design and wanted some advice on routing! This time I've tried to properly space the large current/voltage traces, kept traces short where possible, ...
makotoyuki's user avatar
1 vote
1 answer
104 views

PCB design for Renesas' DA7212 audio codec

I'm designing my very first PCB. I managed to route all my components and I'm stuck at the last footprint - DA7212 from Renesas: Those balls are both incredibly tiny and packed dense. I'd need a ...
Paul Jon's user avatar
1 vote
2 answers
217 views

PCB layout, any improvements to make on the routing?

I have designed the PCB below and would like some advice on good practice for my PCB routing / board schematic. Are there any design considerations that I should be paying attention to for the design? ...
makotoyuki's user avatar
0 votes
0 answers
52 views

Altium PCB Layout Track Issue

My question is about the weird track figure in the Altium Layout. I attached a screenshot of this issue in the following. Can you help me, how to fix or remove this mark from Altium PCB page?
bcdyzi's user avatar
  • 87
4 votes
3 answers
690 views

Importance of copper balance when dealing with small components (0402, 0201)

I usually work with big components (0805, 0603.) Now I'm trying to make a board that would use much smaller packages such as 0402 and 0201. I know that balancing copper is relatively important to ...
BEN's user avatar
  • 193
0 votes
3 answers
125 views

What are the most effective techniques for reducing the negative effects on differential pairs routed on top of two different ground planes?

I have an FMC Card with analog circuitry containing channels. I've separated the ground for these analog channels into two distinct planes: AGND and PGND. PGND serves as the ground for the power ...
kakeh's user avatar
  • 614
3 votes
1 answer
471 views

Can I place vias under components if they're not on the pads?

There are several posts on this site (and elsewhere) discussing why, in general, vias on pads need to be avoided. Understood. Can I place vias under components if they're not under the pad? If so: Is ...
SRobertJames's user avatar
  • 1,135
2 votes
1 answer
159 views

Routing High Current Trace to 0.5mm Pitch QFN IC

I'm designing a PCB which uses TI's DRV8411ARTER 4 Half Bridge motor driver. However, I've run into a routing issue which I'm not sure what the best plan of action is. The driver will be outputting ...
Swiss Gnome's user avatar
3 votes
1 answer
260 views

OctoSPI HyperRAM PCB Routing

I am attempting to route a HyperRAM BGA chip with a HyperBus OctoSPI interface to an STM32 MCU. This is on a 2 layer board. After much consideration, I have determined that the best placement of the ...
CryptoAlgorithm's user avatar
0 votes
0 answers
236 views

Have I designed and routed my USB-C port correctly because when I connect my 3D printer I measure voltage on vcc

I have designed my usb-c connection as in the attached pictures, however whenever I connect my Ender-3 to it I measure between 1-2V on different parts of the circuit including the data pins on the ...
th0r1000's user avatar
0 votes
1 answer
166 views

Weird pinout of USB ESD protection

The USB ESD protection component USBLC6-2SC6 seems to be very popular (?). However, its pinout seems not ideal: The USB differential pair should be routed close to each other, but the pinout of ...
root's user avatar
  • 149
0 votes
0 answers
24 views

Current Routing to Many Connectors

I have a board that is meant for power distribution. It takes in +24V through a 6x2 Wire-to-Board connector rated for 23A per contact and routes it to 22 other 2x2 SMD Wire-to-Board connectors which ...
InBedded16's user avatar
1 vote
0 answers
46 views

Why does Backside Power Distribution work for high speed CPUs?

Several upcoming or future CMOS process nodes are said to offer some kind of backside power delivery for Silicon CMOS transistors, so the precious area in the lower metal layers is freed up for signal ...
tobalt's user avatar
  • 22.5k
1 vote
0 answers
94 views

Direct Ethernet link between Raspberry CM4 and Jetson Orin Nano

I need to have high speed communication between Raspberry CM4 and Jetson Orin Nano modules on the same PCB. My question is: can I route them through Ethernet directly without the need for an isolator ...
j420hnny's user avatar
0 votes
1 answer
90 views

Routing on stripboard/prototyping PCB

I'm regularly tasked with doing "quick and dirty" prototypes on stripboard and other prototyping PCBs (holes only, patterns like the solder-less breadboards, etc.). Those are usually very ...
Sandro's user avatar
  • 7,697
0 votes
0 answers
101 views

Net GND's unconnected alert remains off in Altium

I have my Altium Designer project where I have a net called GND. That's the ground. While routing, I can see these little white lines that alert me about which pad I need to connect to each other, and ...
Developing Electronics's user avatar
2 votes
2 answers
407 views

Is it a bad practice to route to a pad from its corner?

I am new to PCB design, I wonder if there are any bad effects by routing it through the corner of a pad. (Top right) Any input is appreciated.
Terrence's user avatar
4 votes
1 answer
551 views

10/100 Ethernet Routing Review

I know it is a big favor to ask, but this is my first ethernet design, so could you provide input on the routing from connector to mag and from mag to PHY? Is it fine or how can I improve it? Really ...
HV16's user avatar
  • 345
1 vote
1 answer
70 views

Electrical service discharge path through body

If someone were to accidentally make contact with live service conductors, while touching another person, would I get shocked or would the current travel through me and into the other party without my ...
Dvisionone's user avatar
1 vote
1 answer
300 views

What means the jumper field in a footprint pad properties in Altium?

I have copied a footprint to a new .PcbLib file. After doing that the field called "jumper" in the properties window for each pad has been set to 0 (for two pads) and to 1 (in six pads). I ...
Developing Electronics's user avatar
3 votes
1 answer
303 views

Having a keep-out area around a crystal - benefits?

I was reading the hardware design manual of the WF200 WiFi processor. On one page they say: If possible, use an isolating ground metal between the crystal and VDD traces to avoid any detuning effects ...
euraad's user avatar
  • 1,324
2 votes
2 answers
269 views

Is it right to route AC L/N on different layers on a PCB?

I'm working on a PCB for a trailing-edge dimmer. Is it OK to route the AC live and neutral in opposite layers? In the image, you can't see the AC neutral (blue), behind the AC_L, but it is there. This ...
0x3333's user avatar
  • 229

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