Questions tagged [signal-integrity]

Questions regarding how to properly ensure Signal Integrity, protection from noise, shielding, proper pcb layout.

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High-speed PCB crosstalk, inductive vs capacitive

I know that at the time of crosstalk Capacitive as well as inductive currents generate voltage drops on the victim line over termination resistors. I have three questions. 1)Why inductive crosstalk ...
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0 answers
28 views

Shielded header cables or alternatives for IDC / 2x8 header cables

For my project I currently use 2x8 IDC cables, all of them carrying digital data, like SPI, I2C and TDM (digital audio). As I have tested, I found that these cables bring in loads of noise to the ...
1 vote
1 answer
69 views

How can I match the impedances in this circuit?

I have a pre-amplifier with 93.1 Ω output impedance connected to a main amplifier with input impedance of 1000 Ω via 75 Ω co-axial cable. The signals are very small pulses from a measurement device ...
2 votes
0 answers
36 views

DDR Trace Length in Motherboards

I was trying to understand DDR, Trace-length, and signal integrity. Most of the datasheets, For example, iMX8M Mini (Doc: IMX8MMHDG) clearly specifies what are the requirements for the each signal in ...
1 vote
2 answers
103 views

How ground plane acts as a low impedance path and shielding action of ground plane

I am new to high speed design .Please don't flame me if this question is very basic :) Below statement is from AD application note. (AD Appnote) "The ground plane not only acts as a low impedance ...
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4 votes
3 answers
498 views

Noise power v.s noise amplitude

I have started reading the following book: The scientist and Engineer guide to digital processing. At the beginning of chapter two, the following is said when talking about mean deviation v.s. ...
1 vote
1 answer
49 views

Max stub length on digital signals

I have one SPI port that I'd like to use for 2 or 3 devices with chip selects. I'm worried about signal integrity on the data lines with these stubs. I've tried depicting my question below. Every ...
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2 votes
0 answers
33 views

Is compliance testing necessary for PCIE3.0 if the SOC and Wi-Fi chipset is on the same board?

In my product, PCIe is just used for data transmission between SOC and Wi-Fi chipset. It's not used for any other purpose. Is compliance testing necessary for this scenario? What type of SI ...
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4 votes
2 answers
283 views

Signal integrity: ground plane vs ground traces between signals

I am designing a 2 layer PCB with high speed signals (200 MHz range) AND 4 layer PCB is NOT an option. Which of the following would be a better scenario for signal integrity, and if possible, explain ...
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0 votes
2 answers
83 views

Calculate RS422 signal to travel time from one side to another

I want to calculate the time take to transfer command from one uC side to another, this is the architecture: the Baudrate is 115200, the number of bits is 8. I would like to hear explain not just an ...
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2 votes
3 answers
64 views

Can polarity protection circuit be useful for also data transmission?

For example, CANBUS has two transmission lines CAN_HIGH and CAN_LOW. Polarity matters. Would the performance be affected if a polarity protection circuit with couple of diodes would be implemented? ...
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1 vote
2 answers
51 views

Finding total return loss between transceivers

I was wondering how one finds the total return loss between transceivers. In particular, how return losses of connectors are added. Say if I have two connectors with a return loss of -10dB. How do I ...
0 votes
1 answer
60 views

How to calculate the maximum cable length for SerDes using data isolator component?

I am using ADN4655 component to isolate LVDS SerDes lines that run at 1GHz. https://www.analog.com/media/en/technical-documentation/data-sheets/ADN4654-4655-4656.pdf Termination 100Ohms resistors are ...
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5 votes
3 answers
345 views

Single point grounding VS Uniform ground plane

Intro: I think I have read/seen too many articles pointing out why having a single uniform ground plane is the superior grounding strategy in comparision to split ground planes or irregular ground ...
  • 359
2 votes
1 answer
194 views

PCB trace as transmission line: rise time vs propagation delay

I have seen the answer for when to consider PCB trace as a transmission line in many places. Typically, if the signal pulse rise time is ‘small’ compared to the time it takes for the signal pulse to ...
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0 votes
2 answers
91 views

Can you use a MagJack for isolation of RS422 for something like UART?

Say, I dont want to use optocouplers they either too slow or take up too much same on the board. And digital isolators are too costly or out of stock because of semiconductor shortage. Consider this ...
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0 votes
1 answer
36 views

Microstrip to Stripline Ref Plane Continuity

I have some relatively fast (1ns edge rate) signals going between microstrip (GND ref) to stripine (GND / VCC) through a via transition... Track length isn't too long and vias are reasonably close to ...
10 votes
2 answers
1k views

Which is better for signal integrity in a two layer PCB? Two ground planes or one power and one ground plane?

I am designing a two layer PCB with high speed signals with rise and fall times as low as 3ns. I was doing some studying and learned that for better signal intergrity and EMI a good grounding strategy ...
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0 votes
1 answer
89 views

Is an SSR better than a electro-mechanical relay?

To solve signal cleanliness issues in a system where I have to very accurately measure pressure I am thinking of employing a relay switch to operate an air pump which I am currently operating through ...
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0 votes
0 answers
44 views

Fundamental question on Signal Integrity analysis

I have a gate driver PCB of which I want to do a signal integrity analysis. I thought I would use the Signal Integrity Analysis tool in Altium, and I tried running it. None of the nets were analysed ...
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0 votes
0 answers
49 views

STM32 signal level issues

I have some weird signal issues and I'm not sure if its my layout or if my chip (STM32F405) is just broken. I'm toggling a port every ~1ms, but my scope says it's only outputting 900mV. There is a ...
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0 votes
0 answers
49 views

How to capture fast signal response from Gate beam IR sensor

I have purchased two IR RX/TX sensors. The datasheet is here. I have also purchased an ESP32 microcontroller. I want to use the beam in a way that every time someone walks across this beam (i.e. the ...
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0 votes
0 answers
61 views

Improve accuracy of thermistor circuit

I am using this thermistor to measure temperatures between room temp and 100C and I want to design the circuit in such a way that it reads as accurately as possible (ideally +/- 2 degrees). I'm using ...
0 votes
2 answers
192 views

Ground Pours or Thieving for Filling Unused Space on PCB Signal Layers

Often at the end of a PCB design there is unused space on the signal layers. It is important to fill this space because of: The electroplating process (valid only for TOP and BOTTOM) The even ...
1 vote
1 answer
94 views

Long rise time on UART RX line

I'm attempting to replace a controller unit (based on an STM32F1) with my own design (based on ESP32), but I'm stuck at the UART RX (seen from the controller side). The rise time of the signal is too ...
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0 votes
0 answers
48 views

How do I match the Red Pitaya's signal strength with that of a function generator?

I'm trying to send a signal from a Red Pitaya's fast analog output through a very long RG174 cable. The signal comes out quite noisy and somewhat attenuated on the other side (purple is the signal at ...
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0 votes
1 answer
66 views

EtherCAT Communication Testing

I am working on a device that uses EtherCAT. On one side, I have the standard EtherCAT Connector - an RJ45. On the other side, I would like to experiment with different connectors. For starters, I ...
2 votes
1 answer
122 views

How do I make these MIPI signals better?

I have a system which transmits 1 Gbps single lane MIPI video over several flex circuits. Where each flex circuit connects to its neighbour, I have placed a MIPI repeater chip: SNx5DPHY440SS. At the ...
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1 vote
0 answers
56 views

Daisy chaining NOR flash modules

for a project (FPGA image processing accelerator) I need to create a high bandwidth read-only memory. I settled on using Quad SPI NOR flash modules (will use them in XIP mode) but I have some concerns....
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1 vote
0 answers
164 views

What is the best way to route a SPI Bus with multiple loads?

What is the best way to route a SPI bus with four loads? One bus with multiple drops. A star pattern with equal length branches to each peripheral. Or other configuration. All 4 peripherals and ...
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5 votes
4 answers
2k views

Is it ok to have a PCB track cross another on a different layer?

PCB tracks carry electric signals and these produce magnetic and electrical fields around them. Due to these fields, the PCB tracks have inductive and capacative cross talk with nearby PCB tracks. I ...
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3 votes
1 answer
340 views

Positive and negative overshoot mitigation

While tuning a 12.5 MHz 3.3V signal (square wave expected 3.3V to 0.0V,) I am seeing overshoot reach of +5.0 V and negative overshoot of -2.0V. I am intentionally not using the term undershoot here as ...
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2 votes
2 answers
308 views

Why is my serial connection transmitting slightly incorrect characters?

I have four configurations I'm testing, and one of those configurations is showing symptoms of incorrect transmission in one direction only (from my laptop terminal to the server). Direct connection ...
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0 votes
1 answer
130 views

Safety-Critical Diagnostic Signaling

I need to (extremely) reliably detect the status of a normally-closed DPST momentary switch at the end of a short distance of cable (max. 3m, 22 AWG). I propose to do this with two entirely ...
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0 votes
1 answer
96 views

Can I mix three wires that carry single phase 240V AC and four wires that carry USB signals into a signal custom cable?

I am planning to design a system that requires AC power supply as well as a USB connection. I found a connector that has provision for the same here. If I were to pass 240 VAC single phase along with ...
2 votes
2 answers
584 views

ESP32 - Level Shift - WS2811 LED Strip - Data Signal

We are working on a new project in which we have designed and prototyped a new custom PCB to include an ESP32 in which we are controlling a WS2811 12VDC LED strip via Bluetooth. I am the business ...
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0 votes
1 answer
305 views

NVIDIA Jetson custom carrier board does not booting when PCIE device is attached. How can I track the problem?

I have designed an custom NVIDIA Jetson carrier board based on P3449-B01 Jetson Nano Carrier Board reference design by NVIDIA. The carrier board is working fine, the linux is booting up, however when ...
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0 votes
1 answer
75 views

Determining cause of QSPI FLASH output glitches

I am testing a QSPI NOR FLASH device on a board I designed. It's datasheet is here. Although it is working, I am seeing some glitches on the FLASH SDO (Serial Data Output) line. All other signals are ...
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1 vote
3 answers
97 views

Connecting FPGA to a device's RAM data bus distorts signal - how to fix it?

In short, I am trying to read data from a RAM's data bus via a FPGA. But the more lines from the bus I connect to the FPGA, the more distorted the signal become. In more detailed, I have a FON2100 1 ...
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1 vote
1 answer
52 views

How to protect the signal quality of LVDT input and output?

I am designing a 6 wire LVDT. I need to know how to protect the signal quality of both the primary excitation input and secondary coil outputs inside the LVDT, and inside the device in which the LVDT ...
8 votes
4 answers
964 views

Why application notes advise series resistance to be added on clock lines for high-speed interfaces, like SDIO, and not on data lines?

Many application notes (like this one) advise series resistance to be added on the clock line, close to the source. I do understand that this resistance is added there to match the source impedance to ...
0 votes
1 answer
80 views

Passivity and Causality of PCB channel

We use S parameters to analyze a PCB channel. Once the S parameters are extracted, what I have seen is SI engineers will check the S parameters obtained are passive and casual. I have some questions ...
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0 votes
0 answers
39 views

What you mean by ¼ wave resonance

I was learning about VIA modeling with the help of this paper (http://lamsimenterprises.com/Method_of_Modeling_Differential_Vias-mod-Iss2.2-Apr2-12.pdf) I referred to many papers. Everywhere I can see ...
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0 votes
1 answer
97 views

Why is mutual inductance coupling high in a microstrip PCB line?

I am learning about crosstalk on PCBs from the high-speed signal propagation book by Howard Johnson. It says mutual inductance coupling is high in microstrip lines compared to mutual capacitive ...
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0 votes
2 answers
190 views

SPI questions: EMC and signal integrity

I have an SPI line going at a speed of 12Mbit/s on a 2-layer PCB. This is for a product so it needs to pass EMC tests (as well as just work well). Questions: Should I use series resistors for all the ...
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2 votes
1 answer
112 views

How is I2C signal integrity maintained over monitor cables for EDID?

Computer monitors (and other similar display equipment) use the I2C protocol with 5V signal levels to send EDID information to the "host". I2C's typical use case is for short connections on ...
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0 votes
0 answers
51 views

Impact of heat on unshielded data cables

How does heat impact the signaling performance of unshielded ribbon/flexible flat cables? Background: I'm modding a camera to improve thermal performance by adding thermal pads between the heatsink ...
2 votes
3 answers
128 views

Are Ethernet magnetics temperature sensitive

I am using these discrete Ethernet transformers ALT4532M-201-T001. According to the datasheet, they are rated for -40ºC to +85ºC. In general for Ethernet transformers, would I expect to see some ...
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1 vote
1 answer
118 views

DDR3 logic levels - AC or DC?

In a DDR3 datasheet, I found different voltage levels (AC and DC.) I already know about DC logic levels but I don't know about AC logic levels. What is the difference between the two? Do the AC values ...
  • 646
0 votes
0 answers
66 views

How can I bridge across a change in differential impedance?

In a design I'm working on, I have a 100Mbps differential signal traveling from a chip on one PCB to a chip on another PCB. For various reasons, I can't make the differential impedance the same on ...
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