Questions tagged [signal-integrity]

Questions regarding how to properly ensure Signal Integrity, protection from noise, shielding, proper pcb layout.

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Fundamental question on Signal Integrity analysis

I have a gate driver PCB of which I want to do a signal integrity analysis. I thought I would use the Signal Integrity Analysis tool in Altium, and I tried running it. None of the nets were analysed ...
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STM32 signal level issues

I have some weird signal issues and I'm not sure if its my layout or if my chip (STM32F405) is just broken. I'm toggling a port every ~1ms, but my scope says it's only outputting 900mV. There is a ...
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How to capture fast signal response from Gate beam IR sensor

I have purchased two IR RX/TX sensors. The datasheet is here. I have also purchased an ESP32 microcontroller. I want to use the beam in a way that every time someone walks across this beam (i.e. the ...
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Improve accuracy of thermistor circuit

I am using this thermistor to measure temperatures between room temp and 100C and I want to design the circuit in such a way that it reads as accurately as possible (ideally +/- 2 degrees). I'm using ...
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Ground Pours or Thieving for Filling Unused Space on PCB Signal Layers

Often at the end of a PCB design there is unused space on the signal layers. It is important to fill this space because of: The electroplating process (valid only for TOP and BOTTOM) The even ...
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Long rise time on UART RX line

I'm attempting to replace a controller unit (based on an STM32F1) with my own design (based on ESP32), but I'm stuck at the UART RX (seen from the controller side). The rise time of the signal is too ...
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How do I match the Red Pitaya's signal strength with that of a function generator?

I'm trying to send a signal from a Red Pitaya's fast analog output through a very long RG174 cable. The signal comes out quite noisy and somewhat attenuated on the other side (purple is the signal at ...
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EtherCAT Communication Testing

I am working on a device that uses EtherCAT. On one side, I have the standard EtherCAT Connector - an RJ45. On the other side, I would like to experiment with different connectors. For starters, I ...
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How do I make these MIPI signals better?

I have a system which transmits 1 Gbps single lane MIPI video over several flex circuits. Where each flex circuit connects to its neighbour, I have placed a MIPI repeater chip: SNx5DPHY440SS. At the ...
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Daisy chaining NOR flash modules

for a project (FPGA image processing accelerator) I need to create a high bandwidth read-only memory. I settled on using Quad SPI NOR flash modules (will use them in XIP mode) but I have some concerns....
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What is the best way to route a SPI Bus with multiple loads?

What is the best way to route a SPI bus with four loads? One bus with multiple drops. A star pattern with equal length branches to each peripheral. Or other configuration. All 4 peripherals and ...
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Is it ok to have a PCB track cross another on a different layer?

PCB tracks carry electric signals and these produce magnetic and electrical fields around them. Due to these fields, the PCB tracks have inductive and capacative cross talk with nearby PCB tracks. I ...
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Positive and negative overshoot mitigation

While tuning a 12.5 MHz 3.3V signal (square wave expected 3.3V to 0.0V,) I am seeing overshoot reach of +5.0 V and negative overshoot of -2.0V. I am intentionally not using the term undershoot here as ...
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Why is my serial connection transmitting slightly incorrect characters?

I have four configurations I'm testing, and one of those configurations is showing symptoms of incorrect transmission in one direction only (from my laptop terminal to the server). Direct connection ...
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Safety-Critical Diagnostic Signaling

I need to (extremely) reliably detect the status of a normally-closed DPST momentary switch at the end of a short distance of cable (max. 3m, 22 AWG). I propose to do this with two entirely ...
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Can I mix three wires that carry single phase 240V AC and four wires that carry USB signals into a signal custom cable?

I am planning to design a system that requires AC power supply as well as a USB connection. I found a connector that has provision for the same here. If I were to pass 240 VAC single phase along with ...
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ESP32 - Level Shift - WS2811 LED Strip - Data Signal

We are working on a new project in which we have designed and prototyped a new custom PCB to include an ESP32 in which we are controlling a WS2811 12VDC LED strip via Bluetooth. I am the business ...
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NVIDIA Jetson custom carrier board does not booting when PCIE device is attached. How can I track the problem?

I have designed an custom NVIDIA Jetson carrier board based on P3449-B01 Jetson Nano Carrier Board reference design by NVIDIA. The carrier board is working fine, the linux is booting up, however when ...
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Determining cause of QSPI FLASH output glitches

I am testing a QSPI NOR FLASH device on a board I designed. It's datasheet is here. Although it is working, I am seeing some glitches on the FLASH SDO (Serial Data Output) line. All other signals are ...
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Connecting FPGA to a device's RAM data bus distorts signal - how to fix it?

In short, I am trying to read data from a RAM's data bus via a FPGA. But the more lines from the bus I connect to the FPGA, the more distorted the signal become. In more detailed, I have a FON2100 1 ...
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How to protect the signal quality of LVDT input and output?

I am designing a 6 wire LVDT. I need to know how to protect the signal quality of both the primary excitation input and secondary coil outputs inside the LVDT, and inside the device in which the LVDT ...
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4 answers
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Why application notes advise series resistance to be added on clock lines for high-speed interfaces, like SDIO, and not on data lines?

Many application notes (like this one) advise series resistance to be added on the clock line, close to the source. I do understand that this resistance is added there to match the source impedance to ...
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Passivity and Causality of PCB channel

We use S parameters to analyze a PCB channel. Once the S parameters are extracted, what I have seen is SI engineers will check the S parameters obtained are passive and casual. I have some questions ...
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What you mean by ¼ wave resonance

I was learning about VIA modeling with the help of this paper (http://lamsimenterprises.com/Method_of_Modeling_Differential_Vias-mod-Iss2.2-Apr2-12.pdf) I referred to many papers. Everywhere I can see ...
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Why is mutual inductance coupling high in a microstrip PCB line?

I am learning about crosstalk on PCBs from the high-speed signal propagation book by Howard Johnson. It says mutual inductance coupling is high in microstrip lines compared to mutual capacitive ...
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SPI questions: EMC and signal integrity

I have an SPI line going at a speed of 12Mbit/s on a 2-layer PCB. This is for a product so it needs to pass EMC tests (as well as just work well). Questions: Should I use series resistors for all the ...
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How is I2C signal integrity maintained over monitor cables for EDID?

Computer monitors (and other similar display equipment) use the I2C protocol with 5V signal levels to send EDID information to the "host". I2C's typical use case is for short connections on ...
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Impact of heat on unshielded data cables

How does heat impact the signaling performance of unshielded ribbon/flexible flat cables? Background: I'm modding a camera to improve thermal performance by adding thermal pads between the heatsink ...
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Does HyperLynx have an impedance calculator for coplanar waveguide?

Does HyperLynx have an impedance calculator for coplanar waveguide like Si8000 does?
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2 votes
3 answers
112 views

Are Ethernet magnetics temperature sensitive

I am using these discrete Ethernet transformers ALT4532M-201-T001. According to the datasheet, they are rated for -40ºC to +85ºC. In general for Ethernet transformers, would I expect to see some ...
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RLGC extraction from the Asymmetric S-paramter

In the signal integrity of high speed interconnect, in case of extraction of RLGC from S-parameter of it, they assume the S-parameter is symmetric and reciprocal. but in practical case S-parameter of ...
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DDR3 logic levels - AC or DC?

In a DDR3 datasheet, I found different voltage levels (AC and DC.) I already know about DC logic levels but I don't know about AC logic levels. What is the difference between the two? Do the AC values ...
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How can I bridge across a change in differential impedance?

In a design I'm working on, I have a 100Mbps differential signal traveling from a chip on one PCB to a chip on another PCB. For various reasons, I can't make the differential impedance the same on ...
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2 votes
2 answers
111 views

Why do we use S parameters for channel modelling, rather then using Z, Y, h or any other parameter?

For channel modelling in high speed PCBs we always use S parameters. What is the specialty of S parameters for this purpose? Why we are not using Z, Y, h or any other parameter? How do we determine ...
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Signal Integrity: rise time or signal frequency, which is more dangerous?

I was watching the below video from Rick Hartley. In this he says more than signal frequency signal rise time is more problematic. A signal with rise time in the range of picoseconds and frequency in ...
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1 answer
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S Parameters Channel Modelling Time domain representation of insertion loss

Below is the insertion loss waveform obtained after S parameter of a channel.The waveform is in frequency domain. May I know what is the equivalent time domain waveform and how to obtain it from this ...
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Can I use a MOSFET driver as a high current logic voltage shifter

I have been scratching my head on my problem of driving a 800 kHz signal through a 10 meter twisted pair cable (signal+ground) with an abysmal worse case scenario of 1 nF wire capacitance. What I know ...
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2 votes
2 answers
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How to make a 800 kHz digital signal reach 10 meters

I am running some addressable LED strips the SK6812 variant. Because i want to hide the power supply and the controller, the strips and controller is now situated about 10 meters away from each other. ...
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2 votes
2 answers
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Transmission line at DC

Do we need to consider a PCB trace as a transmission line when the Input is a DC signal. As per my knowledge we used to consider PCB trace as a transmission line when length of the trace is more than ...
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How important is 'perfectly' phase matching high speed differential lines?

This question is related to Differential pair length matching considering phase. According to Microchip's document Implementation Guidelines for Microchip’s USB 2.0 and USB 3.1 Gen 1 and Gen 2 Hub and ...
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long cable capacitance consideration when the output is tri-stated

I have 50 devices that are sending data to one MCU through multiple 3 meter data cables. The data signal lines merge at the MCU location. Only one device will send data at a time at 5 MHz+ data rate. (...
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1 vote
2 answers
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40 MHz clock between 2 ICs

I have an oscillator at 40 MHz which I would like to drive two ICs, 1.8V output. The ICs are in opposite directions so I have opted for star topology of the two clock traces. Trace length for the ...
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Using a pull-up resistor and considering rise time for IC input

I have a FPGA based design in which the FPGA is interfaced with several ICs. The I/Os of the FPGA and most of the ICs are 3.3V, except from one where the I/Os are 1.8V. While there is no problem for ...
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MIPI C-PHY Signal Routing

I've been looking for a good, definitive reference example for MIPI C-PHY signal routing and have come up short. Bear in mind that C-PHY uses a set of 3 signals per lane, with multi-level coding ...
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What is 'mis-registration' and 'mis-collimation' of television signals?

I was reading about early televisions and television cameras, and I came across these terms with no explanation.... They appear on Google on a few pages, but again I cannot find a definition....
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2 votes
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TVS diodes routing on USB data lines

I have decided to use bidirectional TVS diodes for ESD protection on the USB data lines. Nevertheless, the pads of the diodes create a discontinuity of the tracks. So, what is the best way to route ...
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Wiggling connector receptacle housing causes CAN signal dropout?

I am currently using a 4pin molex Microlock 1.25mm connector that has a CAN connection as well as a power connection. pin 1 = power pin 2 = ground pin 3 = CAN_H pin 4 = CAN_L We recently discovered an ...
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2 votes
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Near end crosstalk saturation in a microstrip transmission line

I am referring to a microstrip PCB transmission line. I simulated the crosstalk situation using Hyperlynx. Please see the below circuit: I kept increasing the trace length and measured the crosstalk ...
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Crosstalk Near END and Far END Waveforms

I was learning the basics of cross talk(https://www.youtube.com/watch?v=5EeQPxRdurk).I am confused about the orientation of near end and far end cross-talk wave form's.Please see the below figure. ...
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Parallel Termination:FLY-BY Topology

I was simulating fly by topology. I can see that the Rise time and fall time is better for the receiver which is near to the termination resistor. May I know why is it like that.
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