Questions tagged [signal-integrity]

Questions regarding how to properly ensure Signal Integrity, protection from noise, shielding, proper pcb layout.

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119 views

Glitchy pulses in a data acquisition system

A single-ended -10V to +10V 16-bit data acquisition system is composed of 16 single-ended channels where two of the channels are analog outputs and the rest are analog input channels. The transducers ...
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1answer
854 views

Questions and confusions on transmission line theory and lumped element model

I want to model a simple signal transmission system by considering it as travelling through a transmission line. Here is the system: The original signal generated by the transducer is 0 to 10V step ...
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3answers
717 views

How to drive a SPI bus over 5 feet of 26AWG wire?

Below is the circuit I am trying to achieve. The endpoint is a 5V device but my microcontroller (SPI Master) is a 3.3V device so I have to do the voltage translation. My question is what kind of a ...
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2answers
2k views

How to get rid of this reflection on falling edge of i2c SDA line?

This is the scopeshot of the falling edge: How to get rid of the reflections on the falling edge of this SDA line?
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2answers
564 views

Improve signal integrity of Ethernet signals (if indeed is needed)

Actually it is nothing to do with Ethernet specific, but just to be accurate, I have several SS-SMII Interface signals between an FPGA and a Switch. The interface has 8 data signals, one ...
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1answer
573 views

What capacitor types perfom best for large-value signal path applications?

Most signal path/timing capacitors are of stable types such as film or C0G ceramic. However, size and cost force an upper limit on this -- C0G caps out at 10-100nF, while film caps can manage up to 1-...
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1answer
388 views

Splitting op amp output into 2 different IC input

I tried the circuit shown below on breadboard and found that when I connect both the IC's input pin to the node 1, the op amp output is giving a different value. I believe this is due to the ...
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2answers
167 views

digitaly controlled voltage divider for picky audio recording enthousiasts

I want to replace expansive multi-deck rotary switches with a micro-controller and digitally controlled (i2C or ISP) analog switches. It will be used in a vintage (1972) discreet transistor ...
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0answers
197 views

Help with deciding my layout for EMC tests and SI. Different alternatives [closed]

I am thinking of what way would be the best to layout my system in order for it to have the best SI and pass EMC tests. My system consists of two PCBs joint by a flat flex cable (up to 7cm) and these ...
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1answer
1k views

IBIS model of capacitors

I have started the design of a high speed digital design multi-gbps interfaces. I would like to use Altium designer for PCB analysis (signal integrity). But I am wondering if altium uses the IDEAL ...
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115 views

Why does 7.6Mhz signal start appearing?

I am using a reference design that modulates a 8Mhz carrier DC square wave in simple on-off keying at 10bps. I wanted to change the carrier to 125kHz. I took out the 56pF capacitor in C4 and ...
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2answers
569 views

High Speed PCB impedance question

I am going to design a high speed digital design including an FPGA and GSPS A/D interfaced with multi-gigabit/s serial ports. But I have found the impedance matching problem a little confusing, My ...
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2answers
496 views

SMPS PCB Design Signal Integrity

This is going to start out like the other 53 pages of power supply questions "I'm a student working on a capstone project making an SMPS....". I have 12 months before the final design is due. I'm ...
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1answer
91 views

How do i make sure that PCB traces or Enclosure unit is not affecting the BLE 4.0 range?

I am using BLE 4.1 ready module having on chip antenna, according to datasheet i have taken care in PCB layout design that at least there should be 8 mm of distance from Antenna and copper traces from ...
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1answer
117 views

ADC Input Problem/Considerations

I'm running an audio signal into an ADC on a teensy 3.1. The teensy then detects the first several harmonics of the signal. I had this project working on a breadboard for a good while and finally got ...
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3answers
105 views

Audio Signal Noise: Understanding & Troubleshooting

Today, I'm wearing a pair of active headphones for a change.. ( Running on 2x AAA batteries ). I've hooked them up to a synth and noticed this really annoying monotone buzz / hum in the background. ...
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2answers
766 views

PCB Trace Impedance - Multiple Layers

I'm in the process of designing an 8 layer PCB with a stackup of: Signal, GND plane, Signal, Power plane, Power plane, Signal, GND plane, Signal. For calculating the trace widths necessary for ...
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3answers
2k views

Audio transformer: What to do with an unused winding?

For the purpose of impedance matching and floating a single-ended, ground-referenced signal, I am planning to use an audio transformer like this one. Here's the schematic from the data sheet: My ...
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1answer
382 views

Grounding Scheme for Signal + Power

Background I am working on a project which requires a both digital and analogue signals along with power and biases to be connected between two devices over roughly 1 metre is quite a harsh (magnetic ...
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0answers
37 views

Sources of online broadband RF energy data stream?

I am interested in finding recordings of broadband FM radio emissions, ideally in the marine VHF frequencies (156.0 and 162.025), in order to understand carrier artifacts and distortions that could ...
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2answers
559 views

Do I need to isolate the power to buzzer circuit from other sensitive circuit?

I am planning to add a buzzer circuit, which will share the power plane with a micro-controller. Do I need to add a choke or so to isolate the two components? If so, how should I do it? Thanks in ...
8
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1answer
213 views

Separating Two High Speed Digital ICs

Previously, I've designed a PCB incorporating this ADC chip. It has a digital bus of 10 signals some of which are 40MHz. Right now we have a four layer PCB and the ADC is connected directly to a ...
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1answer
2k views

Disadvantages of Schmitt Trigger Inputs

I'm familiar with the utilization of Schmitt Triggers when interfacing with low slew rate signals / sinusoidal waveforms. In a recent design, I've been scrubbing our FPGA I/O configurations and ...
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1answer
2k views

SD Card Trace Inductance and Capacitance

Most (if not all) SD card datasheets contain the following requirements, which I gather are copied from the standard: 16nH max trace inductance for f < 20 MHz 40pF max line capacitance Two ...
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4answers
452 views

Dealing with signal noise over 50 foot communication link

Situation: Connecting a motor controller to an MCU. Motor controller is about 50 feet away from MCU. Connected via a single conduit (buried), containing the following cables: (There is no other ...
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1answer
223 views

What is causing this distortion on a 20MHz control signal?

I'm having an issue with a PCB on which I have a microcontroller and an external SRAM. I don't want to fully describe the problem as I already posted a question regarding that. Link Since that I ...
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2answers
445 views

Signal and power integrity - 4 layer board

Let's assume that we need to design Mixed signal PCB with 2 fast integrated circuits(tr_min = 1ns) operating at different voltage levels(3.3V and 4V). There are however other voltage levels on the PCB(...
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2answers
2k views

Do I need a via or stitching cap when I transition between physical reference planes of the same potential?

I have the following layer stack up Signal Ground Signal Power Ground Signal Ground Signal Layer 1-2-3 are tightly coupled Layer 4-5 are tightly coupled Layer 6-7-8 are tightly coupled Total ...
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1answer
387 views

Why is the input pin to my multiplexer considered a capacitive load?

I am currently using CD74HC4067 multiplexer in my design. I had trouble with my input signal and therefore conducted an experiment by measuring the input resistance of my multiplexer as the frequency ...
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4answers
5k views

purpose of termination resistor

My question is not about a particular bus or line and the termination I should put on it. I know some busses need termination resistors like CAN or address/data for memories. If I understood well ...
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1answer
1k views

No driver IC on net in Hyperlynx problem

I am getting the 'no driver IC on net' problem in Hyperlynx signal integrity software. Does anyone have any idea bout it? This is my PCB: It has an SMD connector and an AD9767 DAC. I have added the ...
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1answer
682 views

High-Speed PCB Design - Routing on Power Plane Layer?

I am working on designing my first high-speed PCB with 4 layers (in order): Top Layer: Single-ended/TTL signals Internal Layer 1: Power Plane (3.3V) Internal Layer 2: Ground Plane Bottom Layer: ...
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1answer
62 views

Predicting bit error rates for RF communications [closed]

I am trying to estimate what the approximate bit error rate for a given antenna configuration would be. Specifically, suppose I have two parabolic dish antennas pointed at each other. If they are ...
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0answers
423 views

How to reduce SPI bit errors between a Bus Pirate and a BIOS chip?

I need to eliminate bit errors when reading a BIOS chip using a Bus Pirate v3.6. The BIOS chip is still soldered onto the motherboard. I'm using a Bus Pirate probe set to connect the Bus Pirate to a ...
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2answers
327 views

Should we try to match the differential impedance of a CML pair, and if so, why?

Differential signalling 'traditionally' involves two conductors carrying equal and opposite signals, the data being signalled by the polarity. In this arrangement the majority of the current returns ...
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3answers
958 views

Does this layout ever make sense to do?

Let's say I've got an power output and I want to power a chips Vin's with it. But, let's say it's a couple of different digital Vcc's on the chip that I want to power, like a rail for an LO, a rail ...
5
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1answer
6k views

how to split audio with buffers?

I am split an audio signal coming from an op amp to both a line driver buffer and a VU meter buffer, as shown in the schematic. My trouble is in determining the correct placement and value of ...
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1answer
157 views

Find Power Spectral Density of given signal

I am given a question with very brief notes to study from. The question is this: Now I was wondering, are the following part of the notes relevant at all: Is this the appropriate method to solve the ...
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3answers
2k views

Why does the capacitance on a line disappear when properly terminated?

Came across an Adafruit interview with the one and only Paul Horowitz and he said something interesting. Part of interview thats related to this question He said in more or less words that the ...
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2answers
257 views

Issue with circuit design 10x probe

I designed a board to mux 16 inputs into a 4 channel scope using relays. I also included circuitry to replicate a 10x probe on the board. That is, I placed a 9M ohm resistor in parallel with a 1.4pF ...
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3answers
269 views

How to terminate switching transistor for level change?

For a typical driver, I would add a series termination resistor to terminate the line. But what would be the correct way to terminate when a transistor is used to level shift a 3.3V/5V signal to some ...
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1answer
361 views

Why does cable length matter so much when source is high impedance?

My beginner’s electronics book has now started to teach me about microphones, specifically Electret microphones. While searching the web for more info, I stumbled upon an article where the author ...
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1answer
3k views

PCIe, diagnosing and improving an eye diagram

I have implemented a design that uses PCIe. It is somewhat different in that the PCIe interface is used as a chip-to-chip communication lane on a single PCB (e.g. no PCIe connector). The root ...
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1answer
114 views

How do I determine if the clock signal suffers from high speed effects

I need to determine if the clock signal inside a multichip module shall suffer from high speed effects i.e reflection and ringing. I have: (1) IBIS models of the components inside the multi-chip ...
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2answers
192 views

Where do all the PDN capacitors sit?

I have my voltage rails coming off board and I have quite a number of ICs. Each has their own decoupling and for the really demanding ICs I have a bulk capacitor. If I have some target impedance and ...
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1answer
3k views

Trace Dimensions limitation for JTAG signals

I have a JTAG bus that I need to go over PCB (or could make cable) for about 12 inches. I am trying to figure out the signal integrity specs for the JTAG bus ... what trace width vs. trace length I ...
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2answers
1k views

Is it possible to physically measure the input and output impedance of a component?

Input and output impedance is an important property of complex electronic components. Is it possible to physically measure them like we measure resistance? Is it possible to measure it for BJT based ...
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3answers
10k views

Physically, what is and how to, make an anti pad?

Consider the following later stack (it's only the top 3 layers of an 8 layer board) Top Signal Layer Plane Signal Layer I have a high frequency trace that is being routed on the top layer and I need ...
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1answer
197 views

How subtle or dramatic are the effects of a impedance mismatch by a certain percentage?

If a trace is designed to be 50 ohms, how much of an effect would 10% or 20% mismatch between line impedance and termination values ? For instance, a 50 ohm line with 45 ohm or 55 ohm series ...
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1answer
2k views

SPI Bus Termination Issue

I've been working on a project where an OMAP Linux SPI master interacts with 6 SPI slaves peripherals (5x A/D converters and single magnetometer). I can set the SPI clock frequency and have ...

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