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Questions tagged [soc]

A system on a chip or system on chip (SoC) is an integrated circuit (also known as an "IC" or "chip") that integrates all components of a computer or other electronic systems. It may contain digital, analog, mixed-signal, and often radio-frequency functions—all on a single substrate. SoCs are very common in the mobile computing market because of their low power consumption. A typical application is in the area of embedded systems.

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General purpose system integration tool for FPGA/ASIC system on chip design

Intel/Altera Quartus offers Platform Designer (formerly Qsys and SOPC Designer before that). Xilinx offers Block Designers in their Xilinx Vivado. Microsemi offer SmartDesign in their Libero SoC. In ...
gyuunyuu's user avatar
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Issue with Running Two Separate Codes on Intel Cyclone V SoC ARM Cortex A9 Dual Core via QSPI

I am working on an Intel Cyclone V SoC ARM Cortex A9 Dual Core setup and aiming to execute two distinct codes on Core 0 and Core 1 in bare-metal mode. While I've successfully executed this setup using ...
Support's user avatar
8 votes
5 answers
3k views

Is creating a voltage rail loop good or bad practice?

I am still new to PCB design but I often run into this. Say I have a USB connector on the bottom of a board, a SoC on the top, an LDO somewhere in the middle, and miscellaneous stuff on the sides. It'...
Kez's user avatar
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SOC booting FPGA configuration file

I have some understanding on embedded system booting process, which includes step wise execution of: ROM boot loader. First stage boot loader - internal to SOC. Second stage boot loader - stored on ...
Blrk_hw's user avatar
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1 answer
160 views

Help with selecting charging IC for LiPo battery charge management

I have a project for which I have a 1 cell LiPo battery, and of course I need a BMS to monitor it and charge it/ensure it doesn't get discharged too far. I also want LED indicators to inform of the ...
Arthur Isnt original's user avatar
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1 answer
66 views

How to find BOOT-SEL GPIO PIN?

I'm new to embedded linux and trying to explore it using Allwiner T113-i EVB. Right now I'm struggling with boot process. According to user manual BROM of SoC will try fetch boot code from SD card if ...
savin poster's user avatar
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0 answers
135 views

What tool is required to implement data transfer between PS and PL of Zynq 7000 SoC?

I am new to embedded programming. I undetstand a little bit what Vivado and Petalinux does. But I would like to how exactly I can use Vivado and Petalinux to perform data transfer between ...
Creator's user avatar
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1 answer
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What's the best RF scheme and chip for my project?

I'm making a little scanning beacon gizmo. When a laser shines on it from ~40m away, it is supposed to transmit its ID and HIGH (1) to the laser controller ~40m away. Otherwise, transmit 0 or nothing. ...
Popeye's user avatar
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7 votes
2 answers
988 views

Why are the challenges in using SRAM over DRAM for main memory?

Historically, when compared to DRAM (dynamic ram), SRAM (static ram) is more expensive with a lower density, but it's much faster and more efficient. As a result, SRAM is reserved for devices, such as ...
user148298's user avatar
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Can we service another memory request from L1 cache when an L1 miss is being serviced from L2?

Consider the case where L1 cache miss occurred and is being serviced by L2 cache which could take many cycles (may go to main memory in case of L2 cache miss). In the meantime L1 cache is idle, in ...
HWDesigner's user avatar
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3 answers
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"ERROR: [DRC RTRES-1] Backbone resources: 1 net(s) have CLOCK_DEDICATED_ROUTE set to BACKBONE but do not use backbone resources." in newest Vivado

I am following section "Baseline Vivado project" in page 165-170 of book "Architecting High-Performance Embedded Systems: Design and build high-performance real-time digital systems ...
zzzhhh's user avatar
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-1 votes
1 answer
83 views

Which kinds of embedded platforms can be considered well-suited for acquiring a general taste of interrupts? [closed]

I'm an application programmer without much knowledge in low-level programming. I've set up a basic toolchain for assembly programming with the ATMega328P on an Arduino Uno R3 board. One of my aims is ...
Piovezan's user avatar
  • 133
1 vote
1 answer
47 views

How to sample the read data from blocking logic safely by using the interface of SystemVerilog?

I'm trying to read data from combinational logic. module my_reg(; ... output reg [31:0] rdata; ) .... always @(data) rdata = 32'h18; and this dut's value ...
Carter's user avatar
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1 answer
256 views

How to monitor the HWDATA and HRDATA in AHB-LITE on the all clock?

I'm trying to monitor the HRDATA and HWDATA on the AHB-Lite bus transfer. The monitor message should only appear when a command(...
Carter's user avatar
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1 vote
0 answers
50 views

Model Microcontroller's Power Consumption

I am currently building a simulator (time-domain model) that includes a System-on-Chip, a constant voltage source and a series resistor. Current solution: My initial intuition was to model the SoC's ...
MoTex_42's user avatar
4 votes
2 answers
752 views

Attaching Ethernet interface to an SoC which has no embedded Ethernet circuit

We are developing an ARMv8 processor based SoC which doesn't have ethernet IP inside. Now it's in FPGA form. Currently I'm using SD card interface to load Linux and file system. But during the ...
Chan Kim's user avatar
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1 answer
148 views

On Chip Peripheral Emulation - How to accomplish communication with an emulated peripheral that relies on bidirectional signals in between?

I recently asked some questions for an application in hope to gain more clarity on how to accomplish an emulation of an input device peripheral (in my case an input mouse) in simulation. Following ...
Vahe's user avatar
  • 171
2 votes
1 answer
838 views

Relationship between PSEL and PENABLE signals in the APB protocol

I would like some clarification on the relationship between the PSEL and PENABLE signals in the APB Protocol. The specification states: The PENABLE signal is asserted the following clock after PSEL ...
P Ksagar's user avatar
0 votes
1 answer
102 views

Connection of two devices

I need to design an Ethernet interface. Requirements: It should have two RJ45 connectors at 1Gbps data rate and two fiber-optic at 1Gbps rate. The system has two SoMs (Kria K26) and each one should ...
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1 answer
202 views

Regarding RTC drift

Basically there are two RTCs: 1.internal RTC 2.external RTC Internal RTC has no battery backup whereas external RTC has CR2032 battery to maintain time in absence of power supply. For accuracy ...
happy's user avatar
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132 views

Difference between Internal and External RTC [duplicate]

what is the difference between internal and external RTC ?
happy's user avatar
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0 answers
231 views

Battery nominal capacity estimation using Coulomb Counting and Matlab lsqnonlin

I'm trying to estimate the nominal capacity of a PV plant battery pack collecting SOC data from the BMS using current discharge. Once I've collected current, time and SOC data I put those data into ...
slow_breath's user avatar
1 vote
0 answers
86 views

Unable to get frequency on oscilloscope

I am using NOR flash IS25WP256D in my project. I configured a frequency of 80 MHz and a bus width of 4 in DTS, but when I observed with an oscilloscope I got 62 MHz. Why does this happen? These are ...
Chithra M G's user avatar
0 votes
1 answer
82 views

RTC counter wrap mode

In the synopsis of the datasheet for RTC we have one feature i.e. counter wrap mode My understanding for this feature: RTC is 32-bit, i.e. \$\ 2^{32} = 4295947296\ \$ seconds counter will increment ...
Sukanya U's user avatar
1 vote
2 answers
226 views

Adding a Bluetooth Peripheral to an STM32

I'm making a device that is powered by an STM32F072C8Tx. I want to add a bluetooth peripheral to this that can connect to the computer as a HID and transmit keypresses. I've considered swapping the ...
ScottishTapWater's user avatar
0 votes
1 answer
203 views

Does many VCC pins for an SoC need many decoupling capacitors?

I have been recently interested into creating my own CC2530 board for a Zigbee device and was following the sample schematics provided by TI. I am a newbie to board design and have some basic ...
Bishoy's user avatar
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0 answers
73 views

OTA via BLE on Cypress CYBLE-222014-01 Module

I have developed an application using the CYBLE-222014-01 module which acquires a set of data and transmits it over BLE. Now I would like to add OTA functionality to this project, however the ...
Chris_26's user avatar
0 votes
1 answer
512 views

CR2450 Battery SOC vs. Voltage

Just purchased some Maxell CR2450HR batteries off AliExpress for my TPMS sensors. Don't know how long they have been in storage. Is there a way to check how good these batteries are? Measured the open ...
SunnySky's user avatar
1 vote
1 answer
151 views

What is the easiest way to replace a design inside an Intel Cyclone SoC? [closed]

I would like to integrate my VHDL submodule to the FPGA fabric of an Intel Cyclone SoC and make it communicating with an App on its Linux. There is lot of documentation on the internet but I am not ...
dsp_curious's user avatar
-1 votes
1 answer
313 views

Does the AXI interconnect need to subtract the offset address after decoding operation is done

The Address decoder in the AXI interconnect will based on the incoming address to determine which slave device to be targeted to. Question is does the AXI interconnect need to subtract the offset ...
Learner's user avatar
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0 answers
340 views

Communication between two ARM chips over PCI-e

I have a LX2162A CPU from NXP (datasheet is here), and 2 I.MX8.Quad, also from NXP (Datasheet is here) My goal My goal is to design a NUMA enabled system. A single instance of a mainline linux will ...
Seany's user avatar
  • 101
0 votes
1 answer
86 views

What happens when there are multiple Read requests to the same address in AXI3/4? Does RVALID assert each time?

Basically the title. I am trying to do a verification on an AXI4Lite protocol. If I try to send a read request to the same address multiple times the RVALID is not re-asserted. Correct data just ...
user2875251's user avatar
1 vote
0 answers
61 views

How to convert from Avalon-MM 128-bit to 48-bit IF?

Some Intel FPGA DDR memory controller only offers 48-bit Avalon-MM IF, when implementing the hard External Memory IF (EMIF) controller. For connection from a 128-bit Avalon-MM IF, it is therefore ...
EquipDev's user avatar
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1 answer
208 views

Xilinx Zynq7k 020 linux, error when compiling u-boot

I get the following errors when compiling u-boot (SoC Zynq7k 020) What I did: git clone https://github.com/Xilinx/u-boot-xlnx.git ...
Chip115's user avatar
  • 111
0 votes
1 answer
76 views

How to read 36 v 10 Ah Li-Ion battery voltage and current(percentage)

How to read 36 V 10 Ah Li-ion battery voltage and current(percentage) with ESP32.
Sagar Parmar's user avatar
1 vote
2 answers
652 views

Techniques to develop software and hardware of a SoC in parallel

Hardware development takes a lot of time to develop. If a company is building a System-on-chip (SoC), the RTL model of the SoC is only available after the RTL integration is complete. This requires ...
Shashank V M's user avatar
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1 vote
1 answer
175 views

Two pins on ADV7123 Video DAC is tied to ground

Apologies if the question doesn't make any sense. I'm self-taught and very new to Electrical Engineering. I'm working on a little project with a DE1-SoC FPGA development board and found out that the ...
EDToaster's user avatar
  • 113
-1 votes
2 answers
105 views

Secure Access Module (SAM) connected directly to MCU bypassing the reader IC

I have been trying to design an NFC Reader using a Quectel SC60 module with a Secure Access Module (SAM) interface. The problem is that in the reference design, the SAM is connected directly to the ...
Curious Cosmopolitan's user avatar
0 votes
1 answer
372 views

The datasheet says that USB operates on 1.8v instead of 3.3v, do I need some sort of logic level shifter in my circuit?

I'm trying to design a breakout board and connect the Google coral chip to my Toradex Colibri imx6 SoC via usb. I'm assuming that the imx6 is using 3v3 logic because it doesn't indicate otherwise, and ...
Luc Charbonneau's user avatar
1 vote
0 answers
216 views

Can I use eval boards for SoCs that support dual-role USB for prototyping a USB3 peripheral?

I have recently started prototyping a custom USB peripheral that I would find very useful in my work if it existed. I made the extremely crude proof-of-concept version using an Arduino Due, its native ...
pmdj's user avatar
  • 111
1 vote
1 answer
1k views

What is the difference between Bare metal, RTOS and SoC? [closed]

Having just recently gotten into embedded programming using PIC microcontrollers, I am trying to understand the difference between Bare metal, RTOS and SoC. Online searches reveal contradictory ...
aLoHa's user avatar
  • 597
3 votes
4 answers
427 views

Why is NMI commonly pulled high on many ARM SoC schematics?

I've noticed that "AP-NMI" is pulled high on several ARM SoC schematics, and it is pulled high by the real-time clock (RTC) voltage, which is an always-on power domain (battery backup). Why ...
Drakes's user avatar
  • 259
0 votes
1 answer
146 views

Is there a socket for SOP8 packaging with SOP8 pins? [closed]

25Q128 is a flash memory for an IP camera. I want to dump its firmware but also try to write my own firmware. I have all the soldering equipment to remove it safely. I also bought the breakout board ...
Guerlando OCs's user avatar
0 votes
1 answer
489 views

Where is the flash memory for this IP camera board?

I just opened an Escam IP camera and this is the main board. You can see the HI3516 SoC + H5TQ1G63EFR RAM + that thing with adhesive that in the second photo I took off and you can see it's a ...
Guerlando OCs's user avatar
1 vote
1 answer
7k views

How to implement Clock Gating Style RTL into synthesis?

I'm studying to implement a Clock Gating in RTL. So I've followed as the below https://www.design-reuse.com/articles/23701/power-analysis-clock-gating-rtl.html ...
Carter's user avatar
  • 619
0 votes
2 answers
230 views

Programmable Microcontrollers vs. SoC Devices [closed]

Context: I essentially don't have a strong electrical engineering background. My knowledge consists in playing around with Arduino based microcontrollers or Raspberry Pis or equivalent SoCs. Question:...
image357's user avatar
  • 101
0 votes
0 answers
182 views

Embedded Linux Project on Qualcomm Snapdragon S2 (MSM8655)

I have my old blackberry 9900 device, I am interested to start a project of modifying and installing linux inside. To do so I need user manual of the processor (which is turning out hard to find) even ...
GENIVI-LEARNER's user avatar
26 votes
15 answers
12k views

Is there a theoretical possibility of having a full computer on a silicon wafer instead of a motherboard?

I have not seen a single reference where a whole computer is built inside a chip itself instead of modularizing and spreading it on a board. I acknowledge that having modular parts enable versatility, ...
user0193's user avatar
  • 436
0 votes
2 answers
37 views

How would it be possible to avoid contention for a Network on an SoC (or more specifically an FPGA) from two or more nodes?

In a classical chip, you have a main CPU to perform general processing and it acts as the master on a some bus and other slaves (IO, Memory) usually do not send command or data autonomously. (or at ...
Cit5's user avatar
  • 245
0 votes
1 answer
61 views

MDIO bus max fanout

I know that the maximum number of devices that can be connected via MDIO bus is 32. But how to determine the real maximum fanout of MDIO bus. I mean I have a PCB (6U size) that has AM335x SoC driving ...
Andy's user avatar
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