Questions tagged [stability]
The ability of an electrical circuit to stop oscillating within a finite period of time. Related topics include the Nyquist stability criterion (and the associated Nyquist plot), Bode plots, and gain and phase margin.
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Stability problem in unity-gain opAmp
As a part of a controlled power supply for hardware-in-loop testing for a student driven project, I had to develop a current buffer (voltage follower) which could source up to 1 A.
I had the (bad) ...
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Stability of input filter in SMPS - Theoretical explanation
I read the Application note Wurth Electronics ANP008c about negative resistance of a SMPS input and how to avoid oscillation when using an input LC filter. I'm asking for a theorethical clarification ...
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Choosing resistor values for inverting amplifier and why?
The gain here is A = -Rf/Rin. However, lets say I want a gain of 10 V/V. Which resistor value would you choose and why?
I know that you could have infinite number of combinations for these resistors ...
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Amplitude stabilisation of LC oscillators
Like diode stabilisation and FET stabilisation in RC oscillators, what methods are used for the stabilisation of amplitude in LC oscillators? I have found it very difficult to obtain a clean sinewave ...
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What is noise gain, really? And how is it determined in the general case?
UPDATE: This question triggered what might fairly be called a research obsession for me. I've gotten pretty close to the bottom of it I think, I've posted my findings as an answer below.
There was a ...
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Why are low-dropout (LDO) voltage regulators unstable?
LDO regulators based on P-type transistors seem to be the preferred form of linear voltage regulator today, but I keep hearing about how I have to choose the output capacitor(s) carefully to guarantee ...
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Conditional stability
I'm learning about op-amps and feedback and how feedback affects their stability. I've been reading about gain and phase margin and their uses when I came across this:
I don't quite understand how ...
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Converting and Stabilizing output voltage of a dynamo hub
Preface - I don't know much about electronics :P
I have ordered a Shimano dynamo hub for my bicycle. I have done a little homework and here are my findings about it:
The output of the above ...
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Switching frequency and controller's crossover frequency in DC-DC converters
In the context of control loop stability of DC-DC Converters,
A switch mode power supply is essentially a sampled-data system, therefore the theoretical maximum bandwidth is one half the switching ...
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Gain margin and Phase Margin Physical Meaning
I have been trying to understand the physical concept of Gain and Phase Margin.
What I understand about this is that a relative comparison around the critical point \$(-1,0)\$, which when converted ...
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How to determine a system is stable using pole zero analysis?
To my knowledge, as long as the poles of the transfer function are in the left half plane, then the system is stable. It is because the time response can be written as "a*exp(-b*t)" where 'a' and 'b' ...
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Are film capacitors affected by DC bias?
After looking around, I have found quite a few things about how DC bias reduces effective capacitance for a ceramic, or electrolytic capacitor, however nothing seems to talk about the effect on film ...
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Can there be "too much" capacitance on a buck regulator output?
I've an MPM3610 buck regulator module with an integrated inductor of 0.47 µH and a fixed internal compensation. It employs constant-on-time regulation. The datasheet gives some application ...
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Non-inverting op-amp configuration with capacitor
I don't really get what is the purpose of the capacitor C1 which is connected in parallel with the feedback resistor. After my knowledge, if we modify the input signal frequency the over all gain will ...
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High-stability oscillators (non-crystal)
Are there any high-stability oscilators, which are not crystal based, given that temperature is stable down to 0.01 C and voltage down to 0.001V?
Will LC-based oscillator be able to show performance ...
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Effect of zeroes in system stability
Suppose we have two third order systems (a and b), with three poles and two zeroes,poles for both the systems are at the same positions in frequency domain but these systems differ in the placement of ...
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Choosing a Tantalum based on Min. ESR - LDO Stability
How does one go about choosing a capacitor for a LDO regulator which specifies a min. ESR? Capacitor datasheets that I've seen only contain the Max. ESR parameter. One could just choose a cap with a ...
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Can a 7805 ever oscillate?
I see many references to input and output caps helping with "stability" and some outright references to preventing oscillation in both answers on this site, and even in some data sheets. I also have ...
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Why is my op-amp oscillating?
I am attempting to build the following circuit using an LM6171 op-amp. I know that this op-amp is unity-gain stable. I previously had this circuit working with an LT1637 op-amp, but I had to switch ...
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BIBO and impulsive stability in voltage-controlled electrical circuits
Branching from the comments here, TimWescott gave this example of an open-loop unstable electrical system:
Find the nearest NPN power transistor. Put it in a circuit with a healthy (for it) voltage ...
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Torque-Slip Characteristic Stability Analysis for Induction Motor
I am having confusion for this stability question of induction motor.
The real question is here
I searched and searched online, keep reading and reading, but still not enough to answer my doubt.
My ...
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What frequency stability crystal do we need?
We're designing a simple digital clock and using a 32.768 kHz crystal with a frequency stability of 20 ppm (standard off-the-shelf SMT).
We're finding the clock is running fast by about 2.5 minutes ...
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Does this voltage regulator use "on-off" control, or is it a voltage follower?
In Electronics A2 (GCE), we are currently studying voltage regulators.
An example voltage regulator circuit is provided using an op-amp and a power MOSFET.
I would judge this to be a voltage ...
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Limiting Output Voltage of the Opamp-to avoid saturation
Problem:
my photo diode recieves pulses of width 10ns-150ns and repeating at rate of 1Hz-50KHz
the current from photo diode depending on incident light can go from 10nA-100mA,
in a nutshell, my ...
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Understanding in-loop compensation for capacitive-loaded OpAmp
I'm trying to understand the in-loop compensation for a simple amplifier loaded with a capacitive load, as seen in this article from Analog:
http://www.analog.com/library/analogdialogue/archives/38-...
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How to calculate aging tolerance of Resistor?
I wanted to calculate the worst case minimum and maximum value of Resistor 1K by considering all the
tolerances(initial tolerance,temperature,environmental factors and aging).
Here is the link for ...
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Why is phase margin considered more important than gain margin in dc-dc converters?
Control theory text books say both gain margin and phase margin give information about relative stability. These quantities also give an idea about the corresponding closed loop system's transient ...
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Why does this PMOS LDO require no compensation to be stable?
LDOs with PMOS pass transistors are prone to oscillation due to positive feedback problems as discussed e.g. here.
Now the below simple circuit is basically a PMOS LDO, but seems stable in both time ...
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Positive feedback and unstability
In Wikipedia's positive feedback article it is stated that given the closed loop gain $$A=\frac{a}{1-af}$$ the system is unstable if \$af>1\$.
I don't really get this. If \$a=10\$ and \$f=0.5\$ (...
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Systems stability with zero poles
I have a rather simple question I would say.
I know that systems having real poles to the right side of the plane will inevitably be instable (for LTI systems at least).
But I'm confused with ...
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Op-amps and Capacitive Loads
I understand that having an capacitive load at the output of an op-amp can potentially make the circuit unstable. However, how can I go about calculating this?
For instance, I'm trying to design a ...
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Understanding on frequency compensation on driving capacitive loads with an op-amp
I am trying to understand an example circuit of frequency compensation on driving capacitive loads with an op-amp from:
https://www.allaboutcircuits.com/technical-articles/how-to-drive-large-...
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Why 60% overshoot with 55° phase margin?
UPDATE: Based on the answers I received, I got this working beautifully. There's a full outcome report in one of the answers below.
I'm working through the design of an electronic load, basically a ...
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Resistor parallel to optocoupler LED in Zener-stabilized circuit
I was watching a video about phone chargers where the following schematics was presented:
simulate this circuit – Schematic created using CircuitLab
In the video it was stated that this ...
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What does it mean for amplifiers to be stable only down to N gain, where N > unity?
This is related to
What's special about "unity-gain stable"?
which is about unity gain stability.
But what exactly does it mean if some op-amp is said to be only stable to, say, gain ...
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Why is this integrator unstable?
I am trying to convert an acceleration signal to a velocity signal using an integrator. After building the circuit, it turned out to be unstable: With no signal at the input (...
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Transimpedance amplifier calculating feedback capacitor
What is the correct way to calculate \$C_F\$ of the transimpedance amplifier? Since I have seen two different documents, and each has a different way to calculate it.
These two documents are:
Akshay ...
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What can be inferred from the frequency an op-amp is oscillating at?
For whatever reason, I seem to create a lot of oscillators in the course of developing circuits involving op-amps.
I'm wondering if the frequency of oscillation, which normally appears to be quite ...
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Delay and Stablity in Negative Feedback Systems: Confusion
Below is a block diagram that shows an op-amp in negative feedback with feedback network made from resistive divider:
The encircled block is Op-Amp with 1 and 2 as its inverting and non-inverting pin ...
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Op amp driving a LED oscillates, how to stabilize?
I have a simple LED driver circuit like this:
simulate this circuit – Schematic created using CircuitLab
The op-amp is OPA354
250-MHz,
Rail-to-Rail
I/O, CMOS
Operational
Amplifier supplied ...
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Crystal's ESR or Frequency Stability/Tolerance, which is more of a priority?
I'll be using a 12MHz crystal, CL=20pF on an NXP chip. Currently choosing between lower ESR (60ohms vs 100ohms) or lower stability (50ppm vs 10ppm). Which spec is more important? Should I choose a ...
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Open loop system instability
I'm studying system stability, and I know a closed loop system can be unstable due to the feedback. I also know that an open system can be BIBO unstable (e.g., a capacitor with a direct current input)....
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AC analysis of SMPS shows instability. How to modify the analysis to reflect the transient stability?
Background
I have designed a switch-mode power stage with voltage-mode control that uses an LCLC filter in its output to obtain a very low ripple output voltage.
I have empirically arrived at a ...
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How do I determine \$R_o\$ for an op amp?
I understand that when driving a capacitive load with an op amp, the output resistance, \$R_o\$, of the op amp interacts with the load capacitor to form a low-pass filter, introducing a pole in the ...
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Why does smaller step show instability better?
I was stability testing a simple op amp circuit by applying a square wave to the input and looking for ringing etc. on the transitions.
I figured, hey, I'll give it a big whack, say from 0 to 5V, ...
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Securing a pcb to be used in a keyboard to its case
I'm looking for a way to secure a pcb I will be making for a cherry mx (homemade) keyboard to a case which I'll also be making. Obviously, I don't want the pcb to move. I could use standoffs/screws, ...
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Control Loop Stability - Crossover frequency
I am testing the control loop stability of a DC-DC Converter.
One of the Pass-criteria of the DC-DC Converter states, "Cross over frequency should not be higher than 1/8th of switching frequency"
...
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Problem stabilizing this PMOS LDO
I am considering a discrete LDO for a supply rail that needs ~\$m\Omega\$ impedance at 10 kHz.
While the following circuit does what I need (according to Spice), it becomes unstable if C2 is smaller ...
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Miller's Theorem Application [duplicate]
Miller's Theorem for a capacitor can be written as follows:
In the book 'Design of Analog CMOS Integrated Circuits' by Behzad Razavi, I read the following:
How does the author say that the ...
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HSPICE create a voltage source in top level and instantiate it in a .subckt
I am fairly new to HSPICE and I am investigating someone else's testbench and I am trying to track down where is the vsource generator used in the .lstb analysis in this testbench.
I am a bit ...
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