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Questions tagged [stability]

The ability of an electrical circuit to stop oscillating within a finite period of time. Related topics include the Nyquist stability criterion (and the associated Nyquist plot), Bode plots, and gain and phase margin.

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What could be the reason that one opamp oscillating but not the other?

This is ultimately related my previous question here. And I use the following circuit: When I try with this MCP opamp I get a DC output which I want since I want the average: But when I this OPA ...
cm64's user avatar
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12 votes
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Reasons for implementing op-amps which are not unity-gain stable

The datasheet for the OP37 boasts that the device is a low-noise, high-speed, precision op-amp. However, one reason why one may choose to not use the OP37 is that it is not unity gain stable. That is, ...
Math Keeps Me Busy's user avatar
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Switch Mode Power Supply Stability Analysis for Cascaded Converters / Filters, Loading Conditions

When putting switch mode supplies in series with each other, or adding an input filter to a supply, I have used the Middlebrook criteria to check for stability. Chris Basso's other stack exchange ...
ardarn's user avatar
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Micro switch capacitance on the inverting input pin of operational amplifier

I want to use a microswitch on the inverting pin of my transimpedance amplifier to be able to select two different channel of my transducer as follow: It the microswitch datasheet in is mentioned ...
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Confusion with the sum of open-loop gain and feedback attenuation

Regarding the following statement taken from here: Looking at amplitude response on the log plot, circuit instability occurs when the sum of open-loop gain and feedback attenuation is greater than ...
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Capacitance on op-amp input (inverting pin)

I have the following configuration for my amplifier, which is an transimpedance amplifier: I need to connect my transducer to the inverting pin of my amplifier by using a dip switch to be able to ...
Andromeda's user avatar
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How to measure overshoot of an op-amp without having an oscilloscope

I need to measure the overshoot of an op-amp but have no oscilloscope or other measuring device available. I should therefore have a circuit to do so. I have created an input pulse and want to apply ...
Fateme's user avatar
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Filter non-inverting input of operation amplifiers or directly to GND?

In the following configuration on this operation amplifier (OPA838), which is transimpedance configuration, can I connected the non-inverting input directly to GND, or should I use this filter? Not ...
Andromeda's user avatar
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small signal overshoot reported in datasheet and stability

In datasheets of some op-amps namely ADA4522, NE5532, OP184 a small signal overshoot percentage has been reported mostly for an input pulse of 100mVp-p in a unity gain configuration. As far as I ...
Fateme's user avatar
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Choosing isolation resistor for Op-amp output

I want to choose an accurate value for an isolation resistor for my OP-AMP (OPA838). Based on the datasheet, the OPA838 is very sensitive to capacitive loads and needs an isolation resistor added to ...
Andromeda's user avatar
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Bode criterion for stability - applicability conditions

While checking Bode criterion for stability, I found several sources disagreeing on what is needed to be able to use it. In general, every source I checked agrees that the open-loop system must be ...
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Confusion about finding poles by inspection

I have a few doubts regarding finding poles by inspection and why sometimes the 'quick, intuitive' techniques do not work. Question 1 Consider the circuit shown in figure 1 below: By manually writing ...
AlfroJang80's user avatar
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Connecting an op-amp to a second-stage amplifier: loading effect considerations

I designed an amplifier with an OPA838 as follows: First scenario: I want to connect the OPA838 to a next stage voltage LNA (Low Noise Amplifier). What components or circuit should I add to my output ...
Andromeda's user avatar
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PCB layout recommendation for Op-Amp [duplicate]

When designing a PCB for Op-amps normally there are some guidelines in the datasheet of the device. For example, for OPA838 the suggestions are: Signal routing must be direct and as short as possible ...
Andromeda's user avatar
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Why is a peak in the gain a sign of instability in a closed loop op-amp circuit?

I watched a tutorial video that mentioned that when there is a peak in gain (dB), it is a sign of instability in the op-amp circuit. Is this statement always correct? If yes, can any one please ...
Andromeda's user avatar
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Adding a capacitor to the output of an op-amp can cause instability? (PCB trace capacitance)

In my amplifier design, I checked all the possible issue for finding the instability problem in my previous post: Transimpedance amplifier with OPA838 - oscillation - supply voltage , Transimpedance ...
Andromeda's user avatar
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Adding a capacitor between positive and negative supply pin can cause stability issue in OpAmp circuit?

I have a transimpedance amplifier designed and when I apply +/- 2V to its supply pins it is oscillating, I noticed when I apply GND to V- supply pin, it does not oscillate, so I have a little bit ...
Andromeda's user avatar
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Nyquist stability criterion in discrete time domain

I've been transforming systems from the s-domain to the z-domain, and looking at the Nyquist plots I get in the z-domain. So far I've assumed that the Nyquist stability criterion that applies in the s-...
Mr Phase Locked Loop's user avatar
2 votes
1 answer
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How to test the stability of an OTA in this case?

I am designing an OTA for a current buffer (images from Analog Design Essentials): The OTA is just used to provide a high gain, to regulate the voltage on RE. My question is, how to test the ...
Jack Black's user avatar
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About stability in system with loop gain AB>1 in negative feedback

I have been reading about stability and feedback systems, and a very silly issue has appeared. We can describe a negative feedback system as what can be seen in the following picture: Image source: ...
Taela Shanthi's user avatar
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Stability of a constant current sink( opamp+nmos)

I am using opamp and a mosfet as constant current source. My current is from 0mA to 25mA. Opamp-TLV9002 (GBW-1Mhz at 5v , phase margin - 78deg at 5.5v and gain as 1 ) Mosfet- nmos- Bss123lt1g ( input ...
funtastic rdj's user avatar
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Injection point for stability analysis

According to the application note from OMICRON, for making good stability analysis of a converter, it is necessary to place the injection point at a certain place on the board : Does anyone know why ...
Jess's user avatar
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1 vote
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Does pole-splitting narrow or widen the bandgap width?

Razavi gives the answer of why the compensation capacitor should not be placed between the gate and drain of M3 transistor. Below are the quotations of his question and answer: Question: Explain why, ...
Tong Su's user avatar
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Poles of system seem counter intuitive

I have a system with the three poles 0+8i, 0-8i, and -0.5. When I input a sinusoidal signal, this is the output: Based on the poles, -0.5 is in the left side of the plane so it should be stable. +8i ...
newbie's user avatar
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How to compensate this circuit? [closed]

I'm using the circuit above to control the common-mode voltage of the 2 resistors. M16 is a current source. The OpAmp controls common-mode voltage by adjusting the resistance of M20. I need to adjust ...
Jack Black's user avatar
2 votes
1 answer
89 views

Stability issue: Compensation changes using Bode plot in LTspice

I am encountering issues with a LT8390 design, particularly in higher load current conditions, which leads me to suspect a stability problem. The design parameters are as follows: vin 18-36 (28v ...
chami's user avatar
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Transimpedance amplifier: weird simulation results

I am working on a photodiode transimpedance amplifier based on an OPA2374 and decided to simulate it in TINA TI. However, several unexpected issues arose. AOL and GBW product vary significantly with ...
Virgil_Tibbs's user avatar
1 vote
2 answers
118 views

Fundamentals of electrical circuits. Practice problem 16.13 Network Stability [closed]

I have this question from my Electrical Electronics textbook. After repeated efforts I still can't manage to solve it and the textbook doesn't provide enough information to be able to solve this ...
Olalekan Adekanmbi's user avatar
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Continuous Time LTI system stability confusion

It is understood that if ROC of the transfer function of a system doesn’t not contain the \$j\omega\$ axis, then the system is unstable. I also know that if the transfer function of the system has any ...
McSuperbX1's user avatar
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How is a resonant bandpass filter similar/different from a damped mass-spring oscillator? They seem to behave different in testing

Background I am using resonant bandpass filters as musical oscillators. One can excite an array of them at harmonic frequencies and given Q values for a note by, for example, running a burst of noise ...
mike's user avatar
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1 answer
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Avoiding overshoot in step response for robustness

In Systematic Design of Analog CMOS Circuits (Jespsers, Murmann) page 343, the following is stated in the context of where to place the non-dominant pole in a second-order loop transfer function of a ...
Halleff's user avatar
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2 answers
216 views

Exponential stability of a general \$RLC\$ circuit with sinusoidal input

I conjecture that any \$RLC\$ circuit with \$n \ge 0\$ independent sinusoidal voltage sources of the same frequency is exponentially stable. How to prove this or if this is not true, how to modify the ...
Sgg8's user avatar
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Any standards or limits for Voltage Angle value of MV system?

Are there any standards or regulations that specify allowable range or permissible limits for voltage angle value? For example, 7° of voltage angle exists at MV voltage level, so is it harmful for ...
Komilkhon Alovitdinov's user avatar
1 vote
1 answer
65 views

Allowable process variation for non minimum phase plant

Scenario (plant model subject to process variations) Consider a plant \$P(s)\$ in series with a controller \$D(s)\$ with a negative feedback path around it, where the closed loop is given by the ...
Mr Phase Locked Loop's user avatar
1 vote
2 answers
150 views

LTspice IV: Stability of op-amp circuits

I am studying the stability of op-amp circuits using LTspice with the help of this video. I can see many threads on Stack Exchange like this one, but the explanation is not clear to me. I have a ...
Confused's user avatar
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6 votes
3 answers
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Low LDO output capacitance (stability)

I need to replace the REG104 LDO (End of life) in a circuit where the max. allowed LDO output capacitance is 100 nF because of explosion proof intrinsic safety requirements. The REG104 LDO is stable ...
Stefan Wyss's user avatar
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1 vote
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Op-amp feedback and stability

I have 2 questions related to this circuit. 1 The first question concerns the open-loop gain. I am tasked with finding both the open-loop and closed-loop gain. The closed-loop gain is calculated ...
Aleat's user avatar
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2 votes
2 answers
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Potential issues with an alternative charge amplifier op-amp circuit?

Sorry in advance for a long question. I'm working on designing some pre-amplifiers to amplify signals from a Multi-Wire Proportional Chamber for a nuclear physics experiment. Each signal from these ...
Migue's user avatar
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Phase shift at half the switching frequency of a dc-dc converter

I would like to know if, regardless of the control loop used (Voltage mode control, average current mode control, peak/valley current mode control), there is always a 90-degree phase drop at FSW/2 due ...
AnalogMan's user avatar
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Can an RCL circuit be asymptotically unstable? If so, what does that mean physically?

I'm analyzing the asymptotic stability of the system of ODEs that comes from an RCL circuit in series. Below is my circuit, with battery voltage \$u(t)\$, resistor with constant \$R>0\$, capacitor ...
travelingbones's user avatar
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0 answers
49 views

How to choose the value of the slope compensation?

I do not understand how RICHTEK as chosen its slope compensation. The article is here. The parameters of the buck are the following: Vin = 12 V Iout = 3 A Lout = 10 uH Fsw = 340 kHz Vout = 3.3 V The ...
Jess's user avatar
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2 votes
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SIMPLIS - Buck CM from C. Basso Website

I took from the website of Christophe Basso a simplis simulation. I have some questions about it to be sure to understand it. Here is the schematic of the simulation: It is a current mode buck ...
Jess's user avatar
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How is the number of crosses of -180 line calculated from the bode plot?

On the page 28/46 of the slide here: On the page 42/46: How are N_ and N_ equal to 1/2 here? I think it should have been N_ = 0 and N+ = 1.
internet's user avatar
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4 votes
4 answers
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Would a solderless breadboard be able to handle 20V without short circuiting?

Until I can get a 12V power supply, I'm left with using a laptop charger as a power supply for my solderless breadboard. Will the breadboard be able to handle it?
Natnael Belay's user avatar
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1 answer
128 views

How is this ADC voltage reference buffer not unstable?

See attached images. They show an ADC voltage reference buffer with 22uF of output capacitance, a graph of the OPA350 stability with capacitive load and isolation resistance, and an ADI document about ...
jvnlendm's user avatar
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1 answer
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Why will an ideal double integrator oscillator only oscillate at one frequency?

I am trying to learn about RF oscillators. Example 8.6 in the oscillator chapterof RF Microelectronics 2nd edition by Razavi asks to solve for the frequency and amplitude of the oscillation of an ...
VeryItchy's user avatar
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DC-DC current mode control frequency behavior

On a buck converter in average current control mode, for example, the inner current loop sees and manages the double pole created by the LC filter, and thanks to this the outer voltage loop is blind ...
AnalogMan's user avatar
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Amplifier matching network, biasing circuit, and stability consideration

In amplifier design, it is essential to achieve proper biasing for the desired operating conditions, ensure maximum power transfer through matching, and maintain stability of the device. But, I'm ...
Jung_Zheng's user avatar
1 vote
3 answers
192 views

Is this LDO instability a real problem or a model bug? [closed]

Here is an LTSPICE simulation for which I just have an LDO (ADP7118) in its recommended environment and some reasonable parasitics. It is unstable as you can see in the transient plot (showing the ...
bobuhito's user avatar
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1 answer
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Non-standard injection point to measure loop stability of SMPS

I have come across this document https://www.ti.com/seclit/ml/slup386/slup386.pdf , where injection points for stability measurement are discussed in Fig.26. For point 3 it says: "Because the op ...
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