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Layer stack up selection for better signal integrity

I need to find an optimized stack up from the signal integrity point of view. I want provide for all of my signal tracks an adjacent GND plane. I have the following candidates for my stack up, would ...
Andromeda's user avatar
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1 vote
1 answer
89 views

Layer stack up and impedance matching- 100 ohm

I have a 14 layer stack up as follows (the stack up is from EURO circuit): I need to provide 100 Ohm differential impedance for my LVDS on layer 7, currently by the information from the manufacturer (...
Andromeda's user avatar
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1 answer
61 views

Gerber files sequence [closed]

I have the following Gerber files from the manufacturer for order confirmation. As I inspected them, I have inferred that the order of the copper layers from top to bottom are tl, l3, l2 and bl. But ...
Semih's user avatar
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1 vote
2 answers
86 views

4 layer stackup with space constraints

I am a student and this is my first time doing a PCB. I am wondering if it's more optimal to designate both ground planes with the same net, or have them as DGND, AGND, and use a net tie. I have a ...
amill's user avatar
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2 votes
6 answers
205 views

What is the best 4-layer stack-up for lowest EMI susceptivity?

I plan to design a 4-layer board that will work on an industrial machine. This machine has AC motors driven by commercial AC drives on it. Since the earth ground is very weak at the place, they ...
Semih's user avatar
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0 votes
1 answer
227 views

JLCPCB Solder Mask Parameters for 4-Layer Impedance Controlled Stackup

I am a bit confused by the solder mask parameters, offered by JLCPCB on their Impedance Control page. There you can find "Coating Above Substrate C1", "Coating Above Trace C2", &...
Vulpecula's user avatar
3 votes
2 answers
315 views

PCB Build-Up and Stack-Up alternative for 8-layer PCB

I am looking at an open-source design for an NVIDIA Jetson Nano carrier board made by a company called AntMicro. See here The design is an 8-layer design with the following Stack-Up and Build-Up ...
Fadi EID's user avatar
1 vote
1 answer
127 views

Tight GND plane Pros and Cons

Imagine a typical 2Oz/1Oz, 4 layer PCB with a stack-up, Sig/Pwr, GND, GND, Sig/Pwr. Your typical trace width/space would be 0.2mm/0.2mm, and a prepreg Dk of ~4, ignore the Core. Fastest signal on the ...
Lpaulson's user avatar
  • 305
4 votes
1 answer
251 views

For a 6 layer PCB, what difference does it make if we use a CPCPC vs a PCPCP? (C is for core and P for prepeg)

I am working on a 6 layer PCB for motor control applicatin using Altium and the stackup being used is as follows: Sig GND1 PWR Sig GND2 Sig I am little confused regarding the correct order of core and ...
Umair Ali's user avatar
1 vote
0 answers
83 views

4 Layer PCB stackup (components on both sides)

I am in the process of designing a 4 layer PCB (components placed on both sides) with some specific constrains. I need to use the top layer as Ground plate and bottom layer as a signal layer. The ...
user14665305's user avatar
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0 answers
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Altium Layer Stackup - Not Loading Sierra Circuits Layer Stackup Export

First post. I am trying to load an exported XML file from Sierra Circuits: When I go to my Layer Stackup page in my project, then I go to File>Load Stackup From File... And it does not show any ...
Lin Crawford's user avatar
1 vote
1 answer
72 views

6-layer stack up: Optimal core/prepreg thinkness and coupling to GND

I'm designing my first 6-layer board using a SIG|GND|SIG+PWR|SIG+PWR|GND|SIG stack up. This is often claimed to be the best stack up online and in literature ...
Tim's user avatar
  • 133
4 votes
3 answers
641 views

PCB design for high-frequency differential lanes (PCIe and USB)

I have designed an M2 adapter which converts from KeyE to KeyM. Practically this means my board can be inserted into a KeyE slot, and it can host a KeyM SSD. Gray rectangle is the KeyM socket on my ...
Daniel's user avatar
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2 votes
2 answers
611 views

6 layer PCB stack up and routing strategy

I have a couple of questions about the stack up and routing strategy in a 6 layer PCB. I'm in the situation where all the important chips are on the top layer, so all the important tracks start and ...
Federico Massimi's user avatar
2 votes
2 answers
239 views

Optimal 4-layer stack up for high-density board

I have a question about designing a stack up for a 4-layer PCB with a high-density top layer. I know the optimal way to generally do this is to go for either 1 or 2 as these stack ups provide a good ...
Bradley Campbell's user avatar
1 vote
1 answer
78 views

Controlled impedance stackup questions

In this stackup (I know that it is not the best stackup but it is a general question,) if I choose to use controlled impedance on L4 (let's say 50 ohm), what is the ...
Knowledge's user avatar
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1 answer
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PCB Newbie Stackup understand questions

I want to design a board with 6 layers up to 1.8mm thickness,120ohm diff and 90ohm diff ,SE 50 ohm and the manufacturer sent me this stackup: 12 mil for SE-50ohm not too thick? what is the material ...
Knowledge's user avatar
  • 441
4 votes
3 answers
2k views

6-layer stackup

Edit 3: I used the following Stackup - in respect to recommendations provided by my board house and the responses to this question. This is a 6-Layer, 0.5mm thick, 1 + 4 + 1 HDI board (Copper ...
ElectronicsStudent's user avatar
2 votes
1 answer
1k views

Calculating minimum prepreg thickness to withstand high voltage difference between layers

I am considering doing a 4-layer PCB for a 3-phase system (400 V) for the first time (never done a high voltage board before). Because of mechanical constraints, I want the board to be as thin as ...
aaq's user avatar
  • 131
1 vote
2 answers
675 views

Controlled impedance signals and non-adjacent reference planes

When routing controlled-impedance differential signals (100 MHz) in the middle of a PCB, do the reference planes have to be directly adjacent? If no, is there any issue if there is another signal ...
shmueld's user avatar
  • 96
0 votes
2 answers
105 views

Which PWR routing strategy has the best return path for a SIG/PWR-GND-GND-SIG/PWR stackup?

I'm trying out the stackup SIG_ROUTE/PWR_ROUTE-GND_PLANE-GND_PLANE-SIG_ROUTE/PWR_ROUTE after reading of its advantages. How should I route power to components on the opposite side of the PCB? Here is ...
Luminaire's user avatar
  • 355
0 votes
2 answers
140 views

4-layer PCB Stack-Up Design [duplicate]

What is the best stack-up design and layer order for 4-layer PCB? Signal/Ground/Core/Power/Signal is a good stack-up design? Or Ground/Signal-Power/Core/Signal-Power/Ground is better? Which is the ...
jacks's user avatar
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1 vote
1 answer
237 views

A signal layer is "ignored" in Altium

In Altium 20, I have the following layer stack-up. When I try to route a track on layer 6 (Signal3) it jumps to the bottom layer and continues to draw on the bottom layer. When I draw a track on ...
Mubin Icyer's user avatar
1 vote
2 answers
1k views

2-layer and 4-layer PCB stackup

I wonder what stackup people here use when designing 2-layer and 4-layer PCBs. When I design a 2-layer PCB, I mostly use the top layer for signal and power. I put a ground pour around the signal lines ...
harmonica's user avatar
  • 673
2 votes
1 answer
546 views

PCB layout and stackup for space application

I've been tasked with the design of a PCB for a CubeSat project in my univesity and I'm trying to figure out exactly how the layout and stackup of my board should be done. The board I have to design ...
Luca Daidone's user avatar
2 votes
1 answer
396 views

Four-layer stack-up in PCB design

Folks, I am planning to design 4-layer PCB. I came across the following website which has excellent pointers: ...
Dwight Schrute's user avatar
0 votes
1 answer
179 views

Which PCB stackup is better for noise immunity and why? [closed]

Is a two layer board with a Signal plane and Ground plane better? Or is a four layer board with Signal, +Voltage, -Voltage, and Ground better? Why?
user256639's user avatar
0 votes
3 answers
456 views

How does the number of PCB layers affect the temperature of the board?

I understand that a PCB with the exact same circuit on a 2-layer board will get hotter than a higher number board: 4-,6-,8-layer boards. But, I have not been able to find the reasoning for this ...
KirchoffFanBoy's user avatar
0 votes
3 answers
924 views

4 layers PCB VIA and power plane

I’m working on a 4 layer PCB and this is my stackup: 1-TOP (signal) 2-GND (plane) 15-VCC (3V3 plane) 16-BOTTOM (signal) On top layer I have a buck converter with 3V3 and GND output (0.5A max abs. ...
D_A_8's user avatar
  • 57
2 votes
1 answer
1k views

Power rails routing question

I am currently designing a pretty big 4-layer development board 350mm x 270mm. Keeping in mind I have multiple analog digital and AC mains voltage, what would the best practice be regarding routing my ...
geocheats2's user avatar
0 votes
1 answer
409 views

Controlled Impedance Trace-reference plane Placement

I am new to high-speed PCB design. I was studying controlled impedance traces from the internet with the help of various documents. Everywhere it says controlled impedance traces need a reference ...
Confused's user avatar
  • 2,593
1 vote
2 answers
759 views

Trace impedance for two signal layers between ground planes

When watching a few videos about stackup, EMI and impedance (especially this video from Fedevel Academy: https://youtu.be/52fxuRGifLU), I got confused how to compute trace impedance in the case of two ...
Marmoz's user avatar
  • 336
1 vote
3 answers
2k views

4 Layer PCB Standard Stackup Grounding

I'm about to start placing components on my very first 4-Layer PCB (wrapping up schematic and MCU software tested on 2-layer pre-prototype, all runs surprisingly ok, but still 2 layer meh). I've ...
Ilya's user avatar
  • 3,613
1 vote
2 answers
1k views

4 layer stackup, inner layers GND & PWR

To "somewhat" quote Rick Hartley, "the energy isn't in the traces & planes but in between", I'm now wondering, when I use the following stackup: Sig GND PWR Sig You would ...
Mart's user avatar
  • 376
0 votes
1 answer
703 views

Characteristic Impedance of Multi-Dielectric Coplanar Waveguide

Background I've calculated the characteristic impedance of a CoPlanar Wave Guide (CPWG) type transmission line on my 8-layer stack-up between L1 - top layer and L2 - GND1 directly underneath it. The ...
pfabri's user avatar
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0 votes
1 answer
167 views

Determine copper thicknesses for multi layer PCB

When deciding PCB stack-up generally accept the manufacturer suggestions. Especially they calculate the track impedance more accurate. For my last design I checked the guideliness for the FPGA (...
2funpars's user avatar
2 votes
2 answers
446 views

PCB trace height to width ratio

I came across the Isola IsoStack website that lets me test PCB stack-up using Isola substrates: https://www.isola-group.com/isostack My project is using a stripline design with a 1oz copper inner ...
BrChan's user avatar
  • 55
1 vote
2 answers
528 views

Ethernet 1Gbps - PCB stackup

I am planning a stackup for 2x Ethernet phys. The chip requires a few different supply voltage levels: I/O Power 3V3 (3 pins) and Analog Supplies: VDD2V5 (2 pins) and VDD1V0 (4 pins). Each pin has ...
kch78's user avatar
  • 11
3 votes
3 answers
10k views

JLCPCB 4 layer stackup

JLCPCB 4 layer pcb stack mentions a copper core as the image attached. Is this a error or the layer 2 and 3 are wittingly in short? This image makes no sense... Taken from: https://cart.jlcpcb.com/...
Luis Carlos's user avatar
1 vote
1 answer
685 views

2 ground planes vs ground and power plane for 4-layer pcb with many power rails

I'm creating a 4-layer PCB design that takes a \$12\,\text{V}\$ DC input and converts it into 9 different voltages for various components on the PCB. I understand that a common stackup for 4-layer ...
MattHusz's user avatar
  • 1,053
0 votes
0 answers
56 views

32F746GDISCO Stackup and Ethernet Impedance

I have an example board with PCB about the ethernet application. I noticed a mismatch between stack up and ethernet lines, or something else I don't know. Ethernet Lines are drawn with 0.125mm and its ...
Gokhan Sahin's user avatar
0 votes
2 answers
381 views

Chip antenna and PCB StackUp

I'm working on a ISM (868Mhz) weather station for my home and i'm trying to implement a Ceramic antenna directly on PCB. After reading the guidelines, i have questions again. One of then is what ...
joseph4008's user avatar
0 votes
4 answers
354 views

Proper PCB stack-up: What should third and fourth layers be in this stack-up?

I've got some question about stack-up for 4 layer PCB. My design is rather simple but due to many connections all arround PCB it couldn't be made with 2 layer PCB, this is why I picked 4 layer board. ...
mikolaj612's user avatar
1 vote
2 answers
777 views

Why is the signal-power-signal-ground 4 layer PCB stack frowned upon?

Commonly, the best practice 4-layer PCB stack up is (from top to bottom) signal-ground-power-signal. That keeps the signal layers close to a reference plane, and ...
Heath Raftery's user avatar
0 votes
2 answers
702 views

PCB Stack up 4 layer Micro vias, Stacked Vias and Buried Vias

I am designing a 4 layer board in which I HAVE to use blind and buried vias. This is a very dense board with (SOLID COPPER ON LAYER 4, No exceptions ) I am planning to use 1.) 1-2 microvia and 2-3 ...
Vishal Gaurav's user avatar
7 votes
3 answers
2k views

4 Layer PCB stack up

I have designed a lot of 2 layer PCBs so far and am trying to slowly move to 4 layer versions. One of the major challenges I'm currently facing in that aspect is the acceptable stack up of the ...
darthMaul's user avatar
11 votes
3 answers
2k views

PCB stackup for an 8-layer PCB

We are considering to have the following stackup for an 8-layer PCB we are designing. What we want with this stackup is to route the signals with approx. rise time of 3ns on layer 6 using a ...
Aldanajaramillo's user avatar
0 votes
1 answer
254 views

Dual supply PCB layer stackup

My PCB is powered from USB port and includes Recom RKZ0505D for powering dual-supply OPAMPs. Recom gives +5V and -5V outputs. So I have: Top signal & components Bottom signal & components GND ...
Berker Işık's user avatar
2 votes
1 answer
870 views

8-layer PCB stackup question

I'm designing a 8-layer PCB stack up. I have two choices as below: ...
diverger's user avatar
  • 5,886
1 vote
3 answers
1k views

The distance of the adjacent signal layer in PCB stackup

I saw in some PCB stack-up design, sometimes there are two adjacent signal layers, such as: SIG GND SIG SIG PWR SIG I think there must some crosstalk between them, so how much should be enough ...
diverger's user avatar
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