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Questions tagged [stack-up]

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10
votes
3answers
1k views

PCB stackup for an 8-layer PCB

We are considering to have the following stackup for an 8-layer PCB we are designing. What we want with this stackup is to route the signals with approx. rise time of 3ns on layer 6 using a ...
0
votes
1answer
42 views

Dual supply PCB layer stackup

My PCB is powered from USB port and includes Recom RKZ0505D for powering dual-supply OPAMPs. Recom gives +5V and -5V outputs. So I have: Top signal & components Bottom signal & components GND ...
2
votes
1answer
270 views

8-layer PCB stackup question

I'm designing a 8-layer PCB stack up. I have two choices as below: ...
0
votes
3answers
125 views

The distance of the adjacent signal layer in PCB stackup

I saw in some PCB stack-up design, sometimes there are two adjacent signal layers, such as: SIG GND SIG SIG PWR SIG I think there must some crosstalk between them, so how much should be enough ...
2
votes
1answer
119 views

Manufacturing PCBs for DDR3 memory

I'm currently designing a 4-layer PCB for a SOC (Allwinner A33 to be precise, 0.8mm-pitch BGA) with one DDR3 chip. Per DDR3 routing requirements, the traces need to have 50-ohm impedance. Also, they ...
0
votes
1answer
206 views

Altium Designer Rigid Flex - Placing Tracks Between Sections

I've done rigid-flex PCB designs a number of times in the past but it was long enough ago that I cannot remember how I solved this issue. My design has three sections - the main board, the flex, and a ...
6
votes
1answer
975 views

Real current return path

The theory says that the current return path at high frequency is on the reference plane right under(or above) the signal trace. I know it is true and I have always assumed it was, but I would like ...
0
votes
1answer
119 views

Routing of multiple impedance controlled tracks

I am designing a board with 50 and 75 ohm tracks on the same layer.My board receives SDI video via RG179 coax. The board has an SMA connector that receives the said input. The track is 75Ω track. ...
3
votes
3answers
742 views

One versus two plies of prepreg?

I need to specify the construction of a 4-layer PCB with transmission lines on the outer layers and planes on the inner layers. I need to control impedance and propagation speed. The target prepreg ...
0
votes
2answers
103 views

PCB Layer stack up related query

I have seen many of the 4,6,8...layer stack up . Layer 2 prepared as solid GND plane for shorter return current path(reference plane. What is the reason for layer 2 is ground plane in most of the ...
2
votes
1answer
368 views

are there any differences between referencing signal to VCC or GND planes?

In my first high-speed PCB design, I have an LPDDR3 RAM and my PCB have 6 layers with the below sequence: 1-Signal 2-GND_Plane 3-Signal 4-Signal 5-VCC_Plane 6-Signal the region between the SOC ...
4
votes
1answer
1k views

Routing impedance controlled signal with a power plane as reference

Assuming i chose to route an impedance controlled signal with a power plane as a reference plane instead of ground (microstrip or stripline), and assuming i'll make sure the signal won't cross power ...
3
votes
1answer
370 views

High speed signal return path in a stack-up with multiple ground planes

Consider the following 6-layer stack-up for a mixed signal board. ...
1
vote
1answer
1k views

How to model PCB Trace with RLC?

I have a PCB board with the stackup shown below. I want to calculate what would be the impedance (and capacitance too?) of a 5" PCB trace on the L1 layer. How to ...
3
votes
2answers
910 views

Four layer PCB stackup with thick prepreg layer: how is it useful?

I've been working on a four layer board with 100Ω differential pairs. Prototypes were built, impedance was measured, things were fine. But then as I tried to move the production to a different ...
4
votes
2answers
804 views

AC signal and ground plane with another trace passing between - is this bad?

In learning about reducing a circuit's EMI emissions, I've learned the importance of a ground plane, in that it allows the current-return for an AC signal in an adjacent layer to flow directly under ...
5
votes
1answer
398 views

PCB Stackup - Current return path

It is a well known fact that high speed signal would have return current path on the plane right beneath it's PCB trace. Suppose we have 4 layer stackup, SIG-GND-PWR-SIG with dielectrics CORE-PREPREG-...
1
vote
1answer
135 views

PCB stackup plane distance

What are the main reasons why one would choose one of the following options: sig (1") space gnd (4") space pwr (1") space sig comparing with sig (1") space gnd (1") space sig/pwr (1") space sig I ...
0
votes
1answer
299 views

PCB stackup for Mixed-Signal IC

I need to design high-density board with MCU, external RAM, GPS, GSM, Bluetooth, CAN, RGB interface on small size(5x10cm) and got into thinking which stackup should I use. Currently I have almost ...
0
votes
1answer
547 views

Is an edge coupled microstrip / stripline a differential pair or any two adjacent traces?

I got a suggested layer stack, and and it makes mention of "edge coupled offset stripline" and "edge coupled coated microstrip". Are edge coupled traces differential pair traces or are they any ...
3
votes
1answer
404 views

Are there any disadvantages to having a thicker PCB?

Similiar to the question What are the advantages and disadvantages of thinner PCB thickness (<1.6 mm)?, but going the other way. If we look at the picture in the previous question's answer, we ...
2
votes
1answer
347 views

8-Layer Stackup question

Alright. I was given the task to design an analog design board which contains lots of opamps, some CMOS switches and some ADCs/DACs. It also contains 4 separate power supplies (each supplying +5V and -...
1
vote
1answer
3k views

PCIe add-in card thickness tolerance

I can't find a tolerance measurement for the 62 mils thickness specified in the PCIe electromechanical spec. How much leeway do I have for board thickness in an add-in card. Additional details: I'm ...
1
vote
1answer
242 views

Stack up question…return current when signal layers sandwitched between planes

I have stack up like this: My question is, when any signal layer is having GND plane on one side (above/below) and Signal Plane on other side (above/below). whether high speed return current will ...