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Questions tagged [synchronous]

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1answer
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Why double synchronizer alone is not enough for multi byte transfer between two clock domains?

When one bit information is transferred between two different clock domains, we use 2 Flip-flops or double synchronizers. But when we transfer multi bit signals across two different clock domains, why ...
1
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1answer
49 views

Synchronous demodulation with single supply op-amps

I am looking at the following article from Analog Devices: Use Synchronous Detection to Make Precision, Low Level Measurements, and I'm wondering if there is a way to build the following demodulator ...
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1answer
61 views

vhdl synthesizable code

I have a CPLD XC9536XL-10VQG44C. On this CPLD I have one input "INPUT_4", one clock at 4MHz "clock" and 2 outputs "OUTPUT4_1" and "OUTPUT4_2", I also have 1 LED to drive that takes the same value than ...
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0answers
19 views

Converting boost controller to sync boost controller using H-bridge or 2 gate drivers

I am trying to reduce power losses in a boost led driver. For example TPS92690, uses a MOSFET and a diode for boost mode. Is it a bad idea to use H-bridge instead, or two gate drivers (one in straight ...
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0answers
25 views

What is the reasoning behind the transient circuit for a synchronous machine short circuit?

Assume that a 3 phase symmetrical short circuit occurs at the terminals of a synchronous machine working at no load and constant speeed. The machine is characterised by a field winding fed with a DC ...
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4answers
4k views

Why aren't fully asynchronous circuits more prevalent? [closed]

From my understanding, most modern consumer CPU's are based on synchronous logic. Some high-speed applications (signal processing, etc.) use ansync logic for its higher speed. However, in today's ...
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5answers
2k views

Can wireless communciation be synchronous?

I understand that in synchronous communication, the sender and receiver need a common clock. Is it possible that wireless communication be synchronous? Can some common clocking element be there for ...
1
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1answer
132 views

Synchronous generator induced EMF

I have started studying synchronous generators in more detail of recent and I'm finding it difficult locating helpful information regarding their operation. What is the formula that can be used to ...
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4answers
92 views

Could we theoretically massively increase number of parallel computations (for some problems) by getting rid of cpu clocking?

CPU clocking involves making sure that each operation or part of an operation takes exactly a certain amount of time (the machine cycle time). One way to increase the efficiency of a cpu is by ...
0
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1answer
43 views

Increase rotational velocity of synchronous motor

I recently got my hands on a Philips PM8110 (a single pen recorder which is basically an analog printer for voltages) which sadly provides paper with a velocity of 8 cm/hour. Although this would ...
1
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1answer
141 views

Non excited synchronous motor

I was looking for a synchronous motor for my rotary spark gap. On this page I found what I need. http://www.tb3.com/tesla/sparkgaps/1800srsg/1800srsg.html But the motor model is not 100% same on the ...
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3answers
76 views

Is there a Semisynchronous Buck Topology which mixes the advantages & disadvantages of both?

I was looking at "What is the purpose of using MOSFET instead of free-wheeling diode in Buck topology?" and the referenced PDF which discusses the trade-offs between a traditional asynchronous Buck ...
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2answers
82 views

Synchronous burst generator circuit

Ok, this is my very first question here so please forgive me if I'm asking a too broad question or if my problem description is too imprecise. I have a 13.56 MHz (RFID) pierce-type quartz oscillator ...
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1answer
11k views

Design a 3-Bit Up Synchronous Counter Using JK Flip Flop (odd vs even numbers)

I have to design 3-Bit Up Synchronous Counter Using JK Flip Flop counters. The first one should count even numbers: 0-2-4-6-0 The second one should count odd ...
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1answer
73 views

Contribution of the photovoltaic power plant to the short-circuit currents?

What is the difference between the contribution of the photovoltaic power plant to the short-circuit currents comparing to situation with synchronous generator?
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0answers
103 views

Jk Flip Flop( Counter not Working)

I am having problems with simulation for this particular counter. below are all my diagram including truth table and multisim simulation. the problem is its only going from 0-4 and vice versa. It ...
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3answers
471 views

How synchronous buck converters continue to operate in light load conditions

simulate this circuit – Schematic created using CircuitLab For all intents and purposes lets assume this basic power stage of a synchronous buck design above. Let's also assume a steady state ...
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2answers
279 views

How propagation delay of synchronous counter is less than asynchronous counter?

My question is very basic one, but thought of asking here to clarify. In asynchronous counter the output of Flip Flop is given as input to other Flip Flop as clock, where as in synchronous counter the ...
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2answers
317 views

half bridge smps with synchronous rectification basic working principle

I am trying to understand the basic working principles of a Half Bridge SMPS with synchronous rectification. Whilst I understand the workings of a Half Bridge SMPS with diode rectification, I fail to ...
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2answers
1k views

Corner Cases to Verify Synchronous FIFO

I'm trying to figure out the corner cases for verifying a synchronous FIFO during hardware verification. My setup is a very simple two ports synchronous FIFO (write/read) and the write clk frequency ...
1
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1answer
196 views

Is XADC synchronous in Artix 7 Series FPGA?

I was wondering if the output data of the XADC in the Basys 3 board is synchronous. That is, can I use the EOC (End of conversion) flag as a clock for some other modules and expect it to be a ...
1
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1answer
107 views

FPGA - Synchronous inputs with higher frequency than the board clock

I'm trying to learn Verilog and FPGA and just bought my first FPGA. It's a Lattice iCEstick. It comes with a 12Mhz clock but I wonder If I can sample synchronous inputs with a clock faster than that. ...
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1answer
2k views

detect rising edge and falling edge to assing signal to Enable

I'm trying to create a process that detect the first rising edge of PGOOD signal and turn on ENABLE. Then I need to detect the first falling edge of PGOOD and turn off ENABLE for good. Here is what I ...
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6answers
13k views

Design a 8 - 6 - 4 - 2 - 0 - 1 - 3 - 5 - 7 - 9… Counter

Design a counter: 12-10-8-6-4-2-0-1-3-5-7-9-11 using D Flip Flop. My first approach is designing a 8 - 6 - 4 - 2 - 0 - 1 - 3 - 5 - 7 - 9 - 8 - 6 ... counter and display them on 7segment LED. ...
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1answer
87 views

Why the shape of rotor-poles of salient pole synchronous machines are designed as sinusoidal in shape?

I knew that this is done to eliminate harmonics. But I couldn't get its reason. So I am confused whether my conclusion was right or wrong.
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0answers
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Critical Races in Asynchronous Sequential Circuits

I have this flow table: I want to find out all the races in this, and whether they are critical races or not. My solution so far: x1=0, x2=1 and state as c, 2 changes are needed in the secondary ...
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0answers
34 views

Consideration on synchronous circuits

I was considering the synchronous design model. If I understand it correctly, it can be represented as so : (excuse the awful schematic made with Paint) The state switches within a stage are ...
2
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3answers
285 views

Using async SRAM in homebrew CPU

I am building a homebrew CPU and have now reached the point of designing the SRAM part. I plan of using a simple 32K x 8bit static RAM (such as the Cyprus CY62256N). My concern is that the part is ...
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0answers
410 views

Why is the chording angle 30 degrees, in a practical alternator?

So far what i have understood... Chording angle in Synchronous Generator/ Alternator is introduced to tackle the problem of harmonics that couldn't be taken care of during the design either in - ...
0
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1answer
645 views

FSM implementation using single always block in Verilog?

So while looking up for material on implementing high level state machines in Verilog I came upon this: I am also trying to implement a high level FSM in Verilog that has a number of nested ...
4
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5answers
3k views

Maximum frequency of the synchronous counter

Find the maximum clock frequency at which the counter in the figure below can be operated. Assume that the propagation delay through each flip flop and each AND gate is 10 ns. Also assume that the ...
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0answers
189 views

alternator reactive power

I'm tying to calculate the change in reactive power of an alternator with the change in its real power input. P=EV/Xs sin(d) is the real power output of the generator. Q=EV/Xs cos(d) - V^2/Xs is the ...
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1answer
78 views

Speed voltage variation in alternators

What happens to the terminal voltage of synchronous generator if we change the speed ?
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1answer
88 views

Why am I given two reactances for a synchronous generator?

I'm solving problems on the alternator and some of them give a reactance Xq in addition to the usual synchronous reactance Xd. Does anyone know what this Xq is?
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0answers
52 views

Disconnecting the load from a synchronous generator

How is the terminal voltage of a synchronous generator affected when we disconnect the load ?
0
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1answer
78 views

Per unit solution gives different result

We have a 200MVA , 15kV , Xs=1.62pu synchronous generator feeding a load of 15kV and 100MVA with an inductive power factor of 0.8. I'm asked to find the generator's voltage (along with its phase angle)...
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2answers
307 views

Synchronous Buck High Side Driver - Why is the Fall Time of High-Side Gate Drive so Slow?

Below is the picture of my gate drive signals. The blue trace is the low side gate signal and the yellow trace is the high side gate signal. Both signals are measured across the gate and source of the ...
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1answer
4k views

How does the speed of a synchronous generator changes with load?

When the generator is rotating at rated speed and let us say that the load decreases then the mechanical torque will be more than​ the electrical torque which will lead to increase in the speed of ...
0
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1answer
55 views

Synchonous finite state machine from output sequence

I'm reviewing for my exam and this questing popped from questions that were previously asked in the exam. Problem is below. Question: I'm totally confused about this, how do I get started? Trial: My ...
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0answers
54 views

Types of current sensing in a MCU controlled synchronous buck-converter and there uses

I am trying to design a synchronous buck-converter driven by a PWM signal generated by a Atmel XMEGA microcontroller. The input voltage comes from two series Li-Ion batteries so when they are fully ...
0
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1answer
196 views

ERROR:Xst:827, Signal next_states1 cannot be synthesized, bad synchronous description

it shows ERROR:Xst:827 - "C:/Users/namec/Desktop/Class/VHDL/Traffic_Light/Traffic_lig‌​ht.vhd" line 46: Signal next_states1 cannot be synthesized, bad synchronous description. The description ...
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3answers
5k views

Why does the stator field rotate at the same speed as the rotor field in a synchronous generator?

In the case of the induction motor the rotor never catches up with the rotating field of the stator because if it did the induced voltage would be zero as there is no relative movement between the ...
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1answer
2k views

synchronous boost converter design

simulate this circuit – Schematic created using CircuitLab Does anybody there has an ideea about how to make a synchronous boost converter only with N channel mosfets? I intend to do one, but ...
1
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1answer
392 views

How Armature reaction is different from Self inductance?

It was given in "Electric machinery Fundamentals" by Stephen J. Chapman book that Armature reaction and self inductance is different. Contribution from armature reaction is considered as voltage drop \...
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0answers
3k views

Synchronous 4-bit Counter Using D Flip Flops

How can I make a synchronous 4-bit counter using only D flip flops and the required (if any) logic gates? I want the counter to count upwards from 0000 to 1111. I have made the state diagram, the ...
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3answers
1k views

Can a 50 Hz, 220 VAC transformer work on 40 Hz, 180VAC?

I am designing an AC to DC converter. My power source is a single phase synchronous alternator that has a voltage range of 170~260 VAC and a frequency of 40~60 Hz. Can i use a transformer designed on ...
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3answers
2k views

What difference does the clock make in synchronous vs asynchronous communication?

I am new to embedded programming and have very little knowledge in how digital/electronic system works, but I have been given a task to bring up USART communication between two chips. For that, I ...
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3answers
3k views

Synchronous Generators: Full load and No load

When referring to synchronous generators, what do they mean by "operating at no load or at full load"? Can I connect a load that is larger than full load?
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2answers
99 views

simple synchronous single winding motor

I am baffled how this motor works...It has a single axial winding that turns a disk. The disk is not a strong magnet but somehow this motor has torque enough to swing a floor fan. I see on the ...
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1answer
154 views

Unexpected behaviour from synchronous counters in proteus

Figure: 1. Figure: 2. Content in ROM(U56) T0: 00 T1: 00 T2: 00 T3: 04 T4: 00 T5: 00 T6: 04 T7: 00 T8: 00 T9: 04 (I have ...