Questions tagged [synchronous]
The synchronous tag has no usage guidance.
21
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How to synchronize two microcontrollers to micro-second accuracy?
I need to synchronize two micro-controllers so that they can measure the speed of propagating waves. The time delay measurements need have microsecond accuracy (error less that 1/2 of a microsecond).
...
- 513
-5
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5
answers
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Counter with 4 flip flops jk synchronous from 3 to 13!
I have to create a counter with 4 flip flops jk synchronous. The counter shall count in this order: 3 to 13 and then to 3 to 13 and so on..
I have to use logisim simulator.
Ok. So i think its ...
- 1
4
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1
answer
635
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Can a synchronous regulator "chirp" in burst mode?
I'm looking at (the millions of) buck regulators available for a project where the board will be a host board for a Gumstix Dual Cortex A9. This can pull quite a bit of current at maximum so I was ...
- 2,578
3
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6
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30k
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Is Power consumed by a motor under various load conditions constant?
Does a motor (dc /Induction/Synchronous ) consumes more power when operating at higher load than when operating at some lower load? Or power consumption remains constant/same in both cases?
What I ...
- 29
1
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0
answers
227
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Control synchro system
I have some questions regarding this system that is supposed to take in an input signal and move the load according to this signal. The current load position is feedback to the CT, which compares the ...
- 57
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4
answers
950
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Electrical phase in a power grid and power transmission
I'm very new to the study of power grids and I'm having some trouble understanding some very basic concepts.
I have been looking at the problem of synchronisation on power grids and I'm not quite sure ...
- 121
5
votes
2
answers
4k
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What's the point of a MOSFET in a synchronous buck converter?
I can't seem to understand the point of the second MOSFET in a synchronous buck converter. The second (Q2) MOSFET has a body diode which seems to act like a normal diode in an asynchronous buck ...
- 53
4
votes
5
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13k
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Maximum frequency of the synchronous counter
Find the maximum clock frequency at which the counter in the figure below can be operated. Assume that the propagation delay through each flip flop and each AND gate is 10 ns. Also assume that the ...
- 143
4
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3
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3k
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How synchronous buck converters continue to operate in light load conditions
simulate this circuit – Schematic created using CircuitLab
For all intents and purposes lets assume this basic power stage of a synchronous buck design above. Let's also assume a steady state ...
- 41
3
votes
2
answers
6k
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Syncing Signals with Global Clocks in FPGAs/CPLDs and Edge Detection
I am a newbie in digital logic design and I'm trying to get my head around syncing external signals to the global clock in an FPGA. For example, the SCK signal/clock fed to an FPGA by the SPI Master. ...
- 5,369
2
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3
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2k
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VHDL process' sensitivity list
I do not understand the precise role of the sensitivity list in a process in VHDL.
For instance, consider an architecture with 3 input signals: a, b, c.
I read that if we write: PROCESS (a, b)
we ...
- 3,490
2
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1
answer
198
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Intel FPGA: Source-synchronous input using PHY Lite
I have been trying for several months to get hold of information about how to use an Intel PHY Lite IP (for Arria 10 or Cyclone 10 GX) to implement a source-synchronous input interface:
Last December,...
- 270
2
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2
answers
6k
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Corner Cases to Verify Synchronous FIFO
I'm trying to figure out the corner cases for verifying a synchronous FIFO during hardware verification.
My setup is a very simple two ports synchronous FIFO (write/read) and the write clk frequency ...
- 21
2
votes
0
answers
1k
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Calculation for the Boot Strap capacitor
For design of a synchronous buck converter (which would be used to charge the battery) which would be driven by Micro-controller's PWM output, i selected the IRLB8748 NMOS Power transistors (for both ...
- 553
2
votes
3
answers
260
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synchronous buck - nmos current flow direction
As far as I know in nmos the current flow from the drain to the source, and the drain and source are determined by the pin with the higher voltage on it (such that the source is the pin with the lower ...
- 97
1
vote
1
answer
2k
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Why double synchronizer alone is not enough for multi byte transfer between two clock domains?
When one bit information is transferred between two different clock domains, we use 2 Flip-flops or double synchronizers. But when we transfer multi bit signals across two different clock domains, why ...
- 13
1
vote
1
answer
3k
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Genlock two OV5642 camera modules on Arduino with ArduCam
I need to shoot stereo video or stills at about 10 FPS possibly in perfect sync. My plan is to set up a 3D stereo rig (2 standalone units - each consisting of Arduino UNO + ArduCam shield + OV5642 ...
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1
vote
3
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241
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Multiple Demultiplexers In Series
Basically I need some demultiplexers to switch between 24 outputs. The data inputs would be connected to counters for the addresses. I'm currently using 74ls138 3-8 line demultiplexers. Is this ...
- 11
1
vote
1
answer
1k
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Cycle time between flip-flops with delay
In given this circuit, how can you calculate the minimum cycle time, in order that the circuit will work properly? I need you to explain to me how to relate to Delays?
It must be something with this ...
- 13
0
votes
2
answers
4k
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Available synchronous buck converter chips are bidirectional (current)?
I was going through available synchronous buck converter ICs with external PWM capability (which can be controlled with the help of a micro-controller) and i found this one for e.g. I have read in a ...
- 553
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2
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Can synchronous data transfer be used for transferring large data in case of computer architecture and organization? [closed]
I am learning computer architecture and organization.
I have this confusion, can synchronous data transfer be used for transferring large data in case of computer architecture and organization?
I ...
- 385