Questions tagged [trace]
Lanes of copper on a printed circuit board, for carrying current or signals between pads
168
questions
0
votes
1answer
44 views
Serpentine PCB heater size calculation
So, I'm kinda new to the field and the time has come to design my first PCB heater. The main concept is to drive it using a Raspberry Pi and a temperature sensor as feedback.
Here is the whole ...
1
vote
1answer
40 views
Separation of same layer traces
I've seen this capacitor:
https://api.kemet.com/component-edge/download/datasheet/C0603C221JDGACAUTO.pdf
It is a 0603 capacitor with a 1000VDC rating. As I am familiar with IPC2221, this did not ...
1
vote
1answer
75 views
How can I determine the best trace width for my pcb?
In my project I use 2 external layers in air. How ever in my circuit the maximal current (Imax) in transient mode is about 70A and in steady sate it gets to 12A.
My question is, how can I know for ...
0
votes
1answer
54 views
Altium Trace, Silkscreen not solid ie only showing outline
Whilst working with Room Copy key command (D-M-C) I have inadvertently changed something which has resulted in my traces and overlays showing as their outline only.
Does anyone know what I've done to ...
2
votes
0answers
46 views
Different trace width signal transmission line
I have a really basic question. I am wondering what happens physically with the signal, if I have a change in a trace width (see picture below).
My point of view is that you have a reflection of the ...
2
votes
3answers
204 views
STM32 (SWD) printf not working
I'm new using STM32 microcontrollers, I have been trying to use the printf tracing in my code without success, anything is printed on the console. I can start a debug session, I can place breakpoints ...
2
votes
1answer
90 views
Traces over ground plane [duplicate]
Sometimes it cannot be avoided to run traces over a ground plane (bottom layer) in a two layer PCB.
I have two questions regarding this:
In the (simplified) example below, what is preferred? To use ...
0
votes
1answer
58 views
Vias or traces through two pins of e.g. resistors on a PCB?
I made the design below in KiCad. It's for me a test to see if I can solder SOT23, 0604, 0805 and 1205 components.
Someone said it is not a good idea to make traces between two pins of a component (...
0
votes
0answers
34 views
Learning designing a Arduino pcb, doubt about USB traces
what consideration should I have for the USB section. How do correctly the usb traces? What means this curves?
This is my reference schematic and due board.
Thanks
0
votes
0answers
19 views
CAN Bus Isolated Ground Trace Layout
I'm using an ADM3053 isolated CAN transceiver in my design, which, due to layout constraints, is located ~6" away from the board CAN connector. The CAN_H and CAN_L traces are routed as a 100Ohm ...
0
votes
1answer
41 views
How critical is it for SN65HVD1780DR A/B Differential signal lines to have matched trace length?
How critical is it for the A/B differential signal lines of SN65HVD1780DR to have matched trace lengths on PCB?
2
votes
2answers
234 views
Reduce impedance for power traces of a decoupling Cap when ground planes are not directly under
I am using an SHTC3 temp and humid sensor to send readings using I2C lines to the MCU.
Based on the datasheet for SHTC3 to make sure the sensor is reading ambient temp without the interference of the ...
2
votes
3answers
212 views
Surge Current on PCB
When designing a PCB, do you need to worry about the inrush/surge current or just the continuous/RMS current on the board? Everything I have seen including IPC documentation is for continuous current....
3
votes
4answers
583 views
Beyond what is recommended by fabricators, how far should traces be from SMD pads?
Having followed a fabricator's DRC (this case being OSHPark), this distance between an SMD pad and a trace is considered acceptable (see attached images).
However, I wanted to inquire about what the ...
2
votes
2answers
712 views
PCB Trace Repair (Need to keep track shape?)
Need to repair a trace on my PCB. The burnt trace has a hairpin turn on it. Instead of following the same hairpin shape, can I just bridge across the undamaged points at the bottom? And also, the ...
0
votes
2answers
211 views
Why sometimes some PCB designer add extra traces to connect two pin to each other?
I've checked a PCB board which has designed by very famous company and I saw something weird.They connected two pin to each other 2 times and from the top and the bottom of the board I am going to ...
2
votes
2answers
106 views
Replacing burnt traces
I have a tiny PCB that I've been working on and off of for a while now. I received it with leaking batteries, and it had corroded some of the traces off the board. Most recently, I tried redrawing the ...
5
votes
1answer
454 views
Routing large RF trace to small SMD pad
I am designing an RF board in Altium where due to the dielectric selected and its thickness, the trace width for a 50 ohm characteristic impedance is thicker than some of the SMD component pads. What ...
4
votes
2answers
427 views
Routing thick high current traces to small SMD pads?
What is the best practice for routing high current traces through the pads of small 0603 components?
I have a wide high current trace which that passes through a 0603 decoupling capacitor.
Initially ...
0
votes
0answers
210 views
wiring for an APC transformer
I have a transformer that was salvaged from an APC battery backup.
I googled all the numbers, I found only one that was similar, but not enough.
From what I understand, the middle wire is typically ...
1
vote
3answers
582 views
Minimum PCB Trace width with SMD components and Autorouter problem
I would like to receive some suggestions from you about the trace width for my PCB.
I'm using some SMD components (ATmega328p TQFP32 and FT232), the main power is 5VDC at maximum 2A. I use also a ESP ...
0
votes
0answers
35 views
Analogue Video Trace Matching
I'm working on an analogue audio, video and sync board for my Dreamcast. Something I've been wondering about is the tolerance for analogue video, specifically RGB, in regards to the delta for trace ...
2
votes
3answers
179 views
How to fix incorrect routing to SMD transistor terminals
I've got a doozy of a situation:
On this circuit I had made, I routed an IRL530N D2Pak transistor with Source and Gate switched....the large heat pad should be the gate input, but instead I routed it ...
0
votes
0answers
47 views
Antenna trace 135 degree bending
I designing PCB for SIM7600CE with space constraint.Here, I placing filter matching and the antenna section through 135 degree angle traces (GREEN MARKING).Is it Okay?Can I have any PCB guidelines?
...
25
votes
6answers
5k views
Is it OK to route a trace through a pad?
Will I have any trouble routing the traces in this way? (VCC and GND)
Is it OK considering that the entire circuit current is under 50mA?
2
votes
1answer
110 views
DDR Trace Length Inside Package from Simulation Model
The DDR4 in question is a Micron MT40A512M16JY. From the vendor site, you can get the datasheets, specs, sim models. I assume from the sim models you should be able to see the trace length of each ...
1
vote
1answer
147 views
DDR3 trace length: need a confirmation
I am reading JEDEC DDR3 specification, and so many other documents on DDR3 guidelines.
Before I move to pcb prototyping, I just need a confirmation.
I connected all my lines, respected the grouping, ...
1
vote
0answers
37 views
Slewed fpga drive rise time on pcb to enet phy
What can cause rise times to be slewed from an fpga to an enet Phy? Can it be trace capacitance?
This is a high density 14 layer board . Traces route from fpga to ribbon connector, along a short ...
0
votes
0answers
40 views
Faster 8051 not taking the slower 8051 pin status correctly
I'm trying to do a rather simple data transaction between two 8051 microcontrollers using a variant of the SPI protocol. The large one is a slave and the small one is a master.
The documentation for ...
0
votes
1answer
35 views
Antenna CPW internal layer
I see on the internet showing CPW( coplanar waveguide) always placed on TOP layer with ground underneath. This is what I usually do.
Is it possible to place a CPW in an internal layer? if so what ...
1
vote
0answers
109 views
How far away can DDR3 memory be placed from the SoC?
I thought of an idea where i have a pcb with a soc on it, and a seperate one with the DDR3 memory that can snap into each other.
This way i can replace or debug specefic parts of the system and have e....
2
votes
1answer
87 views
How to set the width of all the traces together to the desired value before using autoroute option in Autodesk Eagle?
How to set the width of all the traces together to the desired value before using autoroute option in Autodesk Eagle?
every time I use autoroute, the trace width is by default set to 0.0154mm. I have ...
0
votes
1answer
442 views
Is there available differential impedance calculation for this stripline configuration?
I am trying to calculate the differential impedance of a differential pair in a 4-layer PCB as follows:
Layer: Low speed signal
Layer: Power plane
Layer: Differential pair
Layer: Ground plane
I am ...
0
votes
0answers
72 views
Oscilloscope Trace Appear Delayed
I saw a thing on my GDS-1052-U oscilloscope: if I set the time base to 25mS/div there appear a delay of the signal on the screen. So, when I rotate the knob for the time base to 25mS/div, there is a ...
3
votes
1answer
297 views
How can I account for package trace length in KiCAD?
The documentation I got for the MCU provides "package trace length" (in micrometers) as well as "package trace delay" (in picoseconds). For example like this - 6535.15 um package trace length for M_DQ[...
8
votes
2answers
1k views
thickest pcb track before hitting ridiculousness in digital circuits
Ok, you can call me ridiculous.
But, When I make PCB's, I learned myself to get into a habit into making thick PCB traces for every wire including those that others would use maybe a 5 - 8mil width.
...
0
votes
3answers
845 views
Is it okay to use wider trace than actually required while designing a PCB?
I used eagle to recently, design a board with all trace widths 30 mills except a few as 20 mills. I actually didn't require traces this wide and 15 mills would probably have been enough. Does this ...
3
votes
4answers
1k views
Is it bad to run traces directly over each other on separate layers?
A bit new to PCB design, I have to run two traces between two pins, and the best way I can think of is to have one trace go to the bottom layer through a via and then run directly under the top layer ...
1
vote
1answer
175 views
Traces across transmission line
I am designing a PCB which has a chip antenna with a coplanar wave guide.
Having a 4-layer PCB (stackup layer: rf signal, GND, POWER, signal) can I run traces across the antenna transmission line on ...
0
votes
0answers
597 views
PCB trace width / via size calculator for intermittent signals
Somewhat a duplicate of Can a PCB trace support peak currents?
Are there rules of thumb for a PCB designer to compensate the output of via / trace width calculators to account for cases where the ...
1
vote
2answers
41 views
While performing the controlled impedance routing what about the current flowing through it?
While calculating the conductor impedance the parameters that we consider are the conductor width, conductor thickness, frequency & substrate parameters. For achieving the particular impedance ...
0
votes
0answers
51 views
Query relate to rf impedance matching
I am into RF design and I have some queries related to impedance matching and trace. We had an RF module and the module was connected to an antenna through a single trace with no LC components in ...
1
vote
2answers
2k views
Is there an ideal PCB trace width for data lines?
For a 1oz FR-4 PCB, is there an ideal PCB trace width for data lines? For power supplies, I realize wider is usually better, and power planes are preferred. But what about data lines? Is narrower ...
3
votes
3answers
1k views
50 Ohm Single Ended Signal Impedances on PCBs
I have a basic understanding of transmission line theory and how 50ohm traces are designed on a PCB. I was wondering what the origin of this 50ohm impedance is. Are single ended digital signals on ICs ...
1
vote
2answers
157 views
BGA break out and impedance control
I'm connecting two BGAs (0.8mm pitch) which are DDR3 signals. Vendor recommends 40 and 80 ohm for SE and diff traces.
My PCB manufacturer suggests the following specifications for the diff traces:
<...
2
votes
0answers
400 views
PCB trace caps (a.k.a. finger / interdigital caps) formula
I am trying to calculate a two-fingered, both on the same layer, capacitor. I have run into a few papers on it but they are taking a ground plane on the other side of the PCB into consideration and ...
0
votes
0answers
221 views
PCB trace is 50 ohms, for reflection can we detect the discontinuity point?
all,
I've searched some information but still have questions.
If it is all impedance control from the whole trace (driver -- PCB trace - device input), does this mean no any reflection in the real ...
1
vote
2answers
5k views
Why is length matching important for high-speed signals?
Broadly speaking, I understand that PCB trace length matching is important from signal timing and signal integrity point of view, but I want to know some more specifics about these two parameters and ...
0
votes
1answer
85 views
IC Pins with adjacent same net need to be made as common shape?
Attached is the layout I am working on.
Please see the yellow circled area. It is a common net. I have kept it as separate trace in the layout for each pin. Is there any advantage by providing shape ...
1
vote
1answer
224 views
10BASE-T Layout Guidelines
How critical are parameters like trace length matching, differential impedance, vias, etc. when designing a 10BASE-T only application? I know that due to the reduced frequency, there is a larger ...
