Questions tagged [tri-state]

A signalling standard typically used in buses that either drives the wire low, drives the wire high or disconnects from the wire (Hi-impedance, Hi-Z or tri-stated) such that there will not be a driver conflict when the wire is driven by another unit/driver. Two low impedance drivers driving to different levels (High Vs. Low) can potentially damage each other but certainly will corrupt the data on the wire. Allows for shared wires (with coordination).

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FPGA: issues with synthesis and implementation of quad SPI flash controller

I have written a state machine to act as a quad SPI controller for W25Q128JV Serial NOR flash ICs from Winbond. I tested the design in simulation and the waveform looks as expected based on the ...
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Transmission gate vs Tristate Buffer

I am wondering about the practical difference between transmission gates and tristate buffers. As far as I can tell, they both do the same thing. They effectively disconnect themselves from part of ...
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System Verilog Mux Implementation using tri-state buffers

I found a verilog implementation of a mux using tri-state buffers in the document UMD Lab Tutorial on Verilog (I'm not a student, graduated 2 years ago :)) ...
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Bi-directional Three State IO and microprocessor gpio

I want to use an MP5010B Electronic Fuse IC. I will enable or disable it by using the Enable/Fault pin which is billed as a bi-directional three state IO. I will enable or disable this pin using a ...
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A transistor and a diode instead of a tri-state buffer

I was wondering if it is possible to replace the tri-state buffer with a transistor and a diode as shown in the image. In this case a zero will be the same as high impedance. I don't understand why we ...
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PIC16F18446 Tristate output pins controlled by the value of another pin

In many 74xx chips the high impedance state of pins is controlled by a OE pin. I want a similar functionality for my PIC device. I understand that I could use code to flip the config bits to make the ...
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Bus contention when addressing tristate buffers by decoder output

I'm currently redesigning the signal propagation algorithm of a circuit simulator I'm developing as a hobby project (https://www.antarescircuit.io). In the new design, I'm trying to detect when ...
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"Working" tri-state MOSFET Push-Pull leakage

I have been working for a while on this design, where there are 9 push-pulls that should drive a charliplexed LED array. Therefore the circuit must be able to provide three states, namely: HIGH(12V), ...
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Why does an oscillator want a capacitor between Output and Tri-State?

I'm looking at the datasheet for an oscillator: ECS-3225MVQ-500-CN-TR https://www.mouser.se/datasheet/2/122/ECS_3225MVQ-1825332.pdf As you can see, if Tri-State is not connected(NC) or pulled high (...
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Tri-state push-pull configuration GPIO protection

I am designing a sort of "driver" for a high voltage Charlieplexed LED array, since normal GPIOS can't handle 12V. For that, I need to be able to use tri-state logic, which means LOW, HIGH, ...
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Will these optocoupler configuration work to tri-state high voltage GPIOS?

I am trying to control an array of LEDs that require a very high voltage due to the high impedance of the connections (there is no option to change that). Since the charlieplex configuration makes use ...
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How can I control a "high" voltage charlieplexed LED array?

Context I want to design a system that allows me to control different LED arrays that I have, which can be either conventional multiplexed arrays (MP) or charlieplexed arrays (CP), by just plugging ...
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can connecting a tristate buffer output to 0 or 1 make problem?

in this circuit the control line is connected to GND so the output is Z. is there any problem to connect the output line to 1 or 0? if the control line turns to 1, what happen to the circuit? what is ...
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Is tristate buffer power consumption high?

I have 2 questions about tristate buffer. Is there any problem with using many tristate buffers in circuit design? is tristate buffer power consumption very high? Is it a good solution to replace a ...
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How to use tri-state buffers to make AND and OR logic gates? I can use an inverter

It's for an assignment where I have to make AND/OR gates using tri-state buffers and NOT gates. Is there any way I can do that without using any other gates?
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Can a resistor mitigate a maximum input voltage limitation?

I have a microcontroller running at 5v and outputting a digital signal. This signal can be high, low or high-impedance (tristated). This signal goes to an input pin on a target chip (the type of which ...
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using RC delay to trigger output enable pin of tri-state gate

The attached image is a circuit using a rc-delayed (reset) signal to control a tristate gate (U855C). After MPU_RESET is asserted, C852 starts charging. Gate U855D is always enabled. When the ...
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A bus routing puzzle, does it ring a bell?

I am breaking my head over a puzzling bus routing puzzle, and I wonder if this sort of problem rings a bell. I have 4 memory cell ports, let's call them EE, OE, EO, and OO, that are being mapped to 4 ...
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Do UART pins on the Beagle Bone Black require tri-state buffers?

The project I am working on uses a Beagle Bone Black (BBB) rev C, we are powering it externally through a cape according to the System Reference Manual's instructions. The System Reference Manual ...
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How is high impedance state physically different from a logic low state?

I have read this question and the answers that follow on the electrical stack exchange but I still face a difficulty in understanding the practical difference between high-Z state and 0 state. It is ...
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Tri State Buffer and Boolean Algebra

The basic operators of the boolean algebra are AND, OR, NOT. The modern digital circuits are based on this mathematical concept (Shannon's thesis, 1938). I am wondering whether the Tri-State Buffer ...
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Assigning a value to a tri data type variable in Verilog

Suppose there is a 'tri' data type variable A declared in a module m in verilog. A is connected to the output of another module n which is instantiated twice inside m, in both the instances. In one ...
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What makes a input GPIO pin so sensitive?

I know that an input pin has a high impedance, but how a high impedance makes such pin be so sensitive? According to https://forum.arduino.cc/index.php?topic=454553.0 -- #4 mentioned If the input ...
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Does ISA bus (or PC/XT bus) have some means of arbitration to resolve bus contention?

My understanding of ISA bus is that the CPU places an address on the bus and any expansion card is free to respond to that address by taking control of the data bus. I presume that tri-state buffers ...
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Avoiding shorts when switching between bus lines with a mechanical switch

I've designed a circuit to choose between two 8-bit digital buses. I'm taking advantage of the fact that the 74AC540/541 chips have tristate outputs, so can enter into high impedance state to allow ...
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Why am I getting an error when setting the TRIS registers with PIC?

I am new to PIC programming, and I am trying to blink an LED using the PIC10F206. It has 4 I/O pins. I understand I must declare them as inputs or outputs, but the IDE I am using (MPLAB) keeps giving ...
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Is this circuit from a textbook wrong?

(This is not a homework question.) While reading "Digital Computer Electronics" by Albert P. Malvino, I found this circuit on page 121, figure 8-22(a). It claims to be an example of a discrete TTL ...
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Tri State/Floating Signal Detection

I'm working on a project for automotive environment in which I need to read signals from the power mirrors switch in a microcontroller. The power mirrors switch controls the mirror's moving directions ...
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How is the enable pin implemented in tri state logic?

I watched Ben Eater video on Youtube giving an introduction to tri state logic (https://m.youtube.com/watch?v=faAjse109Q8&t=98s). He first presents a circuit made of two transistors (see picture) ...
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Is it possible to make a Tri-State Bidirectional buffer without any tri-state buffers?

I'm currently making a computer on an application called Smart Logic Simulator. However, it doesn't have any tri-state buffers and therefor I cannot make a bus (based off the DM74LS245 chip). Is there ...
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Choosing the best approach for data selection in a datapath

For a university project, I have to design and construct a very simple CPU including the ALU. In order to select between different data lines that go into the ALU(32-bit data line), I have thought of ...
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Logic levels on tri-state buffer,

i am working on some CPLD-controlled SPI devices that will be daisy-chained together. I will be using 74VHCT126AFTTR tri-state buffers to disconnect the SPI and Slave Select lines on the device from ...
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7 votes
5 answers
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Reasons for having MCU pin-states default to pull-up/down out of reset

On many MCUs, pin-states default to tri-stated (a.k.a. analog inputs) when the MCU resets so as to not affect the circuits they are connected to until software configures the pins. The tri-stated ...
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Question about bi-directional pin from Roth reference

I now am studying the tri-state buffer from the reference "Fundamental of Logic Design", 6th edition, By: C. H. Roth and L. L. Kinney. I found that circuit of a bi-directional pin as application of ...
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Can a Tri-State buffer be used with AC signals?

I'm trying to switch an analog audio line from its given channel to analog ground when a specific line goes low (in this case, the DACs charge pump goes low when it shuts down). Would a tri-state ...
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Converting 3.3V signal to 5V with tri-state

I need to buffer and tri-state a 3.3V 8 bit signal, and shift the output to 5V (when the buffer is not in tri-state). I am using a CD54HC373 buffer and 2 BOB-12009 logic level converters, but I can't ...
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Which case is better

if we want to construct 3 state inverter... Which case is better? Having the enable near o/p or far the o/p I have seen people drawing it far the o/p. But can't figure out why Do you see? The upper ...
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Glitchless output on PIC10F

I'm learning how to program a PIC10F220. I'm using a PICkit 3 programmer and running physical experiments, as well as running the simulator in MPLABX. One thing I want to do is set the proper level ...
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2-bit DAC from TTL logic using 2 MCU outputs

Basically I am trying to make a 2-bit DAC that can interface to an external device via one signal wire. I want to create a 3-step signal that can be ~0V, 2.5V, and ~5V. For starters, I tried using ...
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can a PC parallel port produce interference?

Please forgive me for crossing wires on top of IC's but I wanted to get things done, yet still have no luck. Let me explain the circuit. I created a circuit in which three parallel port data lines ...
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How to implement 8x1 multiplexer using 3x8 decoder and 3-state buffer

Suppose that AB and CD are 2-bit unsigned binary numbers (a) Find the truth table for the function F with 4 inputs A, B, C, D to satisfy the following condition if AB >= CD, then F = 1, otherwise F =...
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Using 3-state buffers for multiplexing

Some while ago, while memorising the 74xx series part numbers, I came across the concept of a device with a "3-state" output. The idea, as best as I can tell, is that the device outputs logic low, ...
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6 votes
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Is my SPI multiplexing design correct?

I want a RPi to act as a SPI master and be able to communicate with 24 SPI slaves. The SPI connection is full-duplex. The SPI slaves are about 50 cm away from the master (SPI runs on wires to an other ...
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2 votes
1 answer
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Is this an accurate model of a microcontroller pin?

For something so common, I can't seem to find anything online on what a microcontroller pin "looks like" (besides a high-level voltage source when output, open-circuit when input). So I decided to ...
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what logic family does tri state logic fall into?

Here is a good Wikipedia on logic families. This seemed like a particularly important line. Of these families, only ECL, TTL, NMOS, CMOS, and BiCMOS are currently still in widespread use. I'...
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8-bit tristate logic gates

Is anyone aware of any tri-state logic gate families? 8-bit input AND,NAND,OR,NOR,XOR,XNOR with an enable selector? Or is this too specific and requires a roll your own implementation?
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Tristate driver I/O for analog signals

In FPGAs a tristate drive is used to convert a pin from an input to an output or vice versa. Now this works only in digital circuits. Is there a way how you could obtain the same functionality of ...
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History of choice of 'Z' to represent high impedance?

I'm curious to know why 'Z' was chosen to represent high impedance state for types such as used in VHDL and VHDL-AMS's std_logic_1164 logic system: (image of page 789 of The System Designer's Guide ...
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Controlling two things with a tri-state output using discrete logic [duplicate]

I'm trying to control a bunch of MOSFETs with an Arduino microcontroller, and was wondering if it would be possible to control two FETs with one tri-state Arduino output. There are three states that ...
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1 vote
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Analog 3-state buffer where the input voltage equals the output voltage and is controlled by a digital control line

I'm looking for a device that can control an analog signal without interference. I need it to be controlled by a digital control line (0v - 5v). The input voltage (0v - 5v) should equal the output ...
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