Questions tagged [tri-state]

A signalling standard typically used in buses that either drives the wire low, drives the wire high or disconnects from the wire (Hi-impedance, Hi-Z or tri-stated) such that there will not be a driver conflict when the wire is driven by another unit/driver. Two low impedance drivers driving to different levels (High Vs. Low) can potentially damage each other but certainly will corrupt the data on the wire. Allows for shared wires (with coordination).

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3answers
169 views

Is this circuit from a textbook wrong?

(This is not a homework question.) While reading "Digital Computer Electronics" by Albert P. Malvino, I found this circuit on page 121, figure 8-22(a). It claims to be an example of a discrete TTL ...
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56 views

Tri State/Floating Signal Detection

I'm working on a project for automotive environment in which I need to read signals from the power mirrors switch in a microcontroller. The power mirrors switch controls the mirror's moving directions ...
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How is the enable pin implemented in tri state logic?

I watched Ben Eater video on Youtube giving an introduction to tri state logic (https://m.youtube.com/watch?v=faAjse109Q8&t=98s). He first presents a circuit made of two transistors (see picture) ...
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Is it possible to make a Tri-State Bidirectional buffer without any tri-state buffers?

I'm currently making a computer on an application called Smart Logic Simulator. However, it doesn't have any tri-state buffers and therefor I cannot make a bus (based off the DM74LS245 chip). Is there ...
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38 views

Choosing the best approach for data selection in a datapath

For a university project, I have to design and construct a very simple CPU including the ALU. In order to select between different data lines that go into the ALU(32-bit data line), I have thought of ...
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82 views

Logic levels on tri-state buffer,

i am working on some CPLD-controlled SPI devices that will be daisy-chained together. I will be using 74VHCT126AFTTR tri-state buffers to disconnect the SPI and Slave Select lines on the device from ...
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Reasons for having MCU pin-states default to pull-up/down out of reset

On many MCUs, pin-states default to tri-stated (a.k.a. analog inputs) when the MCU resets so as to not affect the circuits they are connected to until software configures the pins. The tri-stated ...
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1answer
34 views

Question about bi-directional pin from Roth reference

I now am studying the tri-state buffer from the reference "Fundamental of Logic Design", 6th edition, By: C. H. Roth and L. L. Kinney. I found that circuit of a bi-directional pin as application of ...
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59 views

Can a Tri-State buffer be used with AC signals?

I'm trying to switch an analog audio line from its given channel to analog ground when a specific line goes low (in this case, the DACs charge pump goes low when it shuts down). Would a tri-state ...
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3answers
289 views

Converting 3.3V signal to 5V with tri-state

I need to buffer and tri-state a 3.3V 8 bit signal, and shift the output to 5V (when the buffer is not in tri-state). I am using a CD54HC373 buffer and 2 BOB-12009 logic level converters, but I can't ...
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65 views

Which case is better

if we want to construct 3 state inverter... Which case is better? Having the enable near o/p or far the o/p I have seen people drawing it far the o/p. But can't figure out why Do you see? The upper ...
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1answer
114 views

Glitchless output on PIC10F

I'm learning how to program a PIC10F220. I'm using a PICkit 3 programmer and running physical experiments, as well as running the simulator in MPLABX. One thing I want to do is set the proper level ...
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114 views

2-bit DAC from TTL logic using 2 MCU outputs

Basically I am trying to make a 2-bit DAC that can interface to an external device via one signal wire. I want to create a 3-step signal that can be ~0V, 2.5V, and ~5V. For starters, I tried using ...
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1answer
68 views

can a PC parallel port produce interference?

Please forgive me for crossing wires on top of IC's but I wanted to get things done, yet still have no luck. Let me explain the circuit. I created a circuit in which three parallel port data lines ...
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2k views

How to implement 8x1 multiplexer using 3x8 decoder and 3-state buffer

Suppose that AB and CD are 2-bit unsigned binary numbers (a) Find the truth table for the function F with 4 inputs A, B, C, D to satisfy the following condition if AB >= CD, then F = 1, otherwise F =...
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949 views

Using 3-state buffers for multiplexing

Some while ago, while memorising the 74xx series part numbers, I came across the concept of a device with a "3-state" output. The idea, as best as I can tell, is that the device outputs logic low, ...
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1answer
556 views

Is my SPI multiplexing design correct?

I want a RPi to act as a SPI master and be able to communicate with 24 SPI slaves. The SPI connection is full-duplex. The SPI slaves are about 50 cm away from the master (SPI runs on wires to an other ...
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1answer
98 views

Is this an accurate model of a microcontroller pin?

For something so common, I can't seem to find anything online on what a microcontroller pin "looks like" (besides a high-level voltage source when output, open-circuit when input). So I decided to ...
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2answers
219 views

what logic family does tri state logic fall into?

Here is a good Wikipedia on logic families. This seemed like a particularly important line. Of these families, only ECL, TTL, NMOS, CMOS, and BiCMOS are currently still in widespread use. I'...
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252 views

8-bit tristate logic gates

Is anyone aware of any tri-state logic gate families? 8-bit input AND,NAND,OR,NOR,XOR,XNOR with an enable selector? Or is this too specific and requires a roll your own implementation?
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142 views

Tristate driver I/O for analog signals

In FPGAs a tristate drive is used to convert a pin from an input to an output or vice versa. Now this works only in digital circuits. Is there a way how you could obtain the same functionality of ...
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1answer
178 views

History of choice of 'Z' to represent high impedance?

I'm curious to know why 'Z' was chosen to represent high impedance state for types such as used in VHDL and VHDL-AMS's std_logic_1164 logic system: (image of page 789 of The System Designer's Guide ...
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Controlling two things with a tri-state output using discrete logic [duplicate]

I'm trying to control a bunch of MOSFETs with an Arduino microcontroller, and was wondering if it would be possible to control two FETs with one tri-state Arduino output. There are three states that ...
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2answers
199 views

Analog 3-state buffer where the input voltage equals the output voltage and is controlled by a digital control line

I'm looking for a device that can control an analog signal without interference. I need it to be controlled by a digital control line (0v - 5v). The input voltage (0v - 5v) should equal the output ...
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415 views

How to 'de-mux' a tri-state pin?

I would like to use a single pin (tri-state buffer, 3.3V logic in case this matters) to drive two P-channel MOSFETs as high-side switches. Only one of them will be 'on' at any time. When the pin is in ...
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2answers
2k views

MCP73831: design a lithium battery charging circuit

I am trying to design a charging circuit for a lithium polymer battery with 2200 mAh capacity and 3.7 V nominal voltage. The integrated circuit for the control of the charge of the battery is the ...
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2answers
222 views

Why does the potentiometer have no effect on the output voltage here?

I have the circuit below, where D and Q are input and output pins (respectively) of a 74373 octal D-type transparent-latch IC. As I vary the pot from 0-10k when D is high, the voltage goes high and ...
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128 views

Is there any reason some pins don't not work as GPIO on ATmega?

I got an ATmega8515 and this simple code inside main(): void main(void) { DDRD = 0xFF; PORTD = 0xFF; while(1){} } I expect to see all the pins high, ...
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264 views

TP4054 Battery Charging IC - Weak Pulldown / TriState Output

I'm playing around with a TP4054, which is battery charging IC -- and I didn't know what I was doing when I added it to a sample board. The CHRG pin is similiar to the Microchip MCP battery charging ...
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2answers
211 views

Tri-state inverting buffer analog signal analysis

I'm using a tri-state inverting buffer with a self-biasing resistor (represented in the second image) as an amplifier. I'm trying to do a theoretical analysis, but I'm not sure how to get the gain ...
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Will multiple chips outputing onto a bus for a few nanoseconds cause damage?

I'm working on a home-brew CPU design, with the usual mix of parallel EEPROMs, static RAMs and registers, tri-stated onto a single 8 bit bus. My /output-enable logic for three tristate-able chips on ...
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2answers
527 views

How does an output switching from HI or LO to HI-Z affect an input in CMOS?

Let's say we have a tri-state buffer output connected to an inverter input, implemented in 7400 series CMOS chips. If the buffer output is HI, the inverter output is LO. If the buffer output is LO, ...
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1answer
1k views

verilog - altera fpga “error pin x has multiple drivers due to the non-tri-state driver”

I have a 32 bit parellel IO interface (PIO) defined in a NIOS II soft processor. It is for a 32 pin connector on a board. I instantiate the NIOS in a top level verilog module called ...
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2answers
2k views

Non-Inverting Tri-State buffer with transistors only possible?

I'm currently playing around with discrete transistor logic gates and now want to create a tri-state buffer. The only circuit that I found that kind-of works is this one, but it inverts my input: ...
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198 views

Comparison between the performance parameters of Tristate buffer and Schmitt Trigger

I want to know the comparison between the performance parameters of Tristate buffer and Schmitt Trigger. By performance parameters, I mean things like propagation delay,power consumption etc. Thank ...
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6answers
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Why do I2C lines use open drain driver instead of tri-state drivers?

My understanding is that I2C lines use pull-up resistors to passively pull up the bus to logic high because the drivers used on the bus are active drivers, namely open collector/open-drain. Since open ...
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3answers
1k views

can quartus synthesize a tri-state bus?

Would the following Verilog be synthesize (in Altera's Quartus) to a bus of 1024 tri-state devices connected to one wire? Will it be faster (clock latency) than a binary tree of 1024 or-gates? ` <...
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1answer
962 views

3-state buffer mechanism

I read about the 3-state buffer. I do not precisely understand the working mechanism. It allows essentially to obtain a third state, that corresponding to the disconnection of the output from the ...
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1answer
301 views

Why does a GPIO pin always return logic low when devices are connected to it?

I made myself a transceiver in which I want a microcontroller to control. I created a microcontroller test circuit where some GPIO pins are pulled up via 10K resistors and when I tested them with ...
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3answers
126 views

Using Three-state logic to speed up floating point multiplication

This question is idle pondering but... Given "double-precision" is 53 bits, so takes 53^2 (or 2809) largely ordered sequential operations to perform multiplication. Whereas the equivalent ternary ...
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1answer
165 views

Zener diode level conversion of tristate output

I have an MCP73831 li-ion charger connected to an ATMega1284p. The charger has a tri-state status pin which can be High(5V), Hi-Z or Low. The ATMega runs at 3V3. I want to be able to read the value ...
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1answer
112 views

Unused address pins in AVR ATMEGA162

We have an ATMEGA162, and have connected an SRAM to it. We do not use PC5, that is the 13th address bit. What are we to do with this pin? When we connected it to ground, we got no errors in the SRAM. ...
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2answers
551 views

Charlieplexing 7-segment display segments vs segment

I understand the principle of charlieplex and the use of tri-state. What I don't understand is, can I light all segments on a display at once or do I have to light one segment at a time? Say I have 8 ...
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4answers
928 views

PNP high side switch base current leak?

This is for a Raspberry Pi AVR ISP interface board. Most of the functionality is around level shifting the logic to the target board's voltage. This is achieved with a 74ABT125 chip. It's powered by ...
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2answers
1k views

Understanding how a tristate buffer works (74LS241)

I'm trying to understand how the 74LS241 works. From what I read, if two input are high on a buffer, then the output will be high. For some reason, this isn't working on my circuit. So here is ...
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What is the purpose of a tri-state pin in a Oscillator

I'm trying to interface this clock (32.768kHz Ceramic Surface Mount Crystal Oscillator datasheet), but I'm confused as to what to do with the tri-state pin. What is it's purpose in the oscillator and ...
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1answer
117 views

Pull high in software

I was porting Arduino library ps/2 mouse to pic and I wondered why pull high works when declaring the pin as an input and then making it high and that worked for pic and Arduino alike, but when I ...
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3answers
177 views

Can one tri-state pin drive two SS pins?

This is how i see it; State H: SS out is High, Deselecting SS 2, turning off Q2 and on Q1, which grounds SS 1, turning it on. State L: SS out is Low, turning off Q1 and grounds SS 2 through Q2. SS 1 ...
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1answer
423 views

Simple way to invert a tristate output

I am looking for a simple circuit to invert a tristate output from a microcontroller, hopefully using only BJTs. What I mean by this is that the truth table would look like: ...
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1answer
246 views

Hi-Z state, MCU and transistors

I have a 3-phase motor h-bridge. The inputs to the motor require 3 different phases, +, -, and ...