This is not a Wien bridge oscillator, though it's trying a bit to look like one.
                                     
I've redrawn it slightly, to emphasise the 'Wien' components R6, C2 in series and C1 and R1 in parallel to ground. This schematic is drawn with LTSpice. The reference designators are the same as those in the question.

[![enter image description here][1]][1]


  [1]: https://i.sstatic.net/hhMZb.png

U1 with R2 is a virtual ground amplifier, presenting a short circuit to the bottom of R1. It's a transconductance amplifier with a gain of R2, producing a voltage at its output of 100k x -I(R1). It's basically measuring the current in R1.

The R4/5/D1/2 network around U2 is intended to produce an effective feedback resistance of 100k at the correct output level. At a lower level, D1/2 stop conducting and the feedback resistance rises, and vice versa. This creates a feedback network together with R3.

U2 is a differential amplifier, with inputs from both V(mid_point), and U1. It can be analysed by fixing one input, computing the gain for the other, and then superposing the two results.

With U1 output fixed, the output of U2 is 2 x V(mid_point).

With V(mid_point) fixed, the output of U2 is -1 x U1 output, or 100k * I(R1).

It seems to me that the V(midpoint) and I(R1) will always be in phase. It appears that it's the phase shift through R6 and C2 into the C1/R1 load that controls the resonant frequency.

That's as far as I'm going to go with a verbal description. It needs somebody to do nodal analysis and write down the phase shifts and amplitudes to demonstrate that there is a resonant frequency where the gain round the loop is unity with zero phase shift.

Simulating the circuit in LTSpice, I get the following approximate frequencies

|R1(Ω)|freq(Hz)|
|-|-|
|1k|10k|
|10k|3k|
|100k|1k|
|1M|300|

So it's not behaving like a Wien Bridge oscillator with a linear dependence on tuning resistance, it's going as the square root of R. The circuit appears to be behaving as if it's synthesising an LC, with the value of one of them linearly related to the tuning resistance. It's an interesting circuit though. As R1 needs to swing over such a wide range, it's of limited usefulness. I'd be inclined to use a state variable oscillator if I needed a wide range oscillator and could afford multiple opamps.

The vital part that some people miss when trying to simulate an oscillator in Spice is the .ic Initial Conditions. When Spice first analyses a circuit, it does a DC analysis to find the operating voltage of all the capacitors. Now settled, the circuit has no stimulus to start oscillating, unlike a real oscillator which starts from noise. Setting an initial voltage on one of the capacitors forces an initial transient into the circuit.

I've included my LTSpice .asc file below for your simulating convenience.

    Version 4
    SHEET 1 912 836
    WIRE 720 -224 -64 -224
    WIRE -64 -176 -64 -224
    WIRE -64 -48 -64 -96
    WIRE 240 48 176 48
    WIRE -64 112 -64 16
    WIRE 16 112 -64 112
    WIRE 176 112 176 48
    WIRE 176 112 16 112
    WIRE 480 112 176 112
    WIRE 720 128 720 -224
    WIRE 720 128 544 128
    WIRE -64 144 -64 112
    WIRE 16 144 16 112
    WIRE 480 144 416 144
    WIRE 416 240 416 144
    WIRE 480 240 416 240
    WIRE 720 240 720 128
    WIRE 720 240 560 240
    WIRE 16 272 16 224
    WIRE 80 272 16 272
    WIRE 208 272 160 272
    WIRE 256 272 208 272
    WIRE 416 272 416 240
    WIRE 416 272 336 272
    WIRE 624 320 576 320
    WIRE 720 320 720 240
    WIRE 720 320 688 320
    WIRE 16 352 16 272
    WIRE 80 352 16 352
    WIRE 416 352 416 272
    WIRE 480 352 416 352
    WIRE 576 352 576 320
    WIRE 576 352 560 352
    WIRE 208 368 208 272
    WIRE 208 368 144 368
    WIRE 80 384 16 384
    WIRE 576 400 576 352
    WIRE 624 400 576 400
    WIRE 720 400 720 320
    WIRE 720 400 688 400
    WIRE -64 432 -64 208
    WIRE 16 432 16 384
    FLAG -64 432 0
    FLAG 16 432 0
    FLAG 720 -224 Output
    FLAG 240 48 mid_point
    SYMBOL OpAmps\\opamp 112 304 R0
    SYMATTR InstName U1
    SYMBOL OpAmps\\opamp 512 192 M180
    SYMATTR InstName U2
    SYMBOL cap -80 144 R0
    SYMATTR InstName C1
    SYMATTR Value 1.5n
    SYMBOL cap -80 -48 R0
    SYMATTR InstName C2
    SYMATTR Value 1.5n
    SYMBOL res 0 128 R0
    SYMATTR InstName R1
    SYMATTR Value 1Meg
    SYMBOL res 176 256 R90
    WINDOW 0 0 56 VBottom 2
    WINDOW 3 32 56 VTop 2
    SYMATTR InstName R2
    SYMATTR Value 100k
    SYMBOL res 352 256 R90
    WINDOW 0 0 56 VBottom 2
    WINDOW 3 32 56 VTop 2
    SYMATTR InstName R3
    SYMATTR Value 100k
    SYMBOL res 576 224 R90
    WINDOW 0 0 56 VBottom 2
    WINDOW 3 32 56 VTop 2
    SYMATTR InstName R4
    SYMATTR Value 102k
    SYMBOL res 576 336 R90
    WINDOW 0 0 56 VBottom 2
    WINDOW 3 32 56 VTop 2
    SYMATTR InstName R5
    SYMATTR Value 2Meg
    SYMBOL res -48 -80 R180
    WINDOW 0 36 76 Left 2
    WINDOW 3 36 40 Left 2
    SYMATTR InstName R6
    SYMATTR Value 100k
    SYMBOL diode 624 336 R270
    WINDOW 0 32 32 VTop 2
    WINDOW 3 0 32 VBottom 2
    SYMATTR InstName D1
    SYMATTR Value 1N4148
    SYMBOL diode 688 384 R90
    WINDOW 0 0 32 VBottom 2
    WINDOW 3 32 32 VTop 2
    SYMATTR InstName D2
    SYMATTR Value 1N4148
    TEXT 296 -144 Left 2 !.lib opamp.sub
    TEXT 296 -104 Left 2 !.ic V(mid_point)=1u
    TEXT 294 -60 Left 2 !.tran 1