Why would you "isolate the other SPI slaves when connected to one"? The whole point of using SPI is that CS line activates only one slave at a time.
Is it to deal with fan-out load on SCK and MOSI lines? A simple buffer driving signal "bus" would be sufficient for this.
Or is it to multiplex SCK signal as well? I don't think you need to do this. Instead of using shift registers to multiplex signals, you can use them to directly drive CS pins of the slaves. If your software does not output clock signal until correct slave selected there is absolutely no harm in "activating" them one by one without actual transmission.
I think the limiting factor in your design is line capacitance, which will grow regardless of what you connect to RPi outputs, buffers or slaves.
So, use shift registers to activate CS pins on slaves and use simple line buffers on SCK and MOSI.