I have a TFT tranisotor, wired like so: 

[![Circuit][1]][1]

I am forcing pulses of Current IDS and registering VGS
This is what it looks like on the SMU:

* PLot 1: CH1 IDS VS time
* Plot 2: Ch1 VGS vs time
 
[![Plots][2]][2]

I want to wire a second transistor in the same way, get a recording VGS2 and then find the difference VGS1-VGS2.
  [1]: https://i.sstatic.net/Z0MZv.png
  [2]: https://i.sstatic.net/lpcKn.png